diff options
Diffstat (limited to 'arch/powerpc/boot/dts/lite5200.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/lite5200.dts | 59 |
1 files changed, 28 insertions, 31 deletions
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts index d29308fe4c24..bc45f5fbb060 100644 --- a/arch/powerpc/boot/dts/lite5200.dts +++ b/arch/powerpc/boot/dts/lite5200.dts @@ -19,7 +19,7 @@ / { model = "fsl,lite5200"; // revision = "1.0"; - compatible = "fsl,lite5200\0generic-mpc5200"; + compatible = "fsl,lite5200","generic-mpc5200"; #address-cells = <1>; #size-cells = <1>; @@ -37,7 +37,6 @@ timebase-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader clock-frequency = <0>; // from bootloader - 32-bit; }; }; @@ -50,10 +49,9 @@ model = "fsl,mpc5200"; compatible = "mpc5200"; revision = ""; // from bootloader - #interrupt-cells = <3>; device_type = "soc"; - ranges = <0 f0000000 f0010000>; - reg = <f0000000 00010000>; + ranges = <0 f0000000 0000c000>; + reg = <f0000000 00000100>; bus-frequency = <0>; // from bootloader system-frequency = <0>; // from bootloader @@ -69,7 +67,6 @@ device_type = "interrupt-controller"; compatible = "mpc5200-pic"; reg = <500 80>; - built-in; }; gpt@600 { // General Purpose Timer @@ -185,27 +182,6 @@ interrupt-parent = <&mpc5200_pic>; }; - pci@0d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "mpc5200-pci"; - reg = <d00 100>; - interrupt-map-mask = <f800 0 0 7>; - interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 - c000 0 0 2 &mpc5200_pic 0 0 3 - c000 0 0 3 &mpc5200_pic 0 0 3 - c000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 a 0>; - interrupt-parent = <&mpc5200_pic>; - bus-range = <0 0>; - ranges = <42000000 0 80000000 80000000 0 20000000 - 02000000 0 a0000000 a0000000 0 10000000 - 01000000 0 00000000 b0000000 0 01000000>; - }; - spi@f00 { device_type = "spi"; compatible = "mpc5200-spi"; @@ -216,7 +192,7 @@ usb@1000 { device_type = "usb-ohci-be"; - compatible = "mpc5200-ohci\0ohci-be"; + compatible = "mpc5200-ohci","ohci-be"; reg = <1000 ff>; interrupts = <2 6 0>; interrupt-parent = <&mpc5200_pic>; @@ -317,7 +293,7 @@ i2c@3d00 { device_type = "i2c"; - compatible = "mpc5200-i2c\0fsl-i2c"; + compatible = "mpc5200-i2c","fsl-i2c"; cell-index = <0>; reg = <3d00 40>; interrupts = <2 f 0>; @@ -327,7 +303,7 @@ i2c@3d40 { device_type = "i2c"; - compatible = "mpc5200-i2c\0fsl-i2c"; + compatible = "mpc5200-i2c","fsl-i2c"; cell-index = <1>; reg = <3d40 40>; interrupts = <2 10 0>; @@ -336,8 +312,29 @@ }; sram@8000 { device_type = "sram"; - compatible = "mpc5200-sram\0sram"; + compatible = "mpc5200-sram","sram"; reg = <8000 4000>; }; }; + + pci@f0000d00 { + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + compatible = "mpc5200-pci"; + reg = <f0000d00 100>; + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 + c000 0 0 2 &mpc5200_pic 0 0 3 + c000 0 0 3 &mpc5200_pic 0 0 3 + c000 0 0 4 &mpc5200_pic 0 0 3>; + clock-frequency = <0>; // From boot loader + interrupts = <2 8 0 2 9 0 2 a 0>; + interrupt-parent = <&mpc5200_pic>; + bus-range = <0 0>; + ranges = <42000000 0 80000000 80000000 0 20000000 + 02000000 0 a0000000 a0000000 0 10000000 + 01000000 0 00000000 b0000000 0 01000000>; + }; }; |