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-rw-r--r--arch/sh/boards/Kconfig27
-rw-r--r--arch/sh/boards/Makefile3
-rw-r--r--arch/sh/boards/board-ap325rxa.c12
-rw-r--r--arch/sh/boards/board-espt.c102
-rw-r--r--arch/sh/boards/board-polaris.c149
-rw-r--r--arch/sh/boards/board-sh7785lcr.c13
-rw-r--r--arch/sh/boards/board-urquell.c162
-rw-r--r--arch/sh/boards/mach-highlander/Kconfig2
-rw-r--r--arch/sh/boards/mach-hp6xx/pm_wakeup.S31
-rw-r--r--arch/sh/boards/mach-hp6xx/setup.c1
-rw-r--r--arch/sh/boards/mach-migor/setup.c9
-rw-r--r--arch/sh/boards/mach-rsk/Kconfig2
-rw-r--r--arch/sh/boards/mach-sh7763rdp/setup.c10
13 files changed, 489 insertions, 34 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 861914747e4e..dcc1af8a2cfe 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -155,17 +155,22 @@ config SH_SH7785LCR
config SH_SH7785LCR_29BIT_PHYSMAPS
bool "SH7785LCR 29bit physmaps"
- depends on SH_SH7785LCR
+ depends on SH_SH7785LCR && 29BIT
default y
help
This board has 2 physical memory maps. It can be changed with
DIP switch(S2-5). If you set the DIP switch for S2-5 = ON,
you can access all on-board device in 29bit address mode.
+config SH_URQUELL
+ bool "Urquell"
+ depends on CPU_SUBTYPE_SH7786
+ select ARCH_REQUIRE_GPIOLIB
+
config SH_MIGOR
bool "Migo-R"
depends on CPU_SUBTYPE_SH7722
- select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
help
Select Migo-R if configuring for the SH7722 Migo-R platform
by Renesas System Solutions Asia Pte. Ltd.
@@ -173,7 +178,7 @@ config SH_MIGOR
config SH_AP325RXA
bool "AP-325RXA"
depends on CPU_SUBTYPE_SH7723
- select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
help
Renesas "AP-325RXA" support.
Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
@@ -185,6 +190,13 @@ config SH_SH7763RDP
Select SH7763RDP if configuring for a Renesas SH7763
evaluation board.
+config SH_ESPT
+ bool "ESPT"
+ depends on CPU_SUBTYPE_SH7763
+ help
+ Select ESPT if configuring for a Renesas SH7763
+ with gigabit ether evaluation board.
+
config SH_EDOSK7705
bool "EDOSK7705"
depends on CPU_SUBTYPE_SH7705
@@ -240,7 +252,7 @@ config SH_X3PROTO
config SH_MAGIC_PANEL_R2
bool "Magic Panel R2"
depends on CPU_SUBTYPE_SH7720
- select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
help
Select Magic Panel R2 if configuring for Magic Panel R2.
@@ -249,6 +261,13 @@ config SH_CAYMAN
depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103
select SYS_SUPPORTS_PCI
+config SH_POLARIS
+ bool "SMSC Polaris"
+ select CPU_HAS_IPR_IRQ
+ depends on CPU_SUBTYPE_SH7709
+ help
+ Select if configuring for an SMSC Polaris development board
+
endmenu
source "arch/sh/boards/mach-r2d/Kconfig"
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 269ae2be49ef..7baa21090231 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -4,5 +4,8 @@
obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o
obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
+obj-$(CONFIG_SH_URQUELL) += board-urquell.o
obj-$(CONFIG_SH_SHMIN) += board-shmin.o
obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
+obj-$(CONFIG_SH_ESPT) += board-espt.o
+obj-$(CONFIG_SH_POLARIS) += board-polaris.o
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 72da416f6162..a64e38841c49 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -22,6 +22,7 @@
#include <linux/gpio.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
+#include <media/soc_camera.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <video/sh_mobile_lcdc.h>
@@ -165,6 +166,16 @@ static void ap320_wvga_power_on(void *board_data)
ctrl_outw(0x100, FPGA_BKLREG);
}
+static void ap320_wvga_power_off(void *board_data)
+{
+ /* backlight */
+ ctrl_outw(0, FPGA_BKLREG);
+ gpio_set_value(GPIO_PTS3, 1);
+
+ /* ASD AP-320/325 LCD OFF */
+ ctrl_outw(0, FPGA_LCDREG);
+}
+
static struct sh_mobile_lcdc_info lcdc_info = {
.clock_source = LCDC_CLK_EXTERNAL,
.ch[0] = {
@@ -190,6 +201,7 @@ static struct sh_mobile_lcdc_info lcdc_info = {
},
.board_cfg = {
.display_on = ap320_wvga_power_on,
+ .display_off = ap320_wvga_power_off,
},
}
};
diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c
new file mode 100644
index 000000000000..d5ce5e18eb37
--- /dev/null
+++ b/arch/sh/boards/board-espt.c
@@ -0,0 +1,102 @@
+/*
+ * Data Technology Inc. ESPT-GIGA board suport
+ *
+ * Copyright (C) 2008, 2009 Renesas Solutions Corp.
+ * Copyright (C) 2008, 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <asm/machvec.h>
+#include <asm/sizes.h>
+#include <asm/sh_eth.h>
+
+/* NOR Flash */
+static struct mtd_partition espt_nor_flash_partitions[] = {
+ {
+ .name = "U-Boot",
+ .offset = 0,
+ .size = (2 * SZ_128K),
+ .mask_flags = MTD_WRITEABLE, /* Read-only */
+ }, {
+ .name = "Linux-Kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = (20 * SZ_128K),
+ }, {
+ .name = "Root Filesystem",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data espt_nor_flash_data = {
+ .width = 2,
+ .parts = espt_nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(espt_nor_flash_partitions),
+};
+
+static struct resource espt_nor_flash_resources[] = {
+ [0] = {
+ .name = "NOR Flash",
+ .start = 0,
+ .end = SZ_8M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device espt_nor_flash_device = {
+ .name = "physmap-flash",
+ .resource = espt_nor_flash_resources,
+ .num_resources = ARRAY_SIZE(espt_nor_flash_resources),
+ .dev = {
+ .platform_data = &espt_nor_flash_data,
+ },
+};
+
+/* SH-Ether */
+static struct resource sh_eth_resources[] = {
+ {
+ .start = 0xFEE00800, /* use eth1 */
+ .end = 0xFEE00F7C - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = 57, /* irq number */
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct sh_eth_plat_data sh7763_eth_pdata = {
+ .phy = 0,
+ .edmac_endian = EDMAC_LITTLE_ENDIAN,
+};
+
+static struct platform_device espt_eth_device = {
+ .name = "sh-eth",
+ .resource = sh_eth_resources,
+ .num_resources = ARRAY_SIZE(sh_eth_resources),
+ .dev = {
+ .platform_data = &sh7763_eth_pdata,
+ },
+};
+
+static struct platform_device *espt_devices[] __initdata = {
+ &espt_nor_flash_device,
+ &espt_eth_device,
+};
+
+static int __init espt_devices_setup(void)
+{
+ return platform_add_devices(espt_devices,
+ ARRAY_SIZE(espt_devices));
+}
+device_initcall(espt_devices_setup);
+
+static struct sh_machine_vector mv_espt __initmv = {
+ .mv_name = "ESPT-GIGA",
+};
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
new file mode 100644
index 000000000000..62607eb51004
--- /dev/null
+++ b/arch/sh/boards/board-polaris.c
@@ -0,0 +1,149 @@
+/*
+ * June 2006 steve.glendinning@smsc.com
+ *
+ * Polaris-specific resource declaration
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/smsc911x.h>
+#include <linux/io.h>
+#include <asm/irq.h>
+#include <asm/machvec.h>
+#include <asm/heartbeat.h>
+#include <cpu/gpio.h>
+#include <mach-se/mach/se.h>
+
+#define BCR2 (0xFFFFFF62)
+#define WCR2 (0xFFFFFF66)
+#define AREA5_WAIT_CTRL (0x1C00)
+#define WAIT_STATES_10 (0x7)
+
+static struct resource smsc911x_resources[] = {
+ [0] = {
+ .name = "smsc911x-memory",
+ .start = PA_EXT5,
+ .end = PA_EXT5 + 0x1fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "smsc911x-irq",
+ .start = IRQ0_IRQ,
+ .end = IRQ0_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct smsc911x_platform_config smsc911x_config = {
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+ .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+ .flags = SMSC911X_USE_32BIT,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device smsc911x_device = {
+ .name = "smsc911x",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(smsc911x_resources),
+ .resource = smsc911x_resources,
+ .dev = {
+ .platform_data = &smsc911x_config,
+ },
+};
+
+static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
+
+static struct heartbeat_data heartbeat_data = {
+ .bit_pos = heartbeat_bit_pos,
+ .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
+ .regsize = 8,
+};
+
+static struct resource heartbeat_resources[] = {
+ [0] = {
+ .start = PORT_PCDR,
+ .end = PORT_PCDR,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device heartbeat_device = {
+ .name = "heartbeat",
+ .id = -1,
+ .dev = {
+ .platform_data = &heartbeat_data,
+ },
+ .num_resources = ARRAY_SIZE(heartbeat_resources),
+ .resource = heartbeat_resources,
+};
+
+static struct platform_device *polaris_devices[] __initdata = {
+ &smsc911x_device,
+ &heartbeat_device,
+};
+
+static int __init polaris_initialise(void)
+{
+ u16 wcr, bcr_mask;
+
+ printk(KERN_INFO "Configuring Polaris external bus\n");
+
+ /* Configure area 5 with 2 wait states */
+ wcr = ctrl_inw(WCR2);
+ wcr &= (~AREA5_WAIT_CTRL);
+ wcr |= (WAIT_STATES_10 << 10);
+ ctrl_outw(wcr, WCR2);
+
+ /* Configure area 5 for 32-bit access */
+ bcr_mask = ctrl_inw(BCR2);
+ bcr_mask |= 1 << 10;
+ ctrl_outw(bcr_mask, BCR2);
+
+ return platform_add_devices(polaris_devices,
+ ARRAY_SIZE(polaris_devices));
+}
+arch_initcall(polaris_initialise);
+
+static struct ipr_data ipr_irq_table[] = {
+ /* External IRQs */
+ { IRQ0_IRQ, 0, 0, 1, }, /* IRQ0 */
+ { IRQ1_IRQ, 0, 4, 1, }, /* IRQ1 */
+};
+
+static unsigned long ipr_offsets[] = {
+ INTC_IPRC
+};
+
+static struct ipr_desc ipr_irq_desc = {
+ .ipr_offsets = ipr_offsets,
+ .nr_offsets = ARRAY_SIZE(ipr_offsets),
+
+ .ipr_data = ipr_irq_table,
+ .nr_irqs = ARRAY_SIZE(ipr_irq_table),
+ .chip = {
+ .name = "sh7709-ext",
+ },
+};
+
+static void __init init_polaris_irq(void)
+{
+ /* Disable all interrupts */
+ ctrl_outw(0, BCR_ILCRA);
+ ctrl_outw(0, BCR_ILCRB);
+ ctrl_outw(0, BCR_ILCRC);
+ ctrl_outw(0, BCR_ILCRD);
+ ctrl_outw(0, BCR_ILCRE);
+ ctrl_outw(0, BCR_ILCRF);
+ ctrl_outw(0, BCR_ILCRG);
+
+ register_ipr_controller(&ipr_irq_desc);
+}
+
+static struct sh_machine_vector mv_polaris __initmv = {
+ .mv_name = "Polaris",
+ .mv_nr_irqs = 61,
+ .mv_init_irq = init_polaris_irq,
+};
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index 38a64968d7bf..94c0296bc35d 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -275,7 +275,18 @@ void __init init_sh7785lcr_IRQ(void)
static void sh7785lcr_power_off(void)
{
- ctrl_outb(0x01, P2SEGADDR(PLD_POFCR));
+ unsigned char *p;
+
+ p = ioremap(PLD_POFCR, PLD_POFCR + 1);
+ if (!p) {
+ printk(KERN_ERR "%s: ioremap error.\n", __func__);
+ return;
+ }
+ *p = 0x01;
+ iounmap(p);
+ set_bl_bit();
+ while (1)
+ cpu_relax();
}
/* Initialize the board */
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
new file mode 100644
index 000000000000..17036ce20086
--- /dev/null
+++ b/arch/sh/boards/board-urquell.c
@@ -0,0 +1,162 @@
+/*
+ * Renesas Technology Corp. SH7786 Urquell Support.
+ *
+ * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ * Copyright (C) 2008 Yoshihiro Shimoda
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+#include <linux/smc91x.h>
+#include <linux/mtd/physmap.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <mach/urquell.h>
+#include <cpu/sh7786.h>
+#include <asm/heartbeat.h>
+#include <asm/sizes.h>
+
+static struct resource heartbeat_resources[] = {
+ [0] = {
+ .start = BOARDREG(SLEDR),
+ .end = BOARDREG(SLEDR),
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct heartbeat_data heartbeat_data = {
+ .regsize = 16,
+};
+
+static struct platform_device heartbeat_device = {
+ .name = "heartbeat",
+ .id = -1,
+ .dev = {
+ .platform_data = &heartbeat_data,
+ },
+ .num_resources = ARRAY_SIZE(heartbeat_resources),
+ .resource = heartbeat_resources,
+};
+
+static struct smc91x_platdata smc91x_info = {
+ .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
+
+static struct resource smc91x_eth_resources[] = {
+ [0] = {
+ .name = "SMC91C111" ,
+ .start = 0x05800300,
+ .end = 0x0580030f,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 11,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device smc91x_eth_device = {
+ .name = "smc91x",
+ .num_resources = ARRAY_SIZE(smc91x_eth_resources),
+ .resource = smc91x_eth_resources,
+ .dev = {
+ .platform_data = &smc91x_info,
+ },
+};
+
+static struct mtd_partition nor_flash_partitions[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = SZ_512K,
+ .mask_flags = MTD_WRITEABLE, /* Read-only */
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_512K,
+ .mask_flags = MTD_WRITEABLE, /* Read-only */
+ },
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_4M,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+ .width = 2,
+ .parts = nor_flash_partitions,
+ .nr_parts = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+ [0] = {
+ .start = NOR_FLASH_ADDR,
+ .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device nor_flash_device = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &nor_flash_data,
+ },
+ .num_resources = ARRAY_SIZE(nor_flash_resources),
+ .resource = nor_flash_resources,
+};
+
+static struct platform_device *urquell_devices[] __initdata = {
+ &heartbeat_device,
+ &smc91x_eth_device,
+ &nor_flash_device,
+};
+
+static int __init urquell_devices_setup(void)
+{
+ /* USB */
+ gpio_request(GPIO_FN_USB_OVC0, NULL);
+ gpio_request(GPIO_FN_USB_PENC0, NULL);
+
+ return platform_add_devices(urquell_devices,
+ ARRAY_SIZE(urquell_devices));
+}
+device_initcall(urquell_devices_setup);
+
+static void urquell_power_off(void)
+{
+ __raw_writew(0xa5a5, UBOARDREG(SRSTR));
+}
+
+static void __init urquell_init_irq(void)
+{
+ plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
+}
+
+/* Initialize the board */
+static void __init urquell_setup(char **cmdline_p)
+{
+ printk(KERN_INFO "Renesas Technology Corp. Urquell support.\n");
+
+ pm_power_off = urquell_power_off;
+}
+
+/*
+ * The Machine Vector
+ */
+static struct sh_machine_vector mv_urquell __initmv = {
+ .mv_name = "Urquell",
+ .mv_setup = urquell_setup,
+ .mv_init_irq = urquell_init_irq,
+};
diff --git a/arch/sh/boards/mach-highlander/Kconfig b/arch/sh/boards/mach-highlander/Kconfig
index 08057f62687b..def49cc0a7b9 100644
--- a/arch/sh/boards/mach-highlander/Kconfig
+++ b/arch/sh/boards/mach-highlander/Kconfig
@@ -18,7 +18,7 @@ config SH_R7780MP
config SH_R7785RP
bool "R7785RP board support"
depends on CPU_SUBTYPE_SH7785
- select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
endchoice
diff --git a/arch/sh/boards/mach-hp6xx/pm_wakeup.S b/arch/sh/boards/mach-hp6xx/pm_wakeup.S
index 44b648cf6f23..4f18d44e0541 100644
--- a/arch/sh/boards/mach-hp6xx/pm_wakeup.S
+++ b/arch/sh/boards/mach-hp6xx/pm_wakeup.S
@@ -10,47 +10,32 @@
#include <linux/linkage.h>
#include <cpu/mmu_context.h>
-#define k0 r0
-#define k1 r1
-#define k2 r2
-#define k3 r3
-#define k4 r4
-
/*
* Kernel mode register usage:
* k0 scratch
* k1 scratch
- * k2 scratch (Exception code)
- * k3 scratch (Return address)
- * k4 scratch
- * k5 reserved
- * k6 Global Interrupt Mask (0--15 << 4)
- * k7 CURRENT_THREAD_INFO (pointer to current thread info)
+ * For more details, please have a look at entry.S
*/
+#define k0 r0
+#define k1 r1
+
ENTRY(wakeup_start)
! clear STBY bit
- mov #-126, k2
+ mov #-126, k1
and #127, k0
- mov.b k0, @k2
+ mov.b k0, @k1
! enable refresh
mov.l 5f, k1
mov.w 6f, k0
mov.w k0, @k1
! jump to handler
- mov.l 2f, k2
- mov.l 3f, k3
- mov.l @k2, k2
-
mov.l 4f, k1
jmp @k1
- nop
+ nop
.align 2
-1: .long EXPEVT
-2: .long INTEVT
-3: .long ret_from_irq
-4: .long handle_exception
+4: .long handle_interrupt
5: .long 0xffffff68
6: .word 0x0524
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index 746742bdc014..8f305b36358b 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -115,7 +115,6 @@ static struct sh_machine_vector mv_hp6xx __initmv = {
.mv_setup = hp6xx_setup,
/* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */
.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6,
- .mv_irq_demux = hd64461_irq_demux,
/* Enable IRQ0 -> IRQ3 in IRQ_MODE */
.mv_init_irq = hp6xx_init_irq,
};
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 28e56c5809a2..bc35b4cae6b3 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -450,6 +450,14 @@ static struct spi_board_info migor_spi_devices[] = {
static int __init migor_devices_setup(void)
{
+
+#ifdef CONFIG_PM
+ /* Let D11 LED show STATUS0 */
+ gpio_request(GPIO_FN_STATUS0, NULL);
+
+ /* Lit D12 LED show PDSTATUS */
+ gpio_request(GPIO_FN_PDSTATUS, NULL);
+#else
/* Lit D11 LED */
gpio_request(GPIO_PTJ7, NULL);
gpio_direction_output(GPIO_PTJ7, 1);
@@ -459,6 +467,7 @@ static int __init migor_devices_setup(void)
gpio_request(GPIO_PTJ5, NULL);
gpio_direction_output(GPIO_PTJ5, 1);
gpio_export(GPIO_PTJ5, 0);
+#endif
/* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
gpio_request(GPIO_FN_IRQ0, NULL);
diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig
index bff095dffc02..aeff3b042205 100644
--- a/arch/sh/boards/mach-rsk/Kconfig
+++ b/arch/sh/boards/mach-rsk/Kconfig
@@ -10,7 +10,7 @@ config SH_RSK7201
config SH_RSK7203
bool "RSK7203"
- select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
depends on CPU_SUBTYPE_SH7203
endchoice
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index 6f926fd2162b..390534a0b35c 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -63,15 +63,19 @@ static struct platform_device sh7763rdp_nor_flash_device = {
},
};
-/* SH-Ether */
+/*
+ * SH-Ether
+ *
+ * SH Ether of SH7763 has multi IRQ handling.
+ * (57,58,59 -> 57)
+ */
static struct resource sh_eth_resources[] = {
{
.start = 0xFEE00800, /* use eth1 */
.end = 0xFEE00F7C - 1,
.flags = IORESOURCE_MEM,
}, {
- .start = 58, /* irq number */
- .end = 58,
+ .start = 57, /* irq number */
.flags = IORESOURCE_IRQ,
},
};