diff options
Diffstat (limited to 'arch')
| -rwxr-xr-x | arch/arm/mach-mx6/clock_mx6sl.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/clock_mx6sl.c b/arch/arm/mach-mx6/clock_mx6sl.c index 2abdaa5afc1d..8fab0f287ecd 100755 --- a/arch/arm/mach-mx6/clock_mx6sl.c +++ b/arch/arm/mach-mx6/clock_mx6sl.c @@ -448,6 +448,11 @@ static int _clk_pll_enable(struct clk *clk) SPIN_DELAY)) panic("pll enable failed\n"); + /* Enable the PLL output now*/ + reg = __raw_readl(pllbase); + reg |= ANADIG_PLL_ENABLE; + __raw_writel(reg, pllbase); + return 0; } @@ -470,6 +475,13 @@ static void _clk_pll_disable(struct clk *clk) if (clk == &pll3_usb_otg_main_clk || clk == &pll7_usb_host_main_clk) reg &= ~ANADIG_PLL_POWER_DOWN; + /* PLL1, PLL2, PLL3, PLL7 should not disable the ENABLE bit. + * The output of these PLLs maybe used even if they are bypassed. + */ + if (clk == &pll4_audio_main_clk || clk == &pll5_video_main_clk || + clk == &pll6_enet_main_clk) + reg &= ~ANADIG_PLL_ENABLE; + __raw_writel(reg, pllbase); /* |