diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-imx/pm-imx6.c | 25 | ||||
-rw-r--r-- | arch/arm/mach-imx/suspend-imx6.S | 33 |
2 files changed, 28 insertions, 30 deletions
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index bbe449f52046..56341fba6d51 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -423,11 +423,10 @@ static const u32 imx6ul_mmdc_lpddr2_offset[] __initconst = { }; static const u32 imx6sll_mmdc_io_offset[] __initconst = { - 0x30c, 0x310, 0x314, 0x318, /* DQM0 ~ DQM3 */ - 0x5c4, 0x5cc, 0x5d4, 0x5d8, /* GPR_B0DS ~ GPR_B3DS */ - 0x300, 0x31c, 0x338, 0x5ac, /* CAS, RAS, SDCLK_0, GPR_ADDS */ - 0x33c, 0x340, 0x5b0, 0x5c0, /* SODT0, SODT1, MODE_CTL, MODE */ - 0x330, 0x334, 0x320, /* SDCKE0, SDCKE1, RESET */ + 0x294, 0x298, 0x29c, 0x2a0, /* DQM0 ~ DQM3 */ + 0x544, 0x54c, 0x554, 0x558, /* GPR_B0DS ~ GPR_B3DS */ + 0x530, 0x540, 0x2ac, 0x52c, /* MODE_CTL, MODE, SDCLK_0, GPR_ADDDS */ + 0x2a4, 0x2a8, /* SDCKE0, SDCKE1*/ }; static const u32 imx6sll_mmdc_lpddr3_offset[] __initconst = { @@ -598,7 +597,7 @@ struct imx6_cpu_pm_info { struct imx6_pm_base anatop_base; u32 ttbr1; /* Store TTBR1 */ u32 mmdc_io_num; /* Number of MMDC IOs which need saved/restored. */ - u32 mmdc_io_val[MX6_MAX_MMDC_IO_NUM][2]; /* To save offset and value */ + u32 mmdc_io_val[MX6_MAX_MMDC_IO_NUM][3]; /* To save offset, value, low power settings */ u32 mmdc_num; /* Number of MMDC registers which need saved/restored. */ u32 mmdc_val[MX6_MAX_MMDC_NUM][2]; } __aligned(8); @@ -1122,6 +1121,20 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) pm_info->mmdc_io_val[i][1] = readl_relaxed(pm_info->iomuxc_base.vbase + mmdc_io_offset_array[i]); + pm_info->mmdc_io_val[i][2] = 0; + } + + /* i.MX6SLL has no DRAM RESET pin */ + if (cpu_is_imx6sll()) { + pm_info->mmdc_io_val[pm_info->mmdc_io_num - 2][2] = 0x1000; + pm_info->mmdc_io_val[pm_info->mmdc_io_num - 1][2] = 0x1000; + } else { + if (pm_info->ddr_type == IMX_DDR_TYPE_LPDDR2) { + /* for LPDDR2, CKE0/1 and RESET pin need special setting */ + pm_info->mmdc_io_val[pm_info->mmdc_io_num - 3][2] = 0x1000; + pm_info->mmdc_io_val[pm_info->mmdc_io_num - 2][2] = 0x1000; + pm_info->mmdc_io_val[pm_info->mmdc_io_num - 1][2] = 0x80000; + } } /* initialize MMDC settings */ diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S index d14c9e8c6254..c50fefcfe14c 100644 --- a/arch/arm/mach-imx/suspend-imx6.S +++ b/arch/arm/mach-imx/suspend-imx6.S @@ -67,8 +67,8 @@ #define PM_INFO_MMDC_IO_NUM_OFFSET 0x54 #define PM_INFO_MMDC_IO_VAL_OFFSET 0x58 /* below offsets depends on MX6_MAX_MMDC_IO_NUM(36) definition */ -#define PM_INFO_MMDC_NUM_OFFSET 0x178 -#define PM_INFO_MMDC_VAL_OFFSET 0x17C +#define PM_INFO_MMDC_NUM_OFFSET 0x208 +#define PM_INFO_MMDC_VAL_OFFSET 0x20C #define MX6Q_SRC_GPR1 0x20 #define MX6Q_SRC_GPR2 0x24 @@ -253,7 +253,7 @@ add r7, r7, r0 10: ldr r8, [r7], #0x4 - ldr r9, [r7], #0x4 + ldr r9, [r7], #0x8 str r9, [r10, r8] subs r6, r6, #0x1 bne 10b @@ -284,7 +284,7 @@ add r7, r7, r0 11: ldr r8, [r7], #0x4 - ldr r9, [r7], #0x4 + ldr r9, [r7], #0x8 str r9, [r10, r8] subs r6, r6, #0x1 bne 11b @@ -542,31 +542,16 @@ poll_dvfs_set_ch1: skip_self_refresh_ch1: /* use r11 to store the IO address */ ldr r11, [r0, #PM_INFO_MX6Q_IOMUXC_V_OFFSET] - ldr r6, =0x0 - ldr r7, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET] + ldr r6, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET] ldr r8, =PM_INFO_MMDC_IO_VAL_OFFSET add r8, r8, r0 - /* LPDDR2's last 3 IOs need special setting */ - cmp r3, #IMX_DDR_TYPE_LPDDR2 - subeq r7, r7, #0x3 set_mmdc_io_lpm: - ldr r9, [r8], #0x8 - str r6, [r11, r9] - subs r7, r7, #0x1 + ldr r7, [r8], #0x8 + ldr r9, [r8], #0x4 + str r9, [r11, r7] + subs r6, r6, #0x1 bne set_mmdc_io_lpm - cmp r3, #IMX_DDR_TYPE_LPDDR2 - bne set_mmdc_io_lpm_done - ldr r6, =0x1000 - ldr r9, [r8], #0x8 - str r6, [r11, r9] - ldr r9, [r8], #0x8 - str r6, [r11, r9] - ldr r6, =0x80000 - ldr r9, [r8] - str r6, [r11, r9] -set_mmdc_io_lpm_done: - /* check whether it supports Mega/Fast off */ ldr r6, [r0, #PM_INFO_MMDC_NUM_OFFSET] cmp r6, #0x0 |