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-rw-r--r--arch/arm/mach-mvf/Kconfig1
-rw-r--r--arch/arm/mach-mvf/board-twr-vf700.c2
-rw-r--r--arch/arm/mach-mvf/clock.c10
-rw-r--r--arch/arm/mach-mvf/devices-mvf.h4
-rwxr-xr-xarch/arm/plat-mxc/devices/Kconfig4
-rwxr-xr-xarch/arm/plat-mxc/devices/Makefile1
-rw-r--r--arch/arm/plat-mxc/devices/platform-mvf-caam.c107
-rwxr-xr-xarch/arm/plat-mxc/include/mach/devices-common.h17
-rw-r--r--arch/arm/plat-mxc/include/mach/mvf.h16
9 files changed, 156 insertions, 6 deletions
diff --git a/arch/arm/mach-mvf/Kconfig b/arch/arm/mach-mvf/Kconfig
index 10ec5b6307df..931ef6af6dd4 100644
--- a/arch/arm/mach-mvf/Kconfig
+++ b/arch/arm/mach-mvf/Kconfig
@@ -54,6 +54,7 @@ config MACH_MVFA5_TWR_VF700
select IMX_HAVE_PLATFORM_MVF_DCU
select IMX_HAVE_PLATFORM_MVF_SAI
select IMX_HAVE_PLATFORM_MXC_NAND
+ select IMX_HAVE_PLATFORM_MVF_CAAM
help
Include support for MVF TWR-VF700 platform. This includes specific
configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mvf/board-twr-vf700.c b/arch/arm/mach-mvf/board-twr-vf700.c
index d64622b2db19..01fd4dc364cc 100644
--- a/arch/arm/mach-mvf/board-twr-vf700.c
+++ b/arch/arm/mach-mvf/board-twr-vf700.c
@@ -471,6 +471,8 @@ static void __init mvf_board_init(void)
mvf_add_pm_imx(0, &mvf_vf600_pm_data);
+ mvf700_add_caam();
+
mvf_add_sdhci_esdhc_imx(1, &mvfa5_sd1_data);
mvf_add_imx_i2c(0, &mvf600_i2c_data);
diff --git a/arch/arm/mach-mvf/clock.c b/arch/arm/mach-mvf/clock.c
index 16d86fb73368..5ac0ff1766fb 100644
--- a/arch/arm/mach-mvf/clock.c
+++ b/arch/arm/mach-mvf/clock.c
@@ -1613,6 +1613,14 @@ static struct clk clko2_clk = {
.get_rate = _clk_clko2_get_rate,
.round_rate = _clk_clko_round_rate,
};
+static struct clk caam_clk = {
+ __INIT_CLK_DEBUG(caam_clk)
+ .parent = &ipg_clk,
+ .enable_reg = MXC_CCM_CCGR11,
+ .enable_shift = MXC_CCM_CCGRx_CG0_OFFSET,
+ .enable = _clk_enable,
+ .disable = _clk_disable,
+};
static struct clk pit_clk = {
__INIT_CLK_DEBUG(pit_clk)
@@ -1912,10 +1920,10 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("mvf-qspi.0", NULL, qspi0_clk),
_REGISTER_CLOCK(NULL, "asrc_clk", asrc_clk[0]),
_REGISTER_CLOCK(NULL, "asrc_serial_clk", asrc_clk[1]),
+ _REGISTER_CLOCK(NULL, "caam_clk", caam_clk),
};
static void clk_tree_init(void)
-
{
unsigned int reg = 0xffffffff;
diff --git a/arch/arm/mach-mvf/devices-mvf.h b/arch/arm/mach-mvf/devices-mvf.h
index 6bc61871fd5e..c434834ba0b2 100644
--- a/arch/arm/mach-mvf/devices-mvf.h
+++ b/arch/arm/mach-mvf/devices-mvf.h
@@ -224,3 +224,7 @@ extern const struct imx_epdc_data mvf_epdc_data __initconst;
#define mvf_add_pwm_leds(pdata) \
imx_add_platform_device("leds_pwm", 0, NULL, 0, pdata, sizeof(*pdata))
+
+extern const struct mvf_caam_data mvf_caam_data __initconst;
+#define mvf700_add_caam() \
+ mvf_add_caam(&mvf_caam_data)
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
index 22e160789d06..42a52220383e 100755
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -41,6 +41,10 @@ config IMX_HAVE_PLATFORM_IMX_SRTC
config IMX_HAVE_PLATFORM_IMX_SNVS_RTC
bool
+config IMX_HAVE_PLATFORM_MVF_CAAM
+ bool
+ default y if SOC_MVFA5
+
config IMX_HAVE_PLATFORM_IMX_FB
bool
select HAVE_FB_IMX
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
index 45d9869bd730..807de8385db0 100755
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/plat-mxc/devices/Makefile
@@ -65,3 +65,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_SPI) += platform-mvf-spi.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_ADC) += platform-mvf-adc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_DCU) += platform-mvf-dcu.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_SAI) += platform-mvf-sai.o
+obj-$(CONFIG_IMX_HAVE_PLATFORM_MVF_CAAM) += platform-mvf-caam.o
diff --git a/arch/arm/plat-mxc/devices/platform-mvf-caam.c b/arch/arm/plat-mxc/devices/platform-mvf-caam.c
new file mode 100644
index 000000000000..0f716911698f
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mvf-caam.c
@@ -0,0 +1,107 @@
+/*
+ * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <asm/sizes.h>
+#include <mach/hardware.h>
+#include <mach/devices-common.h>
+
+/*
+ * security violation interrupt is used as CAAM base _INT_SNVS_SEC
+ * SNVS consolidated = _INT_SNVS
+ * JR0 = MXC_INT_CAAM_INT0_NUM
+ * JR1 = MXC_INT_CAAM_INT1_NUM
+ */
+
+const struct mvf_caam_data mvf_caam_data __initconst = {
+ .iobase_caam = MVF_CAAM_BASE_ADDR,
+ .iobase_caam_sm = MVF_CAAM_SECMEM_BASE_ADDR,
+ .iobase_snvs = MVF_SNVS_BASE_ADDR,
+ .irq_sec_vio = MVF_INT_SNVS_SEC,
+ .irq_snvs = MVF_INT_SNVS,
+ .jr[0].offset_jr = 0x1000,
+ .jr[0].irq_jr = MVF_INT_CAAM,
+ .jr[1].offset_jr = 0x2000,
+ .jr[1].irq_jr = MVF_INT_CAAM,
+};
+
+struct platform_device *__init mvf_add_caam(
+ const struct mvf_caam_data *data)
+{
+ u32 res_count = 0;
+ struct resource res[] = {
+ {
+ /* Define base range for entire CAAM register map */
+ .name = "iobase_caam",
+ .start = data->iobase_caam,
+ .end = data->iobase_caam + ((SZ_32K + SZ_4K) - 1),
+ .flags = IORESOURCE_MEM,
+ }, {
+ /* Define range for secure memory */
+ .name = "iobase_caam_sm",
+ .start = data->iobase_caam_sm,
+ .end = data->iobase_caam_sm + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ /* Define range for SNVS */
+ .name = "iobase_snvs",
+ .start = data->iobase_snvs,
+ .end = data->iobase_snvs + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ /* Define interrupt for security violations */
+ .name = "irq_sec_vio",
+ .start = data->irq_sec_vio,
+ .end = data->irq_sec_vio,
+ .flags = IORESOURCE_IRQ,
+ }, {
+ /* Define general SNVS interrupt */
+ .name = "irq_snvs",
+ .start = data->irq_snvs,
+ .end = data->irq_snvs,
+ .flags = IORESOURCE_IRQ,
+ }, {
+ .name = "offset_jr0",
+ .start = data->jr[0].offset_jr,
+ .end = data->jr[0].offset_jr,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .name = "irq_jr0",
+ .start = data->jr[0].irq_jr,
+ .end = data->jr[0].irq_jr,
+ .flags = IORESOURCE_IRQ,
+ }, {
+ .name = "offset_jr1",
+ .start = data->jr[1].offset_jr,
+ .end = data->jr[1].offset_jr,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .name = "irq_jr1",
+ .start = data->jr[1].irq_jr,
+ .end = data->jr[1].irq_jr,
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+
+ res_count = ARRAY_SIZE(res);
+ BUG_ON(!res_count);
+
+ return imx_add_platform_device("caam", 0,
+ res, ARRAY_SIZE(res), NULL, 0);
+}
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index 3cdcceaea09f..0e2a2a1d13e9 100755
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -681,3 +681,20 @@ struct imx_rngb_data {
struct platform_device *__init imx_add_rngb(
const struct imx_rngb_data *data);
+
+struct mvf_caam_jr_data {
+ resource_size_t offset_jr;
+ resource_size_t irq_jr;
+};
+
+struct mvf_caam_data {
+ resource_size_t iobase_caam; /* entirety of CAAM register map */
+ resource_size_t iobase_caam_sm; /* base of secure memory */
+ resource_size_t iobase_snvs; /* base of SNVS */
+ resource_size_t irq_sec_vio; /* SNVS security violation */
+ resource_size_t irq_snvs; /* SNVS consolidated (incl. RTC) */
+ struct mvf_caam_jr_data jr[4]; /* offset+IRQ for each possible ring */
+};
+
+struct platform_device *__init mvf_add_caam(
+ const struct mvf_caam_data *data);
diff --git a/arch/arm/plat-mxc/include/mach/mvf.h b/arch/arm/plat-mxc/include/mach/mvf.h
index 6512c4e2bac6..838eef400e95 100644
--- a/arch/arm/plat-mxc/include/mach/mvf.h
+++ b/arch/arm/plat-mxc/include/mach/mvf.h
@@ -176,6 +176,11 @@
#define MVF_SRC_BASE_ADDR (MVF_AIPS0_BASE_ADDR + 0x0006E000)
#define MVF_CMU_BASE_ADDR (MVF_AIPS1_BASE_ADDR + 0x0006F000)
+#define MVF_CAAM_SECMEM_BASE_ADDR \
+ (MVF_AIPS0_BASE_ADDR + 0x0007C000)
+#define MVF_CAAM_SECMEM_END_ADDR \
+ (MVF_AIPS0_BASE_ADDR + 0x0007FFFF)
+
#define L2_BASE_ADDR MVF_L2C_BASE_ADDR
#define MVF_USBC0_CTRL_BASE_ADDR 0x40034800
@@ -563,15 +568,16 @@
#define MVF_INT_ESAI_BIFIFO 120
#define MVF_INT_SPDIF 121
#define MVF_INT_ASRC 122
-#define MVF_INT_CMU 123
+#define MVF_INT_CMU 123
#define MVF_INT_WKPU0 124
#define MVF_INT_WKPU1 125
-#define MVF_INT_CCM 126
+#define MVF_INT_CCM 126
-#define MVF_INT_SRC 128
-#define MVF_INT_PDB 129
-#define MVF_INT_EWM 130
+#define MVF_INT_SRC 128
+#define MVF_INT_PDB 129
+#define MVF_INT_EWM 130
#define MVF_INT_SNVS 132
+#define MVF_INT_SNVS_SEC 133
#define MVF_INT_CAAM 134