6 files changed, 22 insertions, 16 deletions

diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index b9bd5938d44a..b4a3d4a6e924 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -82,6 +82,8 @@ static void clk_gate2_do_shared_clks(struct clk_hw *hw, bool enable)
 		clk_gate2_do_hardware(gate, enable);
 
 		imx_sema4_mutex_unlock(amp_power_mutex);
+#else
+		clk_gate2_do_hardware(gate, enable);
 #endif
 	} else {
 		clk_gate2_do_hardware(gate, enable);
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 3d918b281927..d8f12816deb2 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -20,6 +20,8 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/phy.h>
 #include <soc/imx/revision.h>
 #include <dt-bindings/clock/imx6qdl-clock.h>
 
@@ -490,7 +492,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
 	void __iomem *anatop_base, *base;
-	int i;
+	int i, phy_mode;
 	u32 val;
 
 	clk[IMX6QDL_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
@@ -1050,8 +1052,15 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 		imx_clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]);
 	}
 
-	/*Set enet_ref clock to 125M to supply for RGMII tx_clk */
-	clk_set_rate(clk[IMX6QDL_CLK_ENET_REF], 125000000);
+	/*Set enet_ref clock to 125M to supply for RGMII tx_clk or to 50M for RMII */
+	phy_mode = PHY_INTERFACE_MODE_RGMII;
+	np = of_find_node_by_name(NULL, "ethernet");
+	if (of_device_is_available(np))
+		phy_mode = of_get_phy_mode(np);
+	else
+		phy_mode = PHY_INTERFACE_MODE_RGMII;
+	of_node_put(np);
+	clk_set_rate(clk[IMX6QDL_CLK_ENET_REF], phy_mode != PHY_INTERFACE_MODE_RMII ?  125000000 : 50000000);
 
 #ifdef CONFIG_MX6_VPU_352M
 	/*
diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
index 2b91f04b982a..b008263deefc 100644
--- a/drivers/clk/imx/clk-imx6ul.c
+++ b/drivers/clk/imx/clk-imx6ul.c
@@ -78,6 +78,7 @@ static int const clks_init_on[] __initconst = {
 	IMX6UL_CLK_AIPSTZ1, IMX6UL_CLK_AIPSTZ2, IMX6UL_CLK_AIPSTZ3,
 	IMX6UL_CLK_AXI, IMX6UL_CLK_ARM, IMX6UL_CLK_ROM,
 	IMX6UL_CLK_MMDC_P0_FAST, IMX6UL_CLK_MMDC_P0_IPG,
+	IMX6UL_CLK_OCOTP
 };
 
 static struct clk_div_table clk_enet_ref_table[] = {
diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
index 0b98e03b1741..e644ec28a525 100644
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -384,10 +384,11 @@ static const char *pll_video_bypass_sel[] = { "pll_video_main", "pll_video_main_
 
 static int const clks_init_on[] __initconst = {
 	IMX7D_ARM_A7_ROOT_CLK, IMX7D_MAIN_AXI_ROOT_CLK,
-	IMX7D_PLL_SYS_MAIN_480M_CLK,
+	IMX7D_PLL_SYS_MAIN_480M_CLK, IMX7D_NAND_USDHC_BUS_ROOT_CLK,
 	IMX7D_DRAM_PHYM_ROOT_CLK, IMX7D_DRAM_ROOT_CLK,
 	IMX7D_DRAM_PHYM_ALT_ROOT_CLK, IMX7D_DRAM_ALT_ROOT_CLK,
 	IMX7D_AHB_CHANNEL_ROOT_CLK, IMX7D_IPG_ROOT_CLK,
+	IMX7D_PLL_SYS_MAIN_240M_CLK, IMX7D_OCOTP_CLK,
 };
 
 static struct clk_onecell_data clk_data;
@@ -872,6 +873,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
 	clks[IMX7D_ADC_ROOT_CLK] = imx_clk_gate4("adc_root_clk", "ipg_root_clk", base + 0x4200, 0);
 	clks[IMX7D_PXP_IPG_CLK] = imx_clk_gate2_shared2("pxp_ipg_clk", "ipg_root_clk", base + 0x44c0, 0, &share_count_pxp);
 	clks[IMX7D_PXP_AXI_CLK] = imx_clk_gate2_shared2("pxp_axi_clk", "main_axi_root_clk", base + 0x44c0, 0, &share_count_pxp);
+	clks[IMX7D_KPP_ROOT_CLK] = imx_clk_gate4("kpp_root_clk", "ipg_root_clk", base + 0x4aa0, 0);
 
 	clks[IMX7D_GPT_3M_CLK] = imx_clk_fixed_factor("gpt_3m", "osc", 1, 8);
 
@@ -890,11 +892,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
 	for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
 		clk_prepare_enable(clks[clks_init_on[i]]);
 
-	if (imx_src_is_m4_enabled()) {
-		imx_clk_set_parent(clks[IMX7D_ARM_M4_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]);
-		imx_clk_prepare_enable(clks[IMX7D_ARM_M4_ROOT_CLK]);
-	}
-
 	imx_clk_set_parent(clks[IMX7D_PLL_ARM_MAIN_BYPASS], clks[IMX7D_PLL_ARM_MAIN]);
 	imx_clk_set_parent(clks[IMX7D_PLL_DRAM_MAIN_BYPASS], clks[IMX7D_PLL_DRAM_MAIN]);
 	imx_clk_set_parent(clks[IMX7D_PLL_SYS_MAIN_BYPASS], clks[IMX7D_PLL_SYS_MAIN]);
@@ -924,13 +921,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
 	/* set parent of SIM1 root clock */
 	imx_clk_set_parent(clks[IMX7D_SIM1_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_120M_CLK]);
 
-	imx_clk_set_parent(clks[IMX7D_UART3_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]);
-	imx_clk_set_rate(clks[IMX7D_UART3_ROOT_DIV], 80000000);
-	imx_clk_set_parent(clks[IMX7D_UART5_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]);
-	imx_clk_set_rate(clks[IMX7D_UART5_ROOT_DIV], 80000000);
-	imx_clk_set_parent(clks[IMX7D_UART6_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]);
-	imx_clk_set_rate(clks[IMX7D_UART6_ROOT_DIV], 80000000);
-
 	imx_register_uart_clocks(uart_clks);
 }
 CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init);
diff --git a/drivers/clk/imx/clk-pfd.c b/drivers/clk/imx/clk-pfd.c
index e29bd792522f..7bbae0c38178 100644
--- a/drivers/clk/imx/clk-pfd.c
+++ b/drivers/clk/imx/clk-pfd.c
@@ -76,6 +76,8 @@ static void clk_pfd_do_shared_clks(struct clk_hw *hw, bool enable)
 		clk_pfd_do_hardware(pfd, enable);
 
 		imx_sema4_mutex_unlock(amp_power_mutex);
+#else
+		clk_pfd_do_hardware(pfd, enable);
 #endif
 	} else {
 		clk_pfd_do_hardware(pfd, enable);
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index d8b481936f20..7cf1df9c19cd 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -128,6 +128,8 @@ static void clk_pllv3_do_shared_clks(struct clk_hw *hw, bool enable)
 		clk_pllv3_do_hardware(hw, enable);
 
 		imx_sema4_mutex_unlock(amp_power_mutex);
+#else
+		clk_pllv3_do_hardware(hw, enable);
 #endif
 	} else {
 		clk_pllv3_do_hardware(hw, enable);