diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device/base.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 94 |
1 files changed, 47 insertions, 47 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 8f201022377f..3734d1fb7756 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -463,7 +463,7 @@ nv40_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv04_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -488,7 +488,7 @@ nv41_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -513,7 +513,7 @@ nv42_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -538,7 +538,7 @@ nv43_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -563,7 +563,7 @@ nv44_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -588,7 +588,7 @@ nv45_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv04_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -613,7 +613,7 @@ nv46_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -638,7 +638,7 @@ nv47_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -663,7 +663,7 @@ nv49_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -688,7 +688,7 @@ nv4a_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -713,7 +713,7 @@ nv4b_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -738,7 +738,7 @@ nv4c_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -763,7 +763,7 @@ nv4e_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -791,7 +791,7 @@ nv50_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, -// .therm = nv50_therm_new, + .therm = nv50_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv50_disp_new, @@ -816,7 +816,7 @@ nv63_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -841,7 +841,7 @@ nv67_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -866,7 +866,7 @@ nv68_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, -// .therm = nv40_therm_new, + .therm = nv40_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = nv04_disp_new, @@ -894,7 +894,7 @@ nv84_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .bsp = g84_bsp_new, @@ -925,7 +925,7 @@ nv86_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .bsp = g84_bsp_new, @@ -956,7 +956,7 @@ nv92_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .bsp = g84_bsp_new, @@ -987,7 +987,7 @@ nv94_chipset = { .mc = g94_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .bsp = g84_bsp_new, @@ -1010,7 +1010,7 @@ nv96_chipset = { .i2c = g94_i2c_new, .fuse = nv50_fuse_new, .clk = g84_clk_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, .mxm = nv50_mxm_new, .devinit = g84_devinit_new, .mc = g94_mc_new, @@ -1041,7 +1041,7 @@ nv98_chipset = { .i2c = g94_i2c_new, .fuse = nv50_fuse_new, .clk = g84_clk_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, .mxm = nv50_mxm_new, .devinit = g98_devinit_new, .mc = g98_mc_new, @@ -1080,7 +1080,7 @@ nva0_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .bsp = g84_bsp_new, @@ -1112,7 +1112,7 @@ nva3_chipset = { .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pmu = gt215_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gt215_ce_new, @@ -1145,7 +1145,7 @@ nva5_chipset = { .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pmu = gt215_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gt215_ce_new, @@ -1177,7 +1177,7 @@ nva8_chipset = { .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pmu = gt215_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gt215_ce_new, @@ -1208,7 +1208,7 @@ nvaa_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = g94_disp_new, @@ -1239,7 +1239,7 @@ nvac_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, -// .therm = g84_therm_new, + .therm = g84_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .disp = g94_disp_new, @@ -1271,7 +1271,7 @@ nvaf_chipset = { .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pmu = gt215_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gt215_ce_new, @@ -1305,7 +1305,7 @@ nvc0_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf100_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gf100_ce0_new, @@ -1340,7 +1340,7 @@ nvc1_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf100_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gf100_ce0_new, @@ -1374,7 +1374,7 @@ nvc3_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf100_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gf100_ce0_new, @@ -1408,7 +1408,7 @@ nvc4_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf100_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gf100_ce0_new, @@ -1443,7 +1443,7 @@ nvc8_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf100_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gf100_ce0_new, @@ -1478,7 +1478,7 @@ nvce_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf100_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gf100_ce0_new, @@ -1513,7 +1513,7 @@ nvcf_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf100_pmu_new, -// .therm = gt215_therm_new, + .therm = gt215_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gf100_ce0_new, @@ -1546,7 +1546,7 @@ nvd7_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .ce[0] = gf100_ce0_new, // .disp = gf119_disp_new, @@ -1579,7 +1579,7 @@ nvd9_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf119_pmu_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gf100_ce0_new, @@ -1613,7 +1613,7 @@ nve4_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gk104_pmu_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gk104_ce0_new, @@ -1649,7 +1649,7 @@ nve6_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gk104_pmu_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gk104_ce0_new, @@ -1685,7 +1685,7 @@ nve7_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gf119_pmu_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gk104_ce0_new, @@ -1745,7 +1745,7 @@ nvf0_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gk110_pmu_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gk104_ce0_new, @@ -1781,7 +1781,7 @@ nvf1_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gk110_pmu_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gk104_ce0_new, @@ -1817,7 +1817,7 @@ nv106_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gk208_pmu_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gk104_ce0_new, @@ -1852,7 +1852,7 @@ nv108_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gk208_pmu_new, -// .therm = gf110_therm_new, + .therm = gf119_therm_new, // .timer = nv04_timer_new, // .volt = nv40_volt_new, // .ce[0] = gk104_ce0_new, @@ -1887,7 +1887,7 @@ nv117_chipset = { .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pmu = gm107_pmu_new, -// .therm = gm107_therm_new, + .therm = gm107_therm_new, // .timer = gk20a_timer_new, // .ce[0] = gk104_ce0_new, // .ce[2] = gk104_ce2_new, |