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-rw-r--r--drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.c17
-rw-r--r--drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.h2
-rw-r--r--drivers/media/platform/imx8/hdmi/mxc-hdmi-hw.c14
3 files changed, 24 insertions, 9 deletions
diff --git a/drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.c b/drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.c
index 77434120b003..19b8b7c5ee0e 100644
--- a/drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.c
+++ b/drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.c
@@ -216,7 +216,7 @@ u32 pma_rx_clk_freq_detect(state_struct *state)
return rx_clk_freq;
}
-void pma_pll_config(state_struct *state,
+u8 pma_pll_config(state_struct *state,
u32 rx_clk_freq,
clk_ratio_t clk_ratio,
tmds_bit_clock_ratio_t tmds_bit_clk_ratio,
@@ -1014,8 +1014,10 @@ void pma_pll_config(state_struct *state,
break;
msleep(10);
}
- if (i == 20)
- pr_info("pma_pll_ready failed\n");
+ if (i == 20) {
+ pr_err("pma_pll_ready failed\n");
+ return -1;
+ }
/* Turn on output clocks: */
/* PHY_PMA_CMN_CTRL2 */
@@ -1059,8 +1061,10 @@ void pma_pll_config(state_struct *state,
loop++;
} while (!reg_val && loop < 20);
/* Timeout */
- if (loop == 20)
+ if (loop == 20) {
pr_err("pma_pll_config() Waiting for xcvr_psm_ready... failed\n");
+ return -1;
+ }
/* Set A0 power state: */
/* PHY_MODE_CTL */
@@ -1080,8 +1084,10 @@ void pma_pll_config(state_struct *state,
break;
msleep(10);
}
- if (i == 20)
+ if (i == 20) {
pr_err("Waiting for A0 power mode acknowledged failed\n");
+ return -1;
+ }
if (data_rate_change) {
pr_info("pma_pll_config() Enable Rx Eq Training\n");
@@ -1093,6 +1099,7 @@ void pma_pll_config(state_struct *state,
reg_val);
}
}
+ return 0;
}
clk_ratio_t clk_ratio_detect(state_struct *state,
diff --git a/drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.h b/drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.h
index f8b9c867b75a..df46ee04899e 100644
--- a/drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.h
+++ b/drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.h
@@ -133,7 +133,7 @@ u8 pma_cmn_ready(state_struct *state);
u8 pma_rx_clk_signal_detect(state_struct *state);
u32 pma_rx_clk_freq_detect(state_struct *state);
void pre_data_rate_change(state_struct *state);
-void pma_pll_config(state_struct *state, u32, clk_ratio_t, tmds_bit_clock_ratio_t, unsigned char);
+u8 pma_pll_config(state_struct *state, u32, clk_ratio_t, tmds_bit_clock_ratio_t, unsigned char);
clk_ratio_t clk_ratio_detect(state_struct *state, u32, u32, u8, pixel_encoding_t, tmds_bit_clock_ratio_t);
void phy_status(state_struct *state);
diff --git a/drivers/media/platform/imx8/hdmi/mxc-hdmi-hw.c b/drivers/media/platform/imx8/hdmi/mxc-hdmi-hw.c
index 672a5a4c8800..d8ebd019c994 100644
--- a/drivers/media/platform/imx8/hdmi/mxc-hdmi-hw.c
+++ b/drivers/media/platform/imx8/hdmi/mxc-hdmi-hw.c
@@ -338,21 +338,29 @@ int hdmirx_startup(state_struct *state)
imx8qm_hdmi_phy_reset(state, 1);
ret = pma_cmn_ready(state);
- if (ret < 0)
+ if (ret < 0) {
pr_err("pma_cmn_ready failed\n");
+ return -1;
+ }
msleep(500);
arc_config(state);
ret = pma_rx_clk_signal_detect(state);
- if (ret < 0)
+ if (ret < 0) {
pr_err("pma_rx_clk_signal_detect failed\n");
+ return -1;
+ }
/* Get TMDS clock frequency */
rx_clk_freq = pma_rx_clk_freq_detect(state);
- pma_pll_config(state, rx_clk_freq, clk_ratio, tmds_bit_clock_ratio,
+ ret = pma_pll_config(state, rx_clk_freq, clk_ratio, tmds_bit_clock_ratio,
data_rate_change);
+ if (ret < 0) {
+ pr_err("pma_pll_config failed\n");
+ return -1;
+ }
msleep(500);
/* Setup the scrambling mode */