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path: root/drivers/mfd/twl4030-irq.c
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Diffstat (limited to 'drivers/mfd/twl4030-irq.c')
-rw-r--r--drivers/mfd/twl4030-irq.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
index b9fda7018cef..5d3a1478004b 100644
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl4030-irq.c
@@ -35,6 +35,7 @@
#include <linux/i2c/twl.h>
+#include "twl-core.h"
/*
* TWL4030 IRQ handling has two stages in hardware, and thus in software.
@@ -144,6 +145,7 @@ static const struct sih sih_modules_twl4030[6] = {
.name = "bci",
.module = TWL4030_MODULE_INTERRUPTS,
.control_offset = TWL4030_INTERRUPTS_BCISIHCTRL,
+ .set_cor = true,
.bits = 12,
.bytes_ixr = 2,
.edr_offset = TWL4030_INTERRUPTS_BCIEDR1,
@@ -408,7 +410,7 @@ static int twl4030_init_sih_modules(unsigned line)
* set Clear-On-Read (COR) bit.
*
* NOTE that sometimes COR polarity is documented as being
- * inverted: for MADC and BCI, COR=1 means "clear on write".
+ * inverted: for MADC, COR=1 means "clear on write".
* And for PWR_INT it's not documented...
*/
if (sih->set_cor) {