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path: root/drivers/mmc/host/dw_mmc-exynos.c
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Diffstat (limited to 'drivers/mmc/host/dw_mmc-exynos.c')
-rw-r--r--drivers/mmc/host/dw_mmc-exynos.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 25691cca1881..35026795be28 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -157,8 +157,8 @@ static void dw_mci_exynos_set_clksel_timing(struct dw_mci *host, u32 timing)
* HOLD register should be bypassed in case there is no phase shift
* applied on CMD/DATA that is sent to the card.
*/
- if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->cur_slot)
- set_bit(DW_MMC_CARD_NO_USE_HOLD, &host->cur_slot->flags);
+ if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot)
+ set_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags);
}
#ifdef CONFIG_PM