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path: root/drivers/mmc/host/sdhci-sirf.c
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Diffstat (limited to 'drivers/mmc/host/sdhci-sirf.c')
-rw-r--r--drivers/mmc/host/sdhci-sirf.c42
1 files changed, 10 insertions, 32 deletions
diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
index f6f82ec3618d..32848eb7ad80 100644
--- a/drivers/mmc/host/sdhci-sirf.c
+++ b/drivers/mmc/host/sdhci-sirf.c
@@ -20,17 +20,9 @@
#define SIRF_TUNING_COUNT 128
struct sdhci_sirf_priv {
- struct clk *clk;
int gpio_cd;
};
-static unsigned int sdhci_sirf_get_max_clk(struct sdhci_host *host)
-{
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
- return clk_get_rate(priv->clk);
-}
-
static void sdhci_sirf_set_bus_width(struct sdhci_host *host, int width)
{
u8 ctrl;
@@ -56,7 +48,7 @@ static int sdhci_sirf_execute_tuning(struct sdhci_host *host, u32 opcode)
int tuning_seq_cnt = 3;
u8 phase, tuned_phases[SIRF_TUNING_COUNT];
u8 tuned_phase_cnt = 0;
- int rc, longest_range = 0;
+ int rc = 0, longest_range = 0;
int start = -1, end = 0, tuning_value = -1, range = 0;
u16 clock_setting;
struct mmc_host *mmc = host->mmc;
@@ -68,7 +60,7 @@ retry:
phase = 0;
do {
sdhci_writel(host,
- clock_setting | phase | (phase << 7) | (phase << 16),
+ clock_setting | phase,
SDHCI_CLK_DELAY_SETTING);
if (!mmc_send_tuning(mmc)) {
@@ -102,7 +94,7 @@ retry:
*/
phase = tuning_value;
sdhci_writel(host,
- clock_setting | phase | (phase << 7) | (phase << 16),
+ clock_setting | phase,
SDHCI_CLK_DELAY_SETTING);
dev_dbg(mmc_dev(mmc), "%s: Setting the tuning phase to %d\n",
@@ -122,7 +114,7 @@ retry:
static struct sdhci_ops sdhci_sirf_ops = {
.platform_execute_tuning = sdhci_sirf_execute_tuning,
.set_clock = sdhci_set_clock,
- .get_max_clock = sdhci_sirf_get_max_clk,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
.set_bus_width = sdhci_sirf_set_bus_width,
.reset = sdhci_reset,
.set_uhs_signaling = sdhci_set_uhs_signaling,
@@ -162,13 +154,13 @@ static int sdhci_sirf_probe(struct platform_device *pdev)
return PTR_ERR(host);
pltfm_host = sdhci_priv(host);
+ pltfm_host->clk = clk;
priv = sdhci_pltfm_priv(pltfm_host);
- priv->clk = clk;
priv->gpio_cd = gpio_cd;
sdhci_get_of_property(pdev);
- ret = clk_prepare_enable(priv->clk);
+ ret = clk_prepare_enable(pltfm_host->clk);
if (ret)
goto err_clk_prepare;
@@ -195,37 +187,24 @@ static int sdhci_sirf_probe(struct platform_device *pdev)
err_request_cd:
sdhci_remove_host(host, 0);
err_sdhci_add:
- clk_disable_unprepare(priv->clk);
+ clk_disable_unprepare(pltfm_host->clk);
err_clk_prepare:
sdhci_pltfm_free(pdev);
return ret;
}
-static int sdhci_sirf_remove(struct platform_device *pdev)
-{
- struct sdhci_host *host = platform_get_drvdata(pdev);
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
-
- sdhci_pltfm_unregister(pdev);
-
- clk_disable_unprepare(priv->clk);
- return 0;
-}
-
#ifdef CONFIG_PM_SLEEP
static int sdhci_sirf_suspend(struct device *dev)
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
int ret;
ret = sdhci_suspend_host(host);
if (ret)
return ret;
- clk_disable(priv->clk);
+ clk_disable(pltfm_host->clk);
return 0;
}
@@ -234,10 +213,9 @@ static int sdhci_sirf_resume(struct device *dev)
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
int ret;
- ret = clk_enable(priv->clk);
+ ret = clk_enable(pltfm_host->clk);
if (ret) {
dev_dbg(dev, "Resume: Error enabling clock\n");
return ret;
@@ -264,7 +242,7 @@ static struct platform_driver sdhci_sirf_driver = {
#endif
},
.probe = sdhci_sirf_probe,
- .remove = sdhci_sirf_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(sdhci_sirf_driver);