diff options
Diffstat (limited to 'drivers/usb/host/xhci-tegra.c')
| -rw-r--r-- | drivers/usb/host/xhci-tegra.c | 39 |
1 files changed, 11 insertions, 28 deletions
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 93e6428f0028..91b232caaee4 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -192,10 +192,10 @@ struct xusb_save_regs { u32 cfg_fladj; u32 cfg_sid; /* DFE and CTLE */ - u32 tap1_val[3]; - u32 amp_val[3]; - u32 ctle_z_val[3]; - u32 ctle_g_val[3]; + u32 tap1_val[2]; + u32 amp_val[2]; + u32 ctle_z_val[2]; + u32 ctle_g_val[2]; }; struct tegra_xhci_firmware { @@ -1456,7 +1456,9 @@ static void tegra_xhci_save_dfe_ctle_context(struct tegra_xhci_hcd *tegra, xhci_info(xhci, "saving dfe_cntl and ctle context for port %d\n", port); - if (port == XUSB_SS_PORT_SATA /* SATA pad */) + /* if port1 is mapped to SATA lane then read from SATA register */ + if (port == 1 && XUSB_DEVICE_ID_T114 != tegra->device_id && + tegra->bdata->lane_owner & BIT(0)) offset = padregs->iophy_misc_pad_s0_ctl6_0; else offset = port ? padregs->iophy_misc_pad_p1_ctl6_0 : @@ -1512,15 +1514,10 @@ static void tegra_xhci_restore_dfe_ctle_context(struct tegra_xhci_hcd *tegra, if (tegra->dfe_ctle_ctx_saved == false) return; - if (port == XUSB_SS_PORT_SATA /* SATA pad */) { - ctl4_offset = padregs->iophy_misc_pad_s0_ctl4_0; - ctl2_offset = padregs->iophy_misc_pad_s0_ctl2_0; - } else { - ctl4_offset = port ? padregs->iophy_usb3_pad1_ctl4_0 : - padregs->iophy_usb3_pad0_ctl4_0; - ctl2_offset = port ? padregs->iophy_usb3_pad1_ctl2_0 : - padregs->iophy_usb3_pad0_ctl2_0; - } + ctl4_offset = port ? padregs->iophy_usb3_pad1_ctl4_0 : + padregs->iophy_usb3_pad0_ctl4_0; + ctl2_offset = port ? padregs->iophy_usb3_pad1_ctl2_0 : + padregs->iophy_usb3_pad0_ctl2_0; xhci_info(xhci, "restoring dfe_cntl/ctle context of port %d\n", port); @@ -1699,10 +1696,6 @@ static void tegra_xhci_program_ss_pad(struct tegra_xhci_hcd *tegra, writel(reg, tegra->padctl_base + padregs->ss_port_map_0); tegra_xhci_restore_dfe_ctle_context(tegra, port); - /* SATA also if USB3_SS port1 mapped to it */ - if ((port == 1) && (XUSB_DEVICE_ID_T114 != tegra->device_id) && - (tegra->bdata->lane_owner & BIT(0))) - tegra_xhci_restore_dfe_ctle_context(tegra, XUSB_SS_PORT_SATA); } /* This function assigns the USB ports to the controllers, @@ -2705,16 +2698,6 @@ tegra_xhci_process_mbox_message(struct work_struct *work) case MBOX_CMD_SAVE_DFE_CTLE_CTX: tegra_xhci_save_dfe_ctle_context(tegra, tegra->cmd_data); tegra_xhci_restore_dfe_ctle_context(tegra, tegra->cmd_data); - /* SATA lane also if USB3_SS port1 mapped to it */ - if (tegra->cmd_data == 0x1 && - XUSB_DEVICE_ID_T114 != tegra->device_id && - tegra->bdata->lane_owner & BIT(0)) { - tegra_xhci_save_dfe_ctle_context(tegra, - XUSB_SS_PORT_SATA); - tegra_xhci_restore_dfe_ctle_context(tegra, - XUSB_SS_PORT_SATA); - } - sw_resp |= tegra->cmd_data | (MBOX_CMD_ACK << MBOX_CMD_SHIFT); goto send_sw_response; case MBOX_CMD_ACK: |