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-rw-r--r--include/asm-mips/war.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index 9844f0c2dfee..3ac146c019c9 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -171,7 +171,8 @@
* On the RM9000 there is a problem which makes the CreateDirtyExclusive
* cache operation unusable on SMP systems.
*/
-#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_PMC_YOSEMITE)
+#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_PMC_YOSEMITE) || \
+ defined(CONFIG_BASLER_EXCITE)
#define RM9000_CDEX_SMP_WAR 1
#endif
@@ -181,7 +182,7 @@
* being fetched may case spurious exceptions.
*/
#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_MOMENCO_OCELOT_3) || \
- defined(CONFIG_PMC_YOSEMITE)
+ defined(CONFIG_PMC_YOSEMITE) || defined(CONFIG_BASLER_EXCITE)
#define ICACHE_REFILLS_WORKAROUND_WAR 1
#endif