diff options
Diffstat (limited to 'include/asm-sh/cpu-sh4')
| -rw-r--r-- | include/asm-sh/cpu-sh4/addrspace.h | 3 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh4/cache.h | 2 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh4/cacheflush.h | 36 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh4/dma-sh7780.h | 39 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh4/dma.h | 11 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh4/shmparam.h | 19 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh4/sq.h | 23 |
7 files changed, 69 insertions, 64 deletions
diff --git a/include/asm-sh/cpu-sh4/addrspace.h b/include/asm-sh/cpu-sh4/addrspace.h index 727634d886ce..bb2e1b03060c 100644 --- a/include/asm-sh/cpu-sh4/addrspace.h +++ b/include/asm-sh/cpu-sh4/addrspace.h @@ -22,5 +22,8 @@ #define P4SEG_TLB_DATA 0xf7000000 #define P4SEG_REG_BASE 0xff000000 +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ + #endif /* __ASM_CPU_SH4_ADDRSPACE_H */ diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h index 1fe20359312c..6e9c7e6ee8e4 100644 --- a/include/asm-sh/cpu-sh4/cache.h +++ b/include/asm-sh/cpu-sh4/cache.h @@ -22,7 +22,9 @@ #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ +#ifndef CONFIG_CPU_SUBTYPE_SH7780 #define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ +#endif /* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */ #define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE) diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h index f323567e085f..515fd574267c 100644 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ b/include/asm-sh/cpu-sh4/cacheflush.h @@ -16,40 +16,29 @@ * caching; in which case they're only semi-broken), * so we need them. */ - -/* Page is 4K, OC size is 16K, there are four lines. */ -#define CACHE_ALIAS 0x00003000 - -struct page; -struct mm_struct; -struct vm_area_struct; - -extern void flush_cache_all(void); -extern void flush_cache_mm(struct mm_struct *mm); -extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); -extern void flush_dcache_page(struct page *pg); +void flush_cache_all(void); +void flush_cache_mm(struct mm_struct *mm); +void flush_cache_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); +void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, + unsigned long pfn); +void flush_dcache_page(struct page *pg); #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) -extern void flush_icache_range(unsigned long start, unsigned long end); -extern void flush_cache_sigtramp(unsigned long addr); -extern void flush_icache_user_range(struct vm_area_struct *vma, - struct page *page, unsigned long addr, - int len); +void flush_icache_range(unsigned long start, unsigned long end); +void flush_cache_sigtramp(unsigned long addr); +void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, + unsigned long addr, int len); #define flush_icache_page(vma,pg) do { } while (0) /* Initialization of P3 area for copy_user_page */ -extern void p3_cache_init(void); +void p3_cache_init(void); #define PG_mapped PG_arch_1 -/* We provide our own get_unmapped_area to avoid cache alias issue */ -#define HAVE_ARCH_UNMAPPED_AREA - #ifdef CONFIG_MMU extern int remap_area_pages(unsigned long addr, unsigned long phys_addr, unsigned long size, unsigned long flags); @@ -61,4 +50,3 @@ static inline int remap_area_pages(unsigned long addr, unsigned long phys_addr, } #endif /* CONFIG_MMU */ #endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ - diff --git a/include/asm-sh/cpu-sh4/dma-sh7780.h b/include/asm-sh/cpu-sh4/dma-sh7780.h new file mode 100644 index 000000000000..6c90d28331b2 --- /dev/null +++ b/include/asm-sh/cpu-sh4/dma-sh7780.h @@ -0,0 +1,39 @@ +#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H +#define __ASM_SH_CPU_SH4_DMA_SH7780_H + +#define REQ_HE 0x000000C0 +#define REQ_H 0x00000080 +#define REQ_LE 0x00000040 +#define TM_BURST 0x0000020 +#define TS_8 0x00000000 +#define TS_16 0x00000008 +#define TS_32 0x00000010 +#define TS_16BLK 0x00000018 +#define TS_32BLK 0x00100000 + +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + * + * Defaults to a 64-bit transfer size. + */ +enum { + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_128BIT, + XMIT_SZ_256BIT, +}; + +/* + * The DMA count is defined as the number of bytes to transfer. + */ +static unsigned int __attribute__ ((used)) ts_shift[] = { + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + [XMIT_SZ_128BIT] = 4, + [XMIT_SZ_256BIT] = 5, +}; + +#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h index 0dfe61f14802..3e4b3e6d80c0 100644 --- a/include/asm-sh/cpu-sh4/dma.h +++ b/include/asm-sh/cpu-sh4/dma.h @@ -1,11 +1,17 @@ #ifndef __ASM_CPU_SH4_DMA_H #define __ASM_CPU_SH4_DMA_H +#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) + #ifdef CONFIG_CPU_SH4A #define SH_DMAC_BASE 0xfc808020 + +#define CHCR_TS_MASK 0x18 +#define CHCR_TS_SHIFT 3 + +#include <asm/cpu/dma-sh7780.h> #else #define SH_DMAC_BASE 0xffa00000 -#endif /* Definitions for the SuperH DMAC */ #define TM_BURST 0x0000080 @@ -19,8 +25,6 @@ #define DMAOR_COD 0x00000008 -#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) - /* * The SuperH DMAC supports a number of transmit sizes, we list them here, * with their respective values as they appear in the CHCR registers. @@ -45,5 +49,6 @@ static unsigned int ts_shift[] __attribute__ ((used)) = { [XMIT_SZ_32BIT] = 2, [XMIT_SZ_256BIT] = 5, }; +#endif #endif /* __ASM_CPU_SH4_DMA_H */ diff --git a/include/asm-sh/cpu-sh4/shmparam.h b/include/asm-sh/cpu-sh4/shmparam.h deleted file mode 100644 index a5a0aa9425fe..000000000000 --- a/include/asm-sh/cpu-sh4/shmparam.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/shmparam.h - * - * Copyright (C) 1999 Niibe Yutaka - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_SHMPARAM_H -#define __ASM_CPU_SH4_SHMPARAM_H - -/* - * SH-4 has D-cache alias issue - */ -#define SHMLBA (PAGE_SIZE*4) /* attach addr a multiple of this */ - -#endif /* __ASM_CPU_SH4_SHMPARAM_H */ - diff --git a/include/asm-sh/cpu-sh4/sq.h b/include/asm-sh/cpu-sh4/sq.h index 366b09166d3b..586d6491816a 100644 --- a/include/asm-sh/cpu-sh4/sq.h +++ b/include/asm-sh/cpu-sh4/sq.h @@ -17,7 +17,7 @@ * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be * mapped to any physical address space. Since data is written (and aligned) * to 32-byte boundaries, we need to be sure that all allocations are aligned. - */ + */ #define SQ_SIZE 32 #define SQ_ALIGN_MASK (~(SQ_SIZE - 1)) #define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK) @@ -26,23 +26,10 @@ #define SQ_QACR1 (P4SEG_REG_BASE + 0x3c) #define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000) -struct sq_mapping { - const char *name; - - unsigned long sq_addr; - unsigned long addr; - unsigned int size; - - struct list_head list; -}; - /* arch/sh/kernel/cpu/sh4/sq.c */ -extern struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name); -extern void sq_unmap(struct sq_mapping *map); - -extern void sq_clear(unsigned long addr, unsigned int len); -extern void sq_flush(void *addr); -extern void sq_flush_range(unsigned long start, unsigned int len); +unsigned long sq_remap(unsigned long phys, unsigned int size, + const char *name, unsigned long flags); +void sq_unmap(unsigned long vaddr); +void sq_flush_range(unsigned long start, unsigned int len); #endif /* __ASM_CPU_SH4_SQ_H */ - |