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-rw-r--r--include/linux/clk/tegra.h49
1 files changed, 49 insertions, 0 deletions
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index 642789baec74..735a6d17571c 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -120,9 +120,58 @@ static inline void tegra_cpu_clock_resume(void)
}
#endif
+enum tegra_clk_ex_param {
+ TEGRA_CLK_VI_INP_SEL,
+ TEGRA_CLK_DTV_INVERT,
+ TEGRA_CLK_NAND_PAD_DIV2_ENB,
+ TEGRA_CLK_PLLD_CSI_OUT_ENB,
+ TEGRA_CLK_PLLD_DSI_OUT_ENB,
+ TEGRA_CLK_PLLD_MIPI_MUX_SEL,
+};
+
void tegra_periph_reset_deassert(struct clk *c);
void tegra_periph_reset_assert(struct clk *c);
+
+#ifdef CONFIG_COMMON_CLK
void tegra_clocks_init(void);
void tegra_clocks_apply_init_table(void);
+static inline int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting)
+{
+ return -EINVAL;
+}
+#else
+static inline void tegra_clocks_init(void)
+{}
+static inline void tegra_clocks_apply_init_table(void)
+{}
+
+struct dvfs;
+struct notifier_block;
+
+#ifdef CONFIG_TEGRA_SILICON_PLATFORM
+int tegra_dvfs_set_rate(struct clk *c, unsigned long rate);
+#else
+static inline int tegra_dvfs_set_rate(struct clk *c, unsigned long rate)
+{ return 0; }
+#endif
+unsigned long clk_get_rate_all_locked(struct clk *c);
+int tegra_dvfs_rail_disable_by_name(const char *reg_id);
+int tegra_register_clk_rate_notifier(struct clk *c, struct notifier_block *nb);
+void tegra_unregister_clk_rate_notifier(
+ struct clk *c, struct notifier_block *nb);
+int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting);
+
+/**
+ * tegra_is_clk_enabled - get info if the clk is enabled or not
+ * @clk: clock source
+ *
+ * Returns refcnt.
+ */
+int tegra_is_clk_enabled(struct clk *clk);
+
+void tegra_cpu_user_cap_set(unsigned int speed_khz);
+
+#endif
+
#endif /* __LINUX_CLK_TEGRA_H_ */