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-rw-r--r--[-rwxr-xr-x]include/linux/earlysuspend.h0
-rw-r--r--include/linux/fb.h9
-rw-r--r--include/linux/gpio_scrollwheel.h46
-rwxr-xr-xinclude/linux/i2c/atmel_maxtouch.h301
-rw-r--r--include/linux/mfd/max8907c.h183
-rw-r--r--include/linux/mfd/tps6586x.h1
-rw-r--r--[-rwxr-xr-x]include/linux/mmc/sdio_func.h0
-rwxr-xr-xinclude/linux/mpu3050.h609
-rw-r--r--include/linux/regulator/max8907c-regulator.h46
-rw-r--r--include/linux/regulator/max8952.h40
-rw-r--r--include/linux/tegra_audio.h39
-rw-r--r--include/linux/tegra_overlay.h67
-rw-r--r--include/linux/tegra_usb.h5
-rw-r--r--include/linux/usb.h1
-rw-r--r--include/linux/usb/hcd.h8
-rw-r--r--[-rwxr-xr-x]include/linux/wakelock.h0
16 files changed, 1355 insertions, 0 deletions
diff --git a/include/linux/earlysuspend.h b/include/linux/earlysuspend.h
index 8343b817af31..8343b817af31 100755..100644
--- a/include/linux/earlysuspend.h
+++ b/include/linux/earlysuspend.h
diff --git a/include/linux/fb.h b/include/linux/fb.h
index 8b1f0a982bdb..3e816a73b448 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -225,6 +225,15 @@ struct fb_bitfield {
#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
/*
+ * Stereo modes
+ */
+#define FB_VMODE_STEREO_NONE 0x00000000 /* not stereo */
+#define FB_VMODE_STEREO_FRAME_PACK 0x01000000 /* frame packing */
+#define FB_VMODE_STEREO_TOP_BOTTOM 0x02000000 /* top-bottom */
+#define FB_VMODE_STEREO_LEFT_RIGHT 0x04000000 /* left-right */
+#define FB_VMODE_STEREO_MASK 0xFF000000
+
+/*
* Display rotation support
*/
#define FB_ROTATE_UR 0
diff --git a/include/linux/gpio_scrollwheel.h b/include/linux/gpio_scrollwheel.h
new file mode 100644
index 000000000000..33d17a0199ea
--- /dev/null
+++ b/include/linux/gpio_scrollwheel.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2010, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ */
+
+#ifndef _GPIO_SCROLLWHEEL_H
+#define _GPIO_SCROLLWHEEL_H
+
+#define GPIO_SCROLLWHEEL_PIN_ONOFF 0
+#define GPIO_SCROLLWHEEL_PIN_PRESS 1
+#define GPIO_SCROLLWHEEL_PIN_ROT1 2
+#define GPIO_SCROLLWHEEL_PIN_ROT2 3
+#define GPIO_SCROLLWHEEL_PIN_MAX 4
+
+struct gpio_scrollwheel_button {
+ /* Configuration parameters */
+ int pinaction; /* GPIO_SCROLLWHEEL_PIN_* */
+ int gpio;
+ char *desc;
+ int active_low;
+ int debounce_interval; /* debounce ticks interval in msecs */
+};
+
+struct gpio_scrollwheel_platform_data {
+ struct gpio_scrollwheel_button *buttons;
+ int nbuttons;
+ unsigned int rep:1; /* enable input subsystem auto repeat */
+ int (*enable)(struct device *dev);
+ void (*disable)(struct device *dev);
+};
+
+#endif
+
diff --git a/include/linux/i2c/atmel_maxtouch.h b/include/linux/i2c/atmel_maxtouch.h
new file mode 100755
index 000000000000..d827909ecbbd
--- /dev/null
+++ b/include/linux/i2c/atmel_maxtouch.h
@@ -0,0 +1,301 @@
+/*
+ * Atmel maXTouch header file
+ *
+ * Copyright (c) 2010 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or 3 as
+ * published by the Free Software Foundation.
+ * See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#define MXT224_I2C_ADDR1 0x4A
+#define MXT224_I2C_ADDR2 0x4B
+#define MXT1386_I2C_ADDR1 0x4C
+#define MXT1386_I2C_ADDR2 0x4D
+#define MXT1386_I2C_ADDR3 0x5A
+#define MXT1386_I2C_ADDR4 0x5B
+
+/*
+ * Select this address from above depending on what maXTouch
+ * chip you have and how it's address pins are configured;
+ * see datasheet.
+ */
+
+#define MXT_I2C_ADDRESS MXT1386_I2C_ADDR3
+
+#define MXT_BL_ADDRESS 0x25
+
+#define MXT224_FAMILYID 0x80
+#define MXT1386_FAMILYID 0xA0
+
+#define MXT224_CAL_VARIANTID 0x01
+#define MXT224_UNCAL_VARIANTID 0x00
+#define MXT1386_CAL_VARIANTID 0x00
+
+#define MXT_MAX_REPORTED_WIDTH 255
+#define MXT_MAX_REPORTED_PRESSURE 255
+#define MXT_MAX_TOUCH_SIZE 255
+#define MXT_MAX_NUM_TOUCHES 10
+
+/* Fixed addresses inside maXTouch device */
+#define MXT_ADDR_INFO_BLOCK 0
+#define MXT_ADDR_OBJECT_TABLE 7
+#define MXT_ID_BLOCK_SIZE 7
+#define MXT_OBJECT_TABLE_ELEMENT_SIZE 6
+
+/* Object types */
+#define MXT_DEBUG_DELTAS_T2 2
+#define MXT_DEBUG_REFERENCES_T3 3
+#define MXT_GEN_MESSAGEPROCESSOR_T5 5
+#define MXT_GEN_COMMANDPROCESSOR_T6 6
+#define MXT_GEN_POWERCONFIG_T7 7
+#define MXT_GEN_ACQUIRECONFIG_T8 8
+#define MXT_TOUCH_MULTITOUCHSCREEN_T9 9
+#define MXT_TOUCH_SINGLETOUCHSCREEN_T10 10
+#define MXT_TOUCH_XSLIDER_T11 11
+#define MXT_TOUCH_YSLIDER_T12 12
+#define MXT_TOUCH_XWHEEL_T13 13
+#define MXT_TOUCH_YWHEEL_T14 14
+#define MXT_TOUCH_KEYARRAY_T15 15
+#define MXT_SPT_GPIOPWM_T19 19
+#define MXT_PROCI_GRIPFACESUPPRESSION_T20 20
+#define MXT_PROCG_NOISESUPPRESSION_T22 22
+#define MXT_TOUCH_PROXIMITY_T23 23
+#define MXT_PROCI_ONETOUCHGESTUREPROCESSOR_T24 24
+#define MXT_SPT_SELFTEST_T25 25
+#define MXT_DEBUG_CTERANGE_T26 26
+#define MXT_PROCI_TWOTOUCHGESTUREPROCESSOR_T27 27
+#define MXT_SPT_CTECONFIG_T28 28
+#define MXT_TOUCH_KEYSET_T31 31
+#define MXT_TOUCH_XSLIDERSET_T32 32
+#define MXT_DEBUG_DIAGNOSTIC_T37 37
+#define MXT_USER_INFO_T38 38
+
+/*
+ * If a message is read from mXT when there's no new messages available,
+ * the report ID of the message will be 0xFF.
+ */
+#define MXT_END_OF_MESSAGES 0xFF
+
+/* GEN_COMMANDPROCESSOR_T6 Register offsets from T6 base address */
+#define MXT_ADR_T6_RESET 0x00
+#define MXT_ADR_T6_BACKUPNV 0x01
+#define MXT_ADR_T6_CALIBRATE 0x02
+#define MXT_ADR_T6_REPORTALL 0x03
+#define MXT_ADR_T6_RESERVED 0x04
+#define MXT_ADR_T6_DIAGNOSTIC 0x05
+
+/* T6 Debug Diagnostics Commands */
+#define MXT_CMD_T6_PAGE_UP 0x01
+#define MXT_CMD_T6_PAGE_DOWN 0x02
+#define MXT_CMD_T6_DELTAS_MODE 0x10
+#define MXT_CMD_T6_REFERENCES_MODE 0x11
+#define MXT_CMD_T6_CTE_MODE 0x31
+
+/* T6 Backup Command */
+#define MXT_CMD_T6_BACKUP 0x55
+
+/* SPT_DEBUG_DIAGNOSTIC_T37 Register offsets from T37 base address */
+#define MXT_ADR_T37_PAGE 0x01
+#define MXT_ADR_T37_DATA 0x02
+
+/************************************************************************
+ * MESSAGE OBJECTS ADDRESS FIELDS
+ *
+ ************************************************************************/
+#define MXT_MSG_REPORTID 0x00
+
+/* MXT_GEN_MESSAGEPROCESSOR_T5 Message address definitions */
+#define MXT_MSG_T5_REPORTID 0x00
+#define MXT_MSG_T5_MESSAGE 0x01
+#define MXT_MSG_T5_CHECKSUM 0x08
+
+/* MXT_GEN_COMMANDPROCESSOR_T6 Message address definitions */
+#define MXT_MSG_T6_STATUS 0x01
+#define MXT_MSGB_T6_COMSERR 0x04
+#define MXT_MSGB_T6_CFGERR 0x08
+#define MXT_MSGB_T6_CAL 0x10
+#define MXT_MSGB_T6_SIGERR 0x20
+#define MXT_MSGB_T6_OFL 0x40
+#define MXT_MSGB_T6_RESET 0x80
+/* Three bytes */
+#define MXT_MSG_T6_CHECKSUM 0x02
+
+/* MXT_GEN_POWERCONFIG_T7 NO Message address definitions */
+/* MXT_GEN_ACQUIRECONFIG_T8 Message address definitions */
+/* MXT_TOUCH_MULTITOUCHSCREEN_T9 Message address definitions */
+
+#define MXT_MSG_T9_STATUS 0x01
+/* Status bit field */
+#define MXT_MSGB_T9_SUPPRESS 0x02
+#define MXT_MSGB_T9_AMP 0x04
+#define MXT_MSGB_T9_VECTOR 0x08
+#define MXT_MSGB_T9_MOVE 0x10
+#define MXT_MSGB_T9_RELEASE 0x20
+#define MXT_MSGB_T9_PRESS 0x40
+#define MXT_MSGB_T9_DETECT 0x80
+
+#define MXT_MSG_T9_XPOSMSB 0x02
+#define MXT_MSG_T9_YPOSMSB 0x03
+#define MXT_MSG_T9_XYPOSLSB 0x04
+#define MXT_MSG_T9_TCHAREA 0x05
+#define MXT_MSG_T9_TCHAMPLITUDE 0x06
+#define MXT_MSG_T9_TCHVECTOR 0x07
+
+/* MXT_SPT_GPIOPWM_T19 Message address definitions */
+#define MXT_MSG_T19_STATUS 0x01
+
+/* MXT_PROCI_GRIPFACESUPPRESSION_T20 Message address definitions */
+#define MXT_MSG_T20_STATUS 0x01
+#define MXT_MSGB_T20_FACE_SUPPRESS 0x01
+/* MXT_PROCG_NOISESUPPRESSION_T22 Message address definitions */
+#define MXT_MSG_T22_STATUS 0x01
+#define MXT_MSGB_T22_FHCHG 0x01
+#define MXT_MSGB_T22_GCAFERR 0x04
+#define MXT_MSGB_T22_FHERR 0x08
+#define MXT_MSG_T22_GCAFDEPTH 0x02
+
+/* MXT_TOUCH_PROXIMITY_T23 Message address definitions */
+#define MXT_MSG_T23_STATUS 0x01
+#define MXT_MSGB_T23_FALL 0x20
+#define MXT_MSGB_T23_RISE 0x40
+#define MXT_MSGB_T23_DETECT 0x80
+/* 16 bit */
+#define MXT_MSG_T23_PROXDELTA 0x02
+
+/* MXT_PROCI_ONETOUCHGESTUREPROCESSOR_T24 Message address definitions */
+#define MXT_MSG_T24_STATUS 0x01
+#define MXT_MSG_T24_XPOSMSB 0x02
+#define MXT_MSG_T24_YPOSMSB 0x03
+#define MXT_MSG_T24_XYPOSLSB 0x04
+#define MXT_MSG_T24_DIR 0x05
+/* 16 bit */
+#define MXT_MSG_T24_DIST 0x06
+
+/* MXT_SPT_SELFTEST_T25 Message address definitions */
+#define MXT_MSG_T25_STATUS 0x01
+/* 5 Bytes */
+#define MXT_MSGR_T25_OK 0xFE
+#define MXT_MSGR_T25_INVALID_TEST 0xFD
+#define MXT_MSGR_T25_PIN_FAULT 0x11
+#define MXT_MSGR_T25_SIGNAL_LIMIT_FAULT 0x17
+#define MXT_MSGR_T25_GAIN_ERROR 0x20
+#define MXT_MSG_T25_INFO 0x02
+
+/* MXT_PROCI_TWOTOUCHGESTUREPROCESSOR_T27 Message address definitions */
+#define MXT_MSG_T27_STATUS 0x01
+#define MXT_MSGB_T27_ROTATEDIR 0x10
+#define MXT_MSGB_T27_PINCH 0x20
+#define MXT_MSGB_T27_ROTATE 0x40
+#define MXT_MSGB_T27_STRETCH 0x80
+#define MXT_MSG_T27_XPOSMSB 0x02
+#define MXT_MSG_T27_YPOSMSB 0x03
+#define MXT_MSG_T27_XYPOSLSB 0x04
+#define MXT_MSG_T27_ANGLE 0x05
+
+/* 16 bit */
+#define MXT_MSG_T27_SEPARATION 0x06
+
+/* MXT_SPT_CTECONFIG_T28 Message address definitions */
+#define MXT_MSG_T28_STATUS 0x01
+#define MXT_MSGB_T28_CHKERR 0x01
+
+/* One Touch Events */
+#define MT_GESTURE_RESERVED 0x00
+#define MT_GESTURE_PRESS 0x01
+#define MT_GESTURE_RELEASE 0x02
+#define MT_GESTURE_TAP 0x03
+#define MT_GESTURE_DOUBLE_TAP 0x04
+#define MT_GESTURE_FLICK 0x05
+#define MT_GESTURE_DRAG 0x06
+#define MT_GESTURE_SHORT_PRESS 0x07
+#define MT_GESTURE_LONG_PRESS 0x08
+#define MT_GESTURE_REPEAT_PRESS 0x09
+#define MT_GESTURE_TAP_AND_PRESS 0x0a
+#define MT_GESTURE_THROW 0x0b
+
+/* Bootloader states */
+#define WAITING_BOOTLOAD_COMMAND 0xC0
+#define WAITING_FRAME_DATA 0x80
+#define APP_CRC_FAIL 0x40
+#define FRAME_CRC_CHECK 0x02
+#define FRAME_CRC_PASS 0x04
+#define FRAME_CRC_FAIL 0x03
+
+#define MXT_MAX_FRAME_SIZE 276
+
+/* Debug levels */
+#define NO_DEBUG 0
+#define DEBUG_INFO 1
+#define DEBUG_VERBOSE 2
+#define DEBUG_MESSAGES 5
+#define DEBUG_RAW 8
+#define DEBUG_TRACE 10
+
+/* IOCTL commands */
+#define MXT_SET_ADDRESS 1 /* Sets the internal address pointer */
+#define MXT_RESET 2 /* Resets the device */
+#define MXT_CALIBRATE 3 /* Calibrates the device */
+#define MXT_BACKUP 4 /* Backups the current state of registers to
+ NVM */
+#define MXT_NONTOUCH_MSG 5 /* Only non-touch messages can be read from
+ the message buffer
+ (/dev/maXTouch_messages) */
+#define MXT_ALL_MSG 6 /* All messages can be read from the message
+ buffer */
+
+/* Message buffer size. This is a ring buffer, and when full, the oldest entry
+ will be overwritten. */
+#define MXT_MESSAGE_BUFFER_SIZE 128
+
+/* Routines for memory access within a 16 bit address space */
+
+static int mxt_read_block(struct i2c_client *client, u16 addr, u16 length,
+ u8 *value);
+static int mxt_write_byte(struct i2c_client *client, u16 addr, u8 value);
+static int mxt_write_block(struct i2c_client *client, u16 addr, u16 length,
+ u8 *value);
+
+/* TODO: */
+/* Bootloader specific function prototypes. */
+static int mxt_read_byte_bl(struct i2c_client *client, u8 * value);
+static int mxt_read_block_bl(struct i2c_client *client, u16 length, u8 * value);
+static int mxt_write_byte_bl(struct i2c_client *client, u8 value);
+static int mxt_write_block_bl(struct i2c_client *client, u16 length,
+ u8 *value);
+
+/**
+ * struct mxt_platform_data - includes platform specific informatio
+ * related to Atmel maXTouch touchscreen controller.
+ *
+ * @numtouch: Number of simultaneous touches supported
+ * @init_platform_hw(): Initialization function, which can for example
+ * trigger a hardware reset by toggling a GPIO pin
+ * @exit_platform_hw(): Function to run when the driver is unloaded.
+ * @valid_interrupt(): Function that checks the validity of the interrupt -
+ * function that check the validity of a interrupt (by
+ * reading the changeline interrupt pin and checking that
+ * it really is low for example).
+ * @max_x: Reported X range
+ * @max_y: Reported Y range
+ */
+
+struct mxt_platform_data {
+ u8 numtouch; /* Number of touches to report */
+ void (*init_platform_hw) (void);
+ void (*exit_platform_hw) (void);
+ int max_x; /* The default reported X range */
+ int max_y; /* The default reported Y range */
+ u8(*valid_interrupt) (void);
+ u8(*read_chg) (void);
+};
+
+static u8 mxt_valid_interrupt_dummy(void)
+{
+ return 1;
+}
+
+void mxt_hw_reset(void);
diff --git a/include/linux/mfd/max8907c.h b/include/linux/mfd/max8907c.h
new file mode 100644
index 000000000000..c78849a32860
--- /dev/null
+++ b/include/linux/mfd/max8907c.h
@@ -0,0 +1,183 @@
+/* linux/mfd/max8907c.h
+ *
+ * Functions to access MAX8907C power management chip.
+ *
+ * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_MFD_MAX8907C_H
+#define __LINUX_MFD_MAX8907C_H
+
+/* MAX8907C register map */
+#define MAX8907C_REG_SYSENSEL 0x00
+#define MAX8907C_REG_ON_OFF_IRQ1 0x01
+#define MAX8907C_REG_ON_OFF_IRQ1_MASK 0x02
+#define MAX8907C_REG_ON_OFF_STAT 0x03
+#define MAX8907C_REG_SDCTL1 0x04
+#define MAX8907C_REG_SDSEQCNT1 0x05
+#define MAX8907C_REG_SDV1 0x06
+#define MAX8907C_REG_SDCTL2 0x07
+#define MAX8907C_REG_SDSEQCNT2 0x08
+#define MAX8907C_REG_SDV2 0x09
+#define MAX8907C_REG_SDCTL3 0x0A
+#define MAX8907C_REG_SDSEQCNT3 0x0B
+#define MAX8907C_REG_SDV3 0x0C
+#define MAX8907C_REG_ON_OFF_IRQ2 0x0D
+#define MAX8907C_REG_ON_OFF_IRQ2_MASK 0x0E
+#define MAX8907C_REG_RESET_CNFG 0x0F
+#define MAX8907C_REG_LDOCTL16 0x10
+#define MAX8907C_REG_LDOSEQCNT16 0x11
+#define MAX8907C_REG_LDO16VOUT 0x12
+#define MAX8907C_REG_SDBYSEQCNT 0x13
+#define MAX8907C_REG_LDOCTL17 0x14
+#define MAX8907C_REG_LDOSEQCNT17 0x15
+#define MAX8907C_REG_LDO17VOUT 0x16
+#define MAX8907C_REG_LDOCTL1 0x18
+#define MAX8907C_REG_LDOSEQCNT1 0x19
+#define MAX8907C_REG_LDO1VOUT 0x1A
+#define MAX8907C_REG_LDOCTL2 0x1C
+#define MAX8907C_REG_LDOSEQCNT2 0x1D
+#define MAX8907C_REG_LDO2VOUT 0x1E
+#define MAX8907C_REG_LDOCTL3 0x20
+#define MAX8907C_REG_LDOSEQCNT3 0x21
+#define MAX8907C_REG_LDO3VOUT 0x22
+#define MAX8907C_REG_LDOCTL4 0x24
+#define MAX8907C_REG_LDOSEQCNT4 0x25
+#define MAX8907C_REG_LDO4VOUT 0x26
+#define MAX8907C_REG_LDOCTL5 0x28
+#define MAX8907C_REG_LDOSEQCNT5 0x29
+#define MAX8907C_REG_LDO5VOUT 0x2A
+#define MAX8907C_REG_LDOCTL6 0x2C
+#define MAX8907C_REG_LDOSEQCNT6 0x2D
+#define MAX8907C_REG_LDO6VOUT 0x2E
+#define MAX8907C_REG_LDOCTL7 0x30
+#define MAX8907C_REG_LDOSEQCNT7 0x31
+#define MAX8907C_REG_LDO7VOUT 0x32
+#define MAX8907C_REG_LDOCTL8 0x34
+#define MAX8907C_REG_LDOSEQCNT8 0x35
+#define MAX8907C_REG_LDO8VOUT 0x36
+#define MAX8907C_REG_LDOCTL9 0x38
+#define MAX8907C_REG_LDOSEQCNT9 0x39
+#define MAX8907C_REG_LDO9VOUT 0x3A
+#define MAX8907C_REG_LDOCTL10 0x3C
+#define MAX8907C_REG_LDOSEQCNT10 0x3D
+#define MAX8907C_REG_LDO10VOUT 0x3E
+#define MAX8907C_REG_LDOCTL11 0x40
+#define MAX8907C_REG_LDOSEQCNT11 0x41
+#define MAX8907C_REG_LDO11VOUT 0x42
+#define MAX8907C_REG_LDOCTL12 0x44
+#define MAX8907C_REG_LDOSEQCNT12 0x45
+#define MAX8907C_REG_LDO12VOUT 0x46
+#define MAX8907C_REG_LDOCTL13 0x48
+#define MAX8907C_REG_LDOSEQCNT13 0x49
+#define MAX8907C_REG_LDO13VOUT 0x4A
+#define MAX8907C_REG_LDOCTL14 0x4C
+#define MAX8907C_REG_LDOSEQCNT14 0x4D
+#define MAX8907C_REG_LDO14VOUT 0x4E
+#define MAX8907C_REG_LDOCTL15 0x50
+#define MAX8907C_REG_LDOSEQCNT15 0x51
+#define MAX8907C_REG_LDO15VOUT 0x52
+#define MAX8907C_REG_OUT5VEN 0x54
+#define MAX8907C_REG_OUT5VSEQ 0x55
+#define MAX8907C_REG_OUT33VEN 0x58
+#define MAX8907C_REG_OUT33VSEQ 0x59
+#define MAX8907C_REG_LDOCTL19 0x5C
+#define MAX8907C_REG_LDOSEQCNT19 0x5D
+#define MAX8907C_REG_LDO19VOUT 0x5E
+#define MAX8907C_REG_LBCNFG 0x60
+#define MAX8907C_REG_SEQ1CNFG 0x64
+#define MAX8907C_REG_SEQ2CNFG 0x65
+#define MAX8907C_REG_SEQ3CNFG 0x66
+#define MAX8907C_REG_SEQ4CNFG 0x67
+#define MAX8907C_REG_SEQ5CNFG 0x68
+#define MAX8907C_REG_SEQ6CNFG 0x69
+#define MAX8907C_REG_SEQ7CNFG 0x6A
+#define MAX8907C_REG_LDOCTL18 0x72
+#define MAX8907C_REG_LDOSEQCNT18 0x73
+#define MAX8907C_REG_LDO18VOUT 0x74
+#define MAX8907C_REG_BBAT_CNFG 0x78
+#define MAX8907C_REG_CHG_CNTL1 0x7C
+#define MAX8907C_REG_CHG_CNTL2 0x7D
+#define MAX8907C_REG_CHG_IRQ1 0x7E
+#define MAX8907C_REG_CHG_IRQ2 0x7F
+#define MAX8907C_REG_CHG_IRQ1_MASK 0x80
+#define MAX8907C_REG_CHG_IRQ2_MASK 0x81
+#define MAX8907C_REG_CHG_STAT 0x82
+#define MAX8907C_REG_WLED_MODE_CNTL 0x84
+#define MAX8907C_REG_ILED_CNTL 0x84
+#define MAX8907C_REG_II1RR 0x8E
+#define MAX8907C_REG_II2RR 0x8F
+#define MAX8907C_REG_LDOCTL20 0x9C
+#define MAX8907C_REG_LDOSEQCNT20 0x9D
+#define MAX8907C_REG_LDO20VOUT 0x9E
+
+/* RTC register */
+#define MAX8907C_REG_RTC_SEC 0x00
+#define MAX8907C_REG_RTC_MIN 0x01
+#define MAX8907C_REG_RTC_HOURS 0x02
+#define MAX8907C_REG_RTC_WEEKDAY 0x03
+#define MAX8907C_REG_RTC_DATE 0x04
+#define MAX8907C_REG_RTC_MONTH 0x05
+#define MAX8907C_REG_RTC_YEAR1 0x06
+#define MAX8907C_REG_RTC_YEAR2 0x07
+#define MAX8907C_REG_ALARM0_SEC 0x08
+#define MAX8907C_REG_ALARM0_MIN 0x09
+#define MAX8907C_REG_ALARM0_HOURS 0x0A
+#define MAX8907C_REG_ALARM0_WEEKDAY 0x0B
+#define MAX8907C_REG_ALARM0_DATE 0x0C
+#define MAX8907C_REG_ALARM0_MONTH 0x0D
+#define MAX8907C_REG_ALARM0_YEAR1 0x0E
+#define MAX8907C_REG_ALARM0_YEAR2 0x0F
+#define MAX8907C_REG_ALARM1_SEC 0x10
+#define MAX8907C_REG_ALARM1_MIN 0x11
+#define MAX8907C_REG_ALARM1_HOURS 0x12
+#define MAX8907C_REG_ALARM1_WEEKDAY 0x13
+#define MAX8907C_REG_ALARM1_DATE 0x14
+#define MAX8907C_REG_ALARM1_MONTH 0x15
+#define MAX8907C_REG_ALARM1_YEAR1 0x16
+#define MAX8907C_REG_ALARM1_YEAR2 0x17
+#define MAX8907C_REG_ALARM0_CNTL 0x18
+#define MAX8907C_REG_ALARM1_CNTL 0x19
+#define MAX8907C_REG_RTC_STATUS 0x1A
+#define MAX8907C_REG_RTC_CNTL 0x1B
+#define MAX8907C_REG_RTC_IRQ 0x1C
+#define MAX8907C_REG_IRQ_IRQ_MASK 0x1D
+#define MAX8907C_REG_MPL_CNTL 0x1E
+
+/* ADC and Touch Screen Controller register map */
+
+#define MAX8907C_CTL 0
+#define MAX8907C_SEQCNT 1
+#define MAX8907C_VOUT 2
+
+/* mask bit fields */
+#define MAX8907C_MASK_LDO_SEQ 0x1C
+#define MAX8907C_MASK_LDO_EN 0x01
+#define MAX8907C_MASK_VBBATTCV 0x03
+#define MAX8907C_MASK_OUT5V_VINEN 0x10
+#define MAX8907C_MASK_OUT5V_ENSRC 0x0E
+#define MAX8907C_MASK_OUT5V_EN 0x01
+
+struct max8907c {
+ struct device *dev;
+
+ int (*read_dev) (void *io_data, u8 reg, u8 count, u8 * dst);
+ int (*write_dev) (void *io_data, u8 reg, u8 count, const u8 * src);
+
+ struct mutex io_lock;
+};
+
+struct max8907c_platform_data {
+ int num_subdevs;
+ struct platform_device **subdevs;
+};
+
+int max8907c_reg_read(struct device *dev, u8 reg);
+int max8907c_reg_write(struct device *dev, u8 reg, u8 val);
+int max8907c_set_bits(struct device *dev, u8 reg, u8 mask, u8 val);
+
+#endif
diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h
index d96fb3d3e624..bd20aa696485 100644
--- a/include/linux/mfd/tps6586x.h
+++ b/include/linux/mfd/tps6586x.h
@@ -78,5 +78,6 @@ extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
extern int tps6586x_update(struct device *dev, int reg, uint8_t val,
uint8_t mask);
+extern int tps6586x_power_off(void);
#endif /*__LINUX_MFD_TPS6586X_H */
diff --git a/include/linux/mmc/sdio_func.h b/include/linux/mmc/sdio_func.h
index 557acae8cf95..557acae8cf95 100755..100644
--- a/include/linux/mmc/sdio_func.h
+++ b/include/linux/mmc/sdio_func.h
diff --git a/include/linux/mpu3050.h b/include/linux/mpu3050.h
new file mode 100755
index 000000000000..9c8ddc2ad0af
--- /dev/null
+++ b/include/linux/mpu3050.h
@@ -0,0 +1,609 @@
+/*
+ $License:
+ Copyright (C) 2010 InvenSense Corporation, All Rights Reserved.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+ $
+ */
+/******************************************************************************
+ *
+ * $Id: mpu3050.h 3868 2010-10-09 01:22:37Z dsrivastava $
+ *
+ ******************************************************************************/
+
+/**
+ * @defgroup
+ * @brief
+ *
+ * @{
+ * @file mpu3050.h
+ * @brief
+**/
+
+#ifndef __MPU3050_H_
+#define __MPU3050_H_
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#endif
+
+typedef void *mlsl_handle_t;
+
+#define DEFAULT_MPU_SLAVEADDR 0x68
+
+/*==== MPU REGISTER SET ====*/
+enum mpu_register {
+ MPUREG_WHO_AM_I = 0, /* 00 0x00 */
+ MPUREG_PRODUCT_ID, /* 01 0x01 */
+ MPUREG_02_RSVD, /* 02 0x02 */
+ MPUREG_03_RSVD, /* 03 0x03 */
+ MPUREG_04_RSVD, /* 04 0x04 */
+ MPUREG_XG_OFFS_TC, /* 05 0x05 */
+ MPUREG_06_RSVD, /* 06 0x06 */
+ MPUREG_07_RSVD, /* 07 0x07 */
+ MPUREG_YG_OFFS_TC, /* 08 0x08 */
+ MPUREG_09_RSVD, /* 09 0x09 */
+ MPUREG_0A_RSVD, /* 10 0x0a */
+ MPUREG_ZG_OFFS_TC, /* 11 0x0b */
+ MPUREG_X_OFFS_USRH, /* 12 0x0c */
+ MPUREG_X_OFFS_USRL, /* 13 0x0d */
+ MPUREG_Y_OFFS_USRH, /* 14 0x0e */
+ MPUREG_Y_OFFS_USRL, /* 15 0x0f */
+ MPUREG_Z_OFFS_USRH, /* 16 0x10 */
+ MPUREG_Z_OFFS_USRL, /* 17 0x11 */
+ MPUREG_FIFO_EN1, /* 18 0x12 */
+ MPUREG_FIFO_EN2, /* 19 0x13 */
+ MPUREG_AUX_SLV_ADDR, /* 20 0x14 */
+ MPUREG_SMPLRT_DIV, /* 21 0x15 */
+ MPUREG_DLPF_FS_SYNC, /* 22 0x16 */
+ MPUREG_INT_CFG, /* 23 0x17 */
+ MPUREG_ACCEL_BURST_ADDR, /* 24 0x18 */
+ MPUREG_19_RSVD, /* 25 0x19 */
+ MPUREG_INT_STATUS, /* 26 0x1a */
+ MPUREG_TEMP_OUT_H, /* 27 0x1b */
+ MPUREG_TEMP_OUT_L, /* 28 0x1c */
+ MPUREG_GYRO_XOUT_H, /* 29 0x1d */
+ MPUREG_GYRO_XOUT_L, /* 30 0x1e */
+ MPUREG_GYRO_YOUT_H, /* 31 0x1f */
+ MPUREG_GYRO_YOUT_L, /* 32 0x20 */
+ MPUREG_GYRO_ZOUT_H, /* 33 0x21 */
+ MPUREG_GYRO_ZOUT_L, /* 34 0x22 */
+ MPUREG_23_RSVD, /* 35 0x23 */
+ MPUREG_24_RSVD, /* 36 0x24 */
+ MPUREG_25_RSVD, /* 37 0x25 */
+ MPUREG_26_RSVD, /* 38 0x26 */
+ MPUREG_27_RSVD, /* 39 0x27 */
+ MPUREG_28_RSVD, /* 40 0x28 */
+ MPUREG_29_RSVD, /* 41 0x29 */
+ MPUREG_2A_RSVD, /* 42 0x2a */
+ MPUREG_2B_RSVD, /* 43 0x2b */
+ MPUREG_2C_RSVD, /* 44 0x2c */
+ MPUREG_2D_RSVD, /* 45 0x2d */
+ MPUREG_2E_RSVD, /* 46 0x2e */
+ MPUREG_2F_RSVD, /* 47 0x2f */
+ MPUREG_30_RSVD, /* 48 0x30 */
+ MPUREG_31_RSVD, /* 49 0x31 */
+ MPUREG_32_RSVD, /* 50 0x32 */
+ MPUREG_33_RSVD, /* 51 0x33 */
+ MPUREG_34_RSVD, /* 52 0x34 */
+ MPUREG_DMP_CFG_1, /* 53 0x35 */
+ MPUREG_DMP_CFG_2, /* 54 0x36 */
+ MPUREG_BANK_SEL, /* 55 0x37 */
+ MPUREG_MEM_START_ADDR, /* 56 0x38 */
+ MPUREG_MEM_R_W, /* 57 0x39 */
+ MPUREG_FIFO_COUNTH, /* 58 0x3a */
+ MPUREG_FIFO_COUNTL, /* 59 0x3b */
+ MPUREG_FIFO_R_W, /* 60 0x3c */
+ MPUREG_USER_CTRL, /* 61 0x3d */
+ MPUREG_PWR_MGM, /* 62 0x3e */
+ MPUREG_3F_RSVD, /* 63 0x3f */
+ NUM_OF_MPU_REGISTERS /* 64 0x40 */
+};
+
+/*==== BITS FOR MPU ====*/
+
+/*---- MPU 'FIFO_EN1' register (12) ----*/
+#define BIT_TEMP_OUT 0x80
+#define BIT_GYRO_XOUT 0x40
+#define BIT_GYRO_YOUT 0x20
+#define BIT_GYRO_ZOUT 0x10
+#define BIT_ACCEL_XOUT 0x08
+#define BIT_ACCEL_YOUT 0x04
+#define BIT_ACCEL_ZOUT 0x02
+#define BIT_AUX_1OUT 0x01
+/*---- MPU 'FIFO_EN2' register (13) ----*/
+#define BIT_AUX_2OUT 0x02
+#define BIT_AUX_3OUT 0x01
+/*---- MPU 'DLPF_FS_SYNC' register (16) ----*/
+#define BITS_EXT_SYNC_NONE 0x00
+#define BITS_EXT_SYNC_TEMP 0x20
+#define BITS_EXT_SYNC_GYROX 0x40
+#define BITS_EXT_SYNC_GYROY 0x60
+#define BITS_EXT_SYNC_GYROZ 0x80
+#define BITS_EXT_SYNC_ACCELX 0xA0
+#define BITS_EXT_SYNC_ACCELY 0xC0
+#define BITS_EXT_SYNC_ACCELZ 0xE0
+#define BITS_EXT_SYNC_MASK 0xE0
+#define BITS_FS_250DPS 0x00
+#define BITS_FS_500DPS 0x08
+#define BITS_FS_1000DPS 0x10
+#define BITS_FS_2000DPS 0x18
+#define BITS_FS_MASK 0x18
+#define BITS_DLPF_CFG_256HZ_NOLPF2 0x00
+#define BITS_DLPF_CFG_188HZ 0x01
+#define BITS_DLPF_CFG_98HZ 0x02
+#define BITS_DLPF_CFG_42HZ 0x03
+#define BITS_DLPF_CFG_20HZ 0x04
+#define BITS_DLPF_CFG_10HZ 0x05
+#define BITS_DLPF_CFG_5HZ 0x06
+#define BITS_DLPF_CFG_2100HZ_NOLPF 0x07
+#define BITS_DLPF_CFG_MASK 0x07
+/*---- MPU 'INT_CFG' register (17) ----*/
+#define BIT_ACTL 0x80
+#define BIT_ACTL_LOW 0x80
+#define BIT_ACTL_HIGH 0x00
+#define BIT_OPEN 0x40
+#define BIT_OPEN_DRAIN 0x40
+#define BIT_PUSH_PULL 0x00
+#define BIT_LATCH_INT_EN 0x20
+#define BIT_LATCH_INT_EN 0x20
+#define BIT_INT_PULSE_WIDTH_50US 0x00
+#define BIT_INT_ANYRD_2CLEAR 0x10
+#define BIT_INT_STAT_READ_2CLEAR 0x00
+#define BIT_MPU_RDY_EN 0x04
+#define BIT_DMP_INT_EN 0x02
+#define BIT_RAW_RDY_EN 0x01
+/*---- MPU 'INT_STATUS' register (1A) ----*/
+#define BIT_INT_STATUS_FIFO_OVERLOW (0x80)
+#define BIT_MPU_RDY 0x04
+#define BIT_DMP_INT 0x02
+#define BIT_RAW_RDY 0x01
+/*---- MPU 'BANK_SEL' register (37) ----*/
+#define BIT_PRFTCH_EN 0x20
+#define BIT_CFG_USER_BANK 0x10
+#define BITS_MEM_SEL 0x0f
+/*---- MPU 'USER_CTRL' register (3D) ----*/
+#define BIT_DMP_EN 0x80
+#define BIT_FIFO_EN 0x40
+#define BIT_AUX_IF_EN 0x20
+#define BIT_AUX_RD_LENG 0x10
+#define BIT_AUX_IF_RST 0x08
+#define BIT_DMP_RST 0x04
+#define BIT_FIFO_RST 0x02
+#define BIT_GYRO_RST 0x01
+/*---- MPU 'PWR_MGM' register (3E) ----*/
+#define BIT_H_RESET 0x80
+#define BIT_SLEEP 0x40
+#define BIT_STBY_XG 0x20
+#define BIT_STBY_YG 0x10
+#define BIT_STBY_ZG 0x08
+#define BITS_CLKSEL 0x07
+
+/*---- MPU Silicon Revision ----*/
+#define MPU_SILICON_REV_A4 1 /* MPU A4 Device */
+#define MPU_SILICON_REV_B1 2 /* MPU B1 Device */
+#define MPU_SILICON_REV_B4 3 /* MPU B4 Device */
+#define MPU_SILICON_REV_B6 4 /* MPU B6 Device */
+
+/*---- MPU Memory ----*/
+#define MPU_MEM_BANK_SIZE 256
+#define FIFO_HW_SIZE (512) /* FIFO hw is 512 bytes */
+
+typedef enum {
+ MPU_MEM_RAM_BANK_0 = 0,
+ MPU_MEM_RAM_BANK_1,
+ MPU_MEM_RAM_BANK_2,
+ MPU_MEM_RAM_BANK_3,
+ MPU_MEM_NUM_RAM_BANKS,
+ MPU_MEM_OTP_BANK_0 = MPU_MEM_NUM_RAM_BANKS,
+ /* This one is always last */
+ MPU_MEM_NUM_BANKS
+} tMPUMemoryBanks, MPU_MEMORY_BANKS;
+
+#define MPU_NUM_AXES (3)
+
+/*---- structure containing control variables used by MLDL ----*/
+/*---- MPU clock source settings ----*/
+/*---- MPU filter selections ----*/
+enum mpu_filter {
+ MPU_FILTER_256HZ_NOLPF2 = 0,
+ MPU_FILTER_188HZ,
+ MPU_FILTER_98HZ,
+ MPU_FILTER_42HZ,
+ MPU_FILTER_20HZ,
+ MPU_FILTER_10HZ,
+ MPU_FILTER_5HZ,
+ MPU_FILTER_2100HZ_NOLPF,
+ NUM_MPU_FILTER
+};
+
+enum mpu_fullscale {
+ MPU_FS_250DPS = 0,
+ MPU_FS_500DPS,
+ MPU_FS_1000DPS,
+ MPU_FS_2000DPS,
+ NUM_MPU_FS
+};
+
+enum mpu_clock_sel {
+ MPU_CLK_SEL_INTERNAL = 0,
+ MPU_CLK_SEL_PLLGYROX,
+ MPU_CLK_SEL_PLLGYROY,
+ MPU_CLK_SEL_PLLGYROZ,
+ MPU_CLK_SEL_PLLEXT32K,
+ MPU_CLK_SEL_PLLEXT19M,
+ MPU_CLK_SEL_RESERVED,
+ MPU_CLK_SEL_STOP,
+ NUM_CLK_SEL
+};
+
+enum mpu_ext_sync {
+ MPU_EXT_SYNC_NONE = 0,
+ MPU_EXT_SYNC_TEMP,
+ MPU_EXT_SYNC_GYROX,
+ MPU_EXT_SYNC_GYROY,
+ MPU_EXT_SYNC_GYROZ,
+ MPU_EXT_SYNC_ACCELX,
+ MPU_EXT_SYNC_ACCELY,
+ MPU_EXT_SYNC_ACCELZ,
+ NUM_MPU_EXT_SYNC
+};
+
+#define DLPF_FS_SYNC_VALUE(ext_sync, full_scale, lpf) \
+ ((ext_sync << 5) | (full_scale << 3) | lpf)
+
+/* IOCTL commands for /dev/mpu */
+#define MPU_SET_MPU_CONFIG (0x00)
+#define MPU_SET_INT_CONFIG (0x01)
+#define MPU_SET_EXT_SYNC (0x02)
+#define MPU_SET_FULL_SCALE (0x03)
+#define MPU_SET_LPF (0x04)
+#define MPU_SET_CLK_SRC (0x05)
+#define MPU_SET_DIVIDER (0x06)
+#define MPU_SET_LEVEL_SHIFTER (0x07)
+#define MPU_SET_DMP_ENABLE (0x08)
+#define MPU_SET_FIFO_ENABLE (0x09)
+#define MPU_SET_DMP_CFG1 (0x0a)
+#define MPU_SET_DMP_CFG2 (0x0b)
+#define MPU_SET_OFFSET_TC (0x0c)
+#define MPU_SET_RAM (0x0d)
+
+#define MPU_SET_PLATFORM_DATA (0x0e)
+
+#define MPU_GET_MPU_CONFIG (0x80)
+#define MPU_GET_INT_CONFIG (0x81)
+#define MPU_GET_EXT_SYNC (0x82)
+#define MPU_GET_FULL_SCALE (0x83)
+#define MPU_GET_LPF (0x84)
+#define MPU_GET_CLK_SRC (0x85)
+#define MPU_GET_DIVIDER (0x86)
+#define MPU_GET_LEVEL_SHIFTER (0x87)
+#define MPU_GET_DMP_ENABLE (0x88)
+#define MPU_GET_FIFO_ENABLE (0x89)
+#define MPU_GET_DMP_CFG1 (0x8a)
+#define MPU_GET_DMP_CFG2 (0x8b)
+#define MPU_GET_OFFSET_TC (0x8c)
+#define MPU_GET_RAM (0x8d)
+
+#define MPU_READ_REGISTER (0x40)
+#define MPU_WRITE_REGISTER (0x41)
+#define MPU_READ_MEMORY (0x42)
+#define MPU_WRITE_MEMORY (0x43)
+
+#define MPU_SUSPEND (0x44)
+#define MPU_RESUME (0x45)
+#define MPU_READ_COMPASS (0x46)
+#define MPU_READ_ACCEL (0x47)
+
+/* Structure for the following IOCTL's:
+ MPU_SET_RAM
+ MPU_GET_RAM
+ MPU_READ_REGISTER
+ MPU_WRITE_REGISTER
+ MPU_READ_MEMORY
+ MPU_WRITE_MEMORY
+*/
+struct mpu_read_write {
+ unsigned short address;
+ unsigned short length;
+ unsigned char *data;
+};
+
+/* Structure for the following IOCTL's
+ MPU_SUSPEND
+ MPU_RESUME
+*/
+struct mpu_suspend_resume {
+ int gyro;
+ int accel;
+ int compass;
+};
+
+enum ext_slave_type {
+ EXT_SLAVE_TYPE_GYROSCOPE,
+ EXT_SLAVE_TYPE_ACCELEROMETER,
+ EXT_SLAVE_TYPE_COMPASS,
+ /* EXT_SLAVE_TYPE_PRESSURE, */
+ /* EXT_SLAVE_TYPE_TEMPERATURE */
+};
+
+enum ext_slave_id {
+ ID_INVALID = 0,
+
+ ACCEL_ID_LIS331,
+ ACCEL_ID_LSM303,
+ ACCEL_ID_KXSD9,
+ ACCEL_ID_KXTF9,
+ ACCEL_ID_BMA150,
+ ACCEL_ID_BMA222,
+ ACCEL_ID_ADI346,
+ ACCEL_ID_MMA8450,
+ ACCEL_ID_MMA8451,
+
+ COMPASS_ID_AKM,
+ COMPASS_ID_AICHI,
+ COMPASS_ID_YAS529,
+ COMPASS_ID_HMC5883,
+ COMPASS_ID_LSM303,
+ COMPASS_ID_MMC314X,
+};
+
+enum ext_slave_endian {
+ EXT_SLAVE_BIG_ENDIAN,
+ EXT_SLAVE_LITTLE_ENDIAN,
+ EXT_SLAVE_FS8_BIG_ENDIAN,
+ EXT_SLAVE_FS16_BIG_ENDIAN,
+};
+
+enum ext_slave_bus {
+ EXT_SLAVE_BUS_PRIMARY,
+ EXT_SLAVE_BUS_SECONDARY,
+};
+
+/**
+ * struct ext_slave_platform_data - Platform data for mpu3050 slave devices
+ *
+ * @get_slave_descr: Function pointer to retrieve the struct ext_slave_descr
+ * for this slave
+ * @adapt_num: the I2C adapter number.
+ * @bus: the bus the slave is attached to: enum ext_slave_bus
+ * @address: the I2C slave address of the slave device.
+ * @orientation: the mounting matrix of the device relative to MPU.
+ * @private_data: additional data, user customizable. Not touched by the MPU
+ * driver.
+ *
+ * The orientation matricies are 3x3 rotation matricies
+ * that are applied to the data to rotate from the mounting orientation to the
+ * platform orientation. The values must be one of 0, 1, or -1 and each row and
+ * column should have exactly 1 non-zero value.
+ *
+ * @code
+ * struct ext_slave_platform_data {
+ * struct ext_slave_descr* (*get_slave_descr) (void);
+ * int adapt_num;
+ * int bus;
+ * unsigned char address;
+ * signed char orientation[9];
+ * void *private_data;
+ * };
+ * @endcode
+ */
+struct ext_slave_platform_data {
+ struct ext_slave_descr *(*get_slave_descr) (void);
+ int adapt_num;
+ int bus;
+ unsigned char address;
+ signed char orientation[9];
+ void *private_data;
+};
+
+struct tFixPntRange {
+ long mantissa;
+ long fraction;
+};
+
+/**
+ * struct ext_slave_descr - Description of the slave device for programming
+ *
+ * @suspend: function pointer to put the device in suspended state
+ * @resume: function pointer to put the device in running state
+ * @read: function that reads the device data
+ *
+ * @name: text name of the device
+ * @type: device type. enum ext_slave_type
+ * @id: enum ext_slave_id
+ * @reg: starting register address to retrieve data.
+ * @len: length in bytes of the sensor data. Should be 6.
+ * @endian: byte order of the data. enum ext_slave_endian
+ * @range: full scale range of the slave ouput: struct tFixPntRange
+ *
+ * Defines the functions and information about the slave the mpu3050 needs to
+ * use the slave device.
+ *
+ * @code
+ * struct ext_slave_descr {
+ * int (*suspend) (mlsl_handle_t mlsl_handle,
+ * struct ext_slave_descr *slave,
+ * struct ext_slave_platform_data *pdata);
+ * int (*resume) (mlsl_handle_t mlsl_handle,
+ * struct ext_slave_descr *slave,
+ * struct ext_slave_platform_data *pdata);
+ * int (*read) (mlsl_handle_t mlsl_handle,
+ * struct ext_slave_descr *slave,
+ * struct ext_slave_platform_data *pdata,
+ * unsigned char * data);
+ *
+ * unsigned char type;
+ * unsigned char id;
+ * unsigned char reg;
+ * unsigned int len;
+ * unsigned char endian;
+ * struct tFixPntRange range;
+ * };
+ * @endcode
+ */
+struct ext_slave_descr {
+ int (*suspend) (mlsl_handle_t mlsl_handle,
+ struct ext_slave_descr *slave,
+ struct ext_slave_platform_data *pdata);
+ int (*resume) (mlsl_handle_t mlsl_handle,
+ struct ext_slave_descr *slave,
+ struct ext_slave_platform_data *pdata);
+ int (*read) (mlsl_handle_t mlsl_handle,
+ struct ext_slave_descr *slave,
+ struct ext_slave_platform_data *pdata,
+ unsigned char *data);
+
+ char *name;
+ unsigned char type;
+ unsigned char id;
+ unsigned char reg;
+ unsigned int len;
+ unsigned char endian;
+ struct tFixPntRange range;
+};
+
+/**
+ * struct mpu3050_platform_data - Platform data for the mpu3050 driver
+ * @int_config: Bits [7:3] of the int config register.
+ * @orientation: Orientation matrix of the gyroscope
+ * @level_shifter: 0: VLogic 1: VDD
+ * @accel: Accel platform data
+ * @compass: Compass platform data
+ *
+ * Contains platform specific information on how to configure the MPU3050 to
+ * work on this platform. The orientation matricies are 3x3 rotation matricies
+ * that are applied to the data to rotate from the mounting orientation to the
+ * platform orientation. The values must be one of 0, 1, or -1 and each row and
+ * column should have exactly 1 non-zero value.
+ *
+ * @code
+ * struct mpu3050_platform_data {
+ * unsigned char int_config;
+ * signed char orientation[MPU_NUM_AXES*MPU_NUM_AXES];
+ * unsigned char level_shifter;
+ * struct ext_slave_platform_data accel;
+ * struct ext_slave_platform_data compass;
+ * };
+ * @endcode
+ */
+struct mpu3050_platform_data {
+ unsigned char int_config;
+ signed char orientation[MPU_NUM_AXES * MPU_NUM_AXES];
+ unsigned char level_shifter;
+ struct ext_slave_platform_data accel;
+ struct ext_slave_platform_data compass;
+};
+
+/*
+ Accelerometer
+*/
+#define get_accel_slave_descr NULL
+
+#ifdef CONFIG_SENSORS_ADXL346 /* ADI accelerometer */
+struct ext_slave_descr *adxl346_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr adxl346_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_BMA150 /* Bosch accelerometer */
+struct ext_slave_descr *bma150_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr bma150_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_BMA222 /* Bosch 222 accelerometer */
+struct ext_slave_descr *bma222_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr bma222_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_KXSD9 /* Kionix accelerometer */
+struct ext_slave_descr *kxsd9_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr kxsd9_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_KXTF9_MPU /* Kionix accelerometer */
+struct ext_slave_descr *kxtf9_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr kxtf9_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_LIS331DLH /* ST accelerometer */
+struct ext_slave_descr *lis331dlh_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr lis331dlh_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_LSM303DLHA /* ST accelerometer */
+struct ext_slave_descr *lsm303dlha_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr lsm303dlha_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_MMA8450 /* Freescale accelerometer */
+struct ext_slave_descr *mma8450_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr mma8450_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_MMA8451 /* Freescale accelerometer */
+struct ext_slave_descr *mma8451_get_slave_descr(void);
+#undef get_accel_slave_descr
+#define get_accel_slave_descr mma8451_get_slave_descr
+#endif
+
+/*
+ Compass
+*/
+#define get_compass_slave_descr NULL
+
+#ifdef CONFIG_SENSORS_AK8975_MPU /* AKM compass */
+struct ext_slave_descr *ak8975_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr ak8975_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_AMI304 /* AICHI Steel compass */
+struct ext_slave_descr *ami304_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr ami304_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_HMC5883 /* Honeywell compass */
+struct ext_slave_descr *hmc5883_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr hmc5883_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_MMC314X /* MEMSIC compass */
+struct ext_slave_descr *mmc314x_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr mmc314x_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_LSM303DLHM /* ST compass */
+struct ext_slave_descr *lsm303dlhm_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr lsm303dlhm_get_slave_descr
+#endif
+
+#ifdef CONFIG_SENSORS_YAS529 /* Yamaha compass */
+struct ext_slave_descr *yas529_get_slave_descr(void);
+#undef get_compass_slave_descr
+#define get_compass_slave_descr yas529_get_slave_descr
+#endif
+
+#endif /* __MPU3050_H_ */
diff --git a/include/linux/regulator/max8907c-regulator.h b/include/linux/regulator/max8907c-regulator.h
new file mode 100644
index 000000000000..ddc5f0a60339
--- /dev/null
+++ b/include/linux/regulator/max8907c-regulator.h
@@ -0,0 +1,46 @@
+/* linux/regulator/max8907c-regulator.h
+ *
+ * Functions to access MAX8907C power management chip.
+ *
+ * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_REGULATOR_MAX8907C_H
+#define __LINUX_REGULATOR_MAX8907C_H
+
+/* IDs */
+#define MAX8907C_SD1 0
+#define MAX8907C_SD2 1
+#define MAX8907C_SD3 2
+#define MAX8907C_LDO1 3
+#define MAX8907C_LDO2 4
+#define MAX8907C_LDO3 5
+#define MAX8907C_LDO4 6
+#define MAX8907C_LDO5 7
+#define MAX8907C_LDO6 8
+#define MAX8907C_LDO7 9
+#define MAX8907C_LDO8 10
+#define MAX8907C_LDO9 11
+#define MAX8907C_LDO10 12
+#define MAX8907C_LDO11 13
+#define MAX8907C_LDO12 14
+#define MAX8907C_LDO13 15
+#define MAX8907C_LDO14 16
+#define MAX8907C_LDO15 17
+#define MAX8907C_LDO16 18
+#define MAX8907C_LDO17 19
+#define MAX8907C_LDO18 20
+#define MAX8907C_LDO19 21
+#define MAX8907C_LDO20 22
+#define MAX8907C_OUT5V 23
+#define MAX8907C_OUT33V 24
+#define MAX8907C_BBAT 25
+#define MAX8907C_SDBY 26
+#define MAX8907C_VRTC 27
+#define MAX8907C_WLED 27
+
+#endif
diff --git a/include/linux/regulator/max8952.h b/include/linux/regulator/max8952.h
new file mode 100644
index 000000000000..abe50beb1b55
--- /dev/null
+++ b/include/linux/regulator/max8952.h
@@ -0,0 +1,40 @@
+/* linux/regulator/max8952.h
+ *
+ * Functions to access MAX8952 power management chip.
+ *
+ * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_REGULATOR_MAX8952_H
+#define __LINUX_REGULATOR_MAX8952_H
+
+/* Regiater map */
+#define MAX8952_REG_MODE0 0x00
+#define MAX8952_REG_MODE1 0x01
+#define MAX8952_REG_MODE2 0x02
+#define MAX8952_REG_MODE3 0x03
+#define MAX8952_REG_CONTROL 0x04
+#define MAX8952_REG_SYNC 0x05
+#define MAX8952_REG_RAMP 0x06
+#define MAX8952_REG_CHIP_ID1 0x08
+#define MAX8952_REG_CHIP_ID2 0x09
+
+/* Register bit-mask */
+#define MAX8952_MASK_OUTMODE 0x3F
+
+/* IDs */
+#define MAX8952_MODE0 0
+#define MAX8952_MODE1 1
+#define MAX8952_MODE2 2
+#define MAX8952_MODE3 3
+
+struct max8952_platform_data {
+ int num_subdevs;
+ struct platform_device **subdevs;
+};
+
+#endif
diff --git a/include/linux/tegra_audio.h b/include/linux/tegra_audio.h
index db4661aacb4f..215cfef62f7d 100644
--- a/include/linux/tegra_audio.h
+++ b/include/linux/tegra_audio.h
@@ -31,6 +31,45 @@ struct tegra_audio_in_config {
int stereo;
};
+enum tegra_audio_device {
+ TEGRA_AUDIO_DEVICE_NONE = 0x00000000,
+ TEGRA_AUDIO_DEVICE_OUT_HEADPHONE = 0x00000001,
+ TEGRA_AUDIO_DEVICE_OUT_HEADSET = 0x00000002,
+ TEGRA_AUDIO_DEVICE_OUT_SPEAKER = 0x00000004,
+ TEGRA_AUDIO_DEVICE_OUT_EAR_SPEAKER = 0x00000008,
+ TEGRA_AUDIO_DEVICE_OUT_LINE = 0x00000010,
+ TEGRA_AUDIO_DEVICE_OUT_BT_SCO = 0x00000020,
+ TEGRA_AUDIO_DEVICE_OUT_AUX_DIGITAL = 0x00000040,
+ TEGRA_AUDIO_DEVICE_OUT_RADIO = 0x00000080,
+ TEGRA_AUDIO_DEVICE_OUT_ALL = TEGRA_AUDIO_DEVICE_OUT_HEADPHONE |
+ TEGRA_AUDIO_DEVICE_OUT_HEADSET |
+ TEGRA_AUDIO_DEVICE_OUT_SPEAKER |
+ TEGRA_AUDIO_DEVICE_OUT_EAR_SPEAKER |
+ TEGRA_AUDIO_DEVICE_OUT_LINE |
+ TEGRA_AUDIO_DEVICE_OUT_BT_SCO |
+ TEGRA_AUDIO_DEVICE_OUT_AUX_DIGITAL |
+ TEGRA_AUDIO_DEVICE_OUT_RADIO,
+ TEGRA_AUDIO_DEVICE_IN_BUILTIN_MIC = 0x00010000,
+ TEGRA_AUDIO_DEVICE_IN_MIC = 0x00020000,
+ TEGRA_AUDIO_DEVICE_IN_HEADSET = 0x00040000,
+ TEGRA_AUDIO_DEVICE_IN_BACK_MIC = 0x00080000,
+ TEGRA_AUDIO_DEVICE_IN_LINE = 0x00100000,
+ TEGRA_AUDIO_DEVICE_IN_BT_SCO = 0x00200000,
+ TEGRA_AUDIO_DEVICE_IN_AUX_DIGITAL = 0x00400000,
+ TEGRA_AUDIO_DEVICE_IN_PHONE = 0x00800000,
+ TEGRA_AUDIO_DEVICE_IN_RADIO = 0x01000000,
+ TEGRA_AUDIO_DEVICE_IN_ALL = TEGRA_AUDIO_DEVICE_IN_BUILTIN_MIC |
+ TEGRA_AUDIO_DEVICE_IN_MIC |
+ TEGRA_AUDIO_DEVICE_IN_HEADSET |
+ TEGRA_AUDIO_DEVICE_IN_BACK_MIC |
+ TEGRA_AUDIO_DEVICE_IN_LINE |
+ TEGRA_AUDIO_DEVICE_IN_BT_SCO |
+ TEGRA_AUDIO_DEVICE_IN_AUX_DIGITAL |
+ TEGRA_AUDIO_DEVICE_IN_PHONE |
+ TEGRA_AUDIO_DEVICE_IN_RADIO,
+ TEGRA_AUDIO_DEVICE_MAX = 0x7FFFFFFF
+};
+
#define TEGRA_AUDIO_IN_SET_CONFIG _IOW(TEGRA_AUDIO_MAGIC, 2, \
const struct tegra_audio_in_config *)
#define TEGRA_AUDIO_IN_GET_CONFIG _IOR(TEGRA_AUDIO_MAGIC, 3, \
diff --git a/include/linux/tegra_overlay.h b/include/linux/tegra_overlay.h
new file mode 100644
index 000000000000..673a40f832c0
--- /dev/null
+++ b/include/linux/tegra_overlay.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2010 NVIDIA Corporation
+ * Author: Dan Willemsen <dwillemsen@nvidia.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LINUX_TEGRA_OVERLAY_H
+#define __LINUX_TEGRA_OVERLAY_H
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+#include <video/tegrafb.h>
+
+/* set index to -1 to ignore window data */
+struct tegra_overlay_windowattr {
+ __s32 index;
+ __u32 buff_id;
+ __u32 blend;
+ __u32 offset;
+ __u32 offset_u;
+ __u32 offset_v;
+ __u32 stride;
+ __u32 stride_uv;
+ __u32 pixformat;
+ __u32 x;
+ __u32 y;
+ __u32 w;
+ __u32 h;
+ __u32 out_x;
+ __u32 out_y;
+ __u32 out_w;
+ __u32 out_h;
+ __u32 z;
+ __u32 pre_syncpt_id;
+ __u32 pre_syncpt_val;
+ __u32 hfilter;
+ __u32 vfilter;
+ __u32 tiled;
+ __u32 flags;
+};
+
+struct tegra_overlay_flip_args {
+ struct tegra_overlay_windowattr win[TEGRA_FB_FLIP_N_WINDOWS];
+ __u32 post_syncpt_id;
+ __u32 post_syncpt_val;
+};
+
+#define TEGRA_OVERLAY_IOCTL_MAGIC 'O'
+
+#define TEGRA_OVERLAY_IOCTL_OPEN_WINDOW _IOWR(TEGRA_OVERLAY_IOCTL_MAGIC, 0x40, __u32)
+#define TEGRA_OVERLAY_IOCTL_CLOSE_WINDOW _IOW(TEGRA_OVERLAY_IOCTL_MAGIC, 0x41, __u32)
+#define TEGRA_OVERLAY_IOCTL_FLIP _IOW(TEGRA_OVERLAY_IOCTL_MAGIC, 0x42, struct tegra_overlay_flip_args)
+#define TEGRA_OVERLAY_IOCTL_SET_NVMAP_FD _IOW(TEGRA_OVERLAY_IOCTL_MAGIC, 0x43, __u32)
+
+#define TEGRA_OVERLAY_IOCTL_MIN_NR _IOC_NR(TEGRA_OVERLAY_IOCTL_OPEN_WINDOW)
+#define TEGRA_OVERLAY_IOCTL_MAX_NR _IOC_NR(TEGRA_OVERLAY_IOCTL_SET_NVMAP_FD)
+
+#endif
diff --git a/include/linux/tegra_usb.h b/include/linux/tegra_usb.h
index 2947ed26879a..6ae8c1e85229 100644
--- a/include/linux/tegra_usb.h
+++ b/include/linux/tegra_usb.h
@@ -32,4 +32,9 @@ struct tegra_ehci_platform_data {
void *phy_config;
};
+struct tegra_otg_platform_data {
+ struct platform_device* (*host_register)(void);
+ void (*host_unregister)(struct platform_device*);
+};
+
#endif /* _TEGRA_USB_H_ */
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 35fe6ab222bb..cd07173c1bc0 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -975,6 +975,7 @@ extern int usb_disabled(void);
#define URB_SETUP_MAP_SINGLE 0x00100000 /* Setup packet DMA mapped */
#define URB_SETUP_MAP_LOCAL 0x00200000 /* HCD-local setup packet */
#define URB_DMA_SG_COMBINED 0x00400000 /* S-G entries were combined */
+#define URB_DRIVER_PRIVATE 0x80000000 /* For driver-private use */
struct usb_iso_packet_descriptor {
unsigned int offset;
diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
index 3b571f1ffbb3..8aaf6872949f 100644
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -233,6 +233,11 @@ struct hc_driver {
int (*urb_dequeue)(struct usb_hcd *hcd,
struct urb *urb, int status);
+ /* dma support */
+ int (*map_urb_for_dma)(struct usb_hcd *hcd, struct urb *urb,
+ gfp_t mem_flags);
+ void (*unmap_urb_for_dma)(struct usb_hcd *hcd, struct urb *urb);
+
/* hw synch, freeing endpoint resources that urb_dequeue can't */
void (*endpoint_disable)(struct usb_hcd *hcd,
struct usb_host_endpoint *ep);
@@ -327,6 +332,9 @@ extern void usb_hcd_unlink_urb_from_ep(struct usb_hcd *hcd, struct urb *urb);
extern int usb_hcd_submit_urb(struct urb *urb, gfp_t mem_flags);
extern int usb_hcd_unlink_urb(struct urb *urb, int status);
+extern int usb_hcd_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
+ gfp_t mem_flags);
+extern void usb_hcd_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb);
extern void usb_hcd_giveback_urb(struct usb_hcd *hcd, struct urb *urb,
int status);
extern void usb_hcd_flush_endpoint(struct usb_device *udev,
diff --git a/include/linux/wakelock.h b/include/linux/wakelock.h
index a096d24ada1d..a096d24ada1d 100755..100644
--- a/include/linux/wakelock.h
+++ b/include/linux/wakelock.h