diff options
Diffstat (limited to 'include/soc/imx8/sc/svc/pm/api.h')
| -rw-r--r-- | include/soc/imx8/sc/svc/pm/api.h | 249 |
1 files changed, 158 insertions, 91 deletions
diff --git a/include/soc/imx8/sc/svc/pm/api.h b/include/soc/imx8/sc/svc/pm/api.h index 608520eeb491..34990fac3ee5 100644 --- a/include/soc/imx8/sc/svc/pm/api.h +++ b/include/soc/imx8/sc/svc/pm/api.h @@ -10,7 +10,7 @@ * Power Management (PM) function. This includes functions for power state * control, clock control, reset control, and wake-up event control. * - * @addtogroup PM_SVC (SVC) Power Management Service + * @addtogroup PM_SVC PM: Power Management Service * * Module for the Power Management (PM) service. * @@ -33,10 +33,10 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PM_POWER_MODE_W 2U /* Width of sc_pm_power_mode_t */ -#define SC_PM_CLOCK_MODE_W 3U /* Width of sc_pm_clock_mode_t */ -#define SC_PM_RESET_TYPE_W 2U /* Width of sc_pm_reset_type_t */ -#define SC_PM_RESET_REASON_W 4U /* Width of sc_pm_reset_reason_t */ +#define SC_PM_POWER_MODE_W 2U /* Width of sc_pm_power_mode_t */ +#define SC_PM_CLOCK_MODE_W 3U /* Width of sc_pm_clock_mode_t */ +#define SC_PM_RESET_TYPE_W 2U /* Width of sc_pm_reset_type_t */ +#define SC_PM_RESET_REASON_W 4U /* Width of sc_pm_reset_reason_t */ /*@}*/ /*! @@ -49,108 +49,108 @@ * @name Defines for ALL parameters */ /*@{*/ -#define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /* All clocks */ +#define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /* All clocks */ /*@}*/ /*! * @name Defines for sc_pm_power_mode_t */ /*@{*/ -#define SC_PM_PW_MODE_OFF 0U /* Power off */ -#define SC_PM_PW_MODE_STBY 1U /* Power in standby */ -#define SC_PM_PW_MODE_LP 2U /* Power in low-power */ -#define SC_PM_PW_MODE_ON 3U /* Power on */ +#define SC_PM_PW_MODE_OFF 0U /* Power off */ +#define SC_PM_PW_MODE_STBY 1U /* Power in standby */ +#define SC_PM_PW_MODE_LP 2U /* Power in low-power */ +#define SC_PM_PW_MODE_ON 3U /* Power on */ /*@}*/ /*! * @name Defines for sc_pm_clk_t */ /*@{*/ -#define SC_PM_CLK_SLV_BUS 0U /* Slave bus clock */ -#define SC_PM_CLK_MST_BUS 1U /* Master bus clock */ -#define SC_PM_CLK_PER 2U /* Peripheral clock */ -#define SC_PM_CLK_PHY 3U /* Phy clock */ -#define SC_PM_CLK_MISC 4U /* Misc clock */ -#define SC_PM_CLK_MISC0 0U /* Misc 0 clock */ -#define SC_PM_CLK_MISC1 1U /* Misc 1 clock */ -#define SC_PM_CLK_MISC2 2U /* Misc 2 clock */ -#define SC_PM_CLK_MISC3 3U /* Misc 3 clock */ -#define SC_PM_CLK_MISC4 4U /* Misc 4 clock */ -#define SC_PM_CLK_CPU 2U /* CPU clock */ -#define SC_PM_CLK_PLL 4U /* PLL */ -#define SC_PM_CLK_BYPASS 4U /* Bypass clock */ +#define SC_PM_CLK_SLV_BUS 0U /* Slave bus clock */ +#define SC_PM_CLK_MST_BUS 1U /* Master bus clock */ +#define SC_PM_CLK_PER 2U /* Peripheral clock */ +#define SC_PM_CLK_PHY 3U /* Phy clock */ +#define SC_PM_CLK_MISC 4U /* Misc clock */ +#define SC_PM_CLK_MISC0 0U /* Misc 0 clock */ +#define SC_PM_CLK_MISC1 1U /* Misc 1 clock */ +#define SC_PM_CLK_MISC2 2U /* Misc 2 clock */ +#define SC_PM_CLK_MISC3 3U /* Misc 3 clock */ +#define SC_PM_CLK_MISC4 4U /* Misc 4 clock */ +#define SC_PM_CLK_CPU 2U /* CPU clock */ +#define SC_PM_CLK_PLL 4U /* PLL */ +#define SC_PM_CLK_BYPASS 4U /* Bypass clock */ /*@}*/ /*! * @name Defines for sc_pm_clk_mode_t */ /*@{*/ -#define SC_PM_CLK_MODE_ROM_INIT 0U /* Clock is initialized by ROM. */ -#define SC_PM_CLK_MODE_OFF 1U /* Clock is disabled */ -#define SC_PM_CLK_MODE_ON 2U /* Clock is enabled. */ -#define SC_PM_CLK_MODE_AUTOGATE_SW 3U /* Clock is in SW autogate mode */ -#define SC_PM_CLK_MODE_AUTOGATE_HW 4U /* Clock is in HW autogate mode */ -#define SC_PM_CLK_MODE_AUTOGATE_SW_HW 5U /* Clock is in SW-HW autogate mode */ +#define SC_PM_CLK_MODE_ROM_INIT 0U /* Clock is initialized by ROM */ +#define SC_PM_CLK_MODE_OFF 1U /* Clock is disabled */ +#define SC_PM_CLK_MODE_ON 2U /* Clock is enabled */ +#define SC_PM_CLK_MODE_AUTOGATE_SW 3U /* Clock is in SW autogate mode */ +#define SC_PM_CLK_MODE_AUTOGATE_HW 4U /* Clock is in HW autogate mode */ +#define SC_PM_CLK_MODE_AUTOGATE_SW_HW 5U /* Clock is in SW-HW autogate mode */ /*@}*/ /*! * @name Defines for sc_pm_clk_parent_t */ /*@{*/ -#define SC_PM_PARENT_XTAL 0U /* Parent is XTAL. */ -#define SC_PM_PARENT_PLL0 1U /* Parent is PLL0 */ -#define SC_PM_PARENT_PLL1 2U /* Parent is PLL1 or PLL0/2 */ -#define SC_PM_PARENT_PLL2 3U /* Parent in PLL2 or PLL0/4 */ -#define SC_PM_PARENT_BYPS 4U /* Parent is a bypass clock. */ +#define SC_PM_PARENT_XTAL 0U /* Parent is XTAL */ +#define SC_PM_PARENT_PLL0 1U /* Parent is PLL0 */ +#define SC_PM_PARENT_PLL1 2U /* Parent is PLL1 or PLL0/2 */ +#define SC_PM_PARENT_PLL2 3U /* Parent in PLL2 or PLL0/4 */ +#define SC_PM_PARENT_BYPS 4U /* Parent is a bypass clock. */ /*@}*/ /*! * @name Defines for sc_pm_reset_type_t */ /*@{*/ -#define SC_PM_RESET_TYPE_COLD 0U /* Cold reset */ -#define SC_PM_RESET_TYPE_WARM 1U /* Warm reset */ -#define SC_PM_RESET_TYPE_BOARD 2U /* Board reset */ +#define SC_PM_RESET_TYPE_COLD 0U /* Cold reset */ +#define SC_PM_RESET_TYPE_WARM 1U /* Warm reset */ +#define SC_PM_RESET_TYPE_BOARD 2U /* Board reset */ /*@}*/ /*! * @name Defines for sc_pm_reset_reason_t */ /*@{*/ -#define SC_PM_RESET_REASON_POR 0U /* Power on reset */ -#define SC_PM_RESET_REASON_JTAG 1U /* JTAG reset */ -#define SC_PM_RESET_REASON_SW 2U /* Software reset */ -#define SC_PM_RESET_REASON_WDOG 3U /* Partition watchdog reset */ -#define SC_PM_RESET_REASON_LOCKUP 4U /* SCU lockup reset */ -#define SC_PM_RESET_REASON_SNVS 5U /* SNVS reset */ -#define SC_PM_RESET_REASON_TEMP 6U /* Temp panic reset */ -#define SC_PM_RESET_REASON_MSI 7U /* MSI reset */ -#define SC_PM_RESET_REASON_UECC 8U /* ECC reset */ -#define SC_PM_RESET_REASON_SCFW_WDOG 9U /* SCFW watchdog reset */ -#define SC_PM_RESET_REASON_ROM_WDOG 10U /* SCU ROM watchdog reset */ -#define SC_PM_RESET_REASON_SECO 11U /* SECO reset */ -#define SC_PM_RESET_REASON_SCFW_FAULT 12U /* SCFW fault reset */ +#define SC_PM_RESET_REASON_POR 0U /* Power on reset */ +#define SC_PM_RESET_REASON_JTAG 1U /* JTAG reset */ +#define SC_PM_RESET_REASON_SW 2U /* Software reset */ +#define SC_PM_RESET_REASON_WDOG 3U /* Partition watchdog reset */ +#define SC_PM_RESET_REASON_LOCKUP 4U /* SCU lockup reset */ +#define SC_PM_RESET_REASON_SNVS 5U /* SNVS reset */ +#define SC_PM_RESET_REASON_TEMP 6U /* Temp panic reset */ +#define SC_PM_RESET_REASON_MSI 7U /* MSI reset */ +#define SC_PM_RESET_REASON_UECC 8U /* ECC reset */ +#define SC_PM_RESET_REASON_SCFW_WDOG 9U /* SCFW watchdog reset */ +#define SC_PM_RESET_REASON_ROM_WDOG 10U /* SCU ROM watchdog reset */ +#define SC_PM_RESET_REASON_SECO 11U /* SECO reset */ +#define SC_PM_RESET_REASON_SCFW_FAULT 12U /* SCFW fault reset */ /*@}*/ /*! * @name Defines for sc_pm_sys_if_t */ /*@{*/ -#define SC_PM_SYS_IF_INTERCONNECT 0U /* System interconnect */ -#define SC_PM_SYS_IF_MU 1U /* AP -> SCU message units */ -#define SC_PM_SYS_IF_OCMEM 2U /* On-chip memory (ROM/OCRAM) */ -#define SC_PM_SYS_IF_DDR 3U /* DDR memory */ +#define SC_PM_SYS_IF_INTERCONNECT 0U /* System interconnect */ +#define SC_PM_SYS_IF_MU 1U /* AP -> SCU message units */ +#define SC_PM_SYS_IF_OCMEM 2U /* On-chip memory (ROM/OCRAM) */ +#define SC_PM_SYS_IF_DDR 3U /* DDR memory */ /*@}*/ /*! * @name Defines for sc_pm_wake_src_t */ /*@{*/ -#define SC_PM_WAKE_SRC_NONE 0U /* No wake source, used for self-kill */ -#define SC_PM_WAKE_SRC_SCU 1U /* Wakeup from SCU to resume CPU (IRQSTEER & GIC powered down) */ -#define SC_PM_WAKE_SRC_IRQSTEER 2U /* Wakeup from IRQSTEER to resume CPU (GIC powered down) */ -#define SC_PM_WAKE_SRC_IRQSTEER_GIC 3U /* Wakeup from IRQSTEER+GIC to wake CPU (GIC clock gated) */ -#define SC_PM_WAKE_SRC_GIC 4U /* Wakeup from GIC to wake CPU */ +#define SC_PM_WAKE_SRC_NONE 0U /* No wake source, used for self-kill */ +#define SC_PM_WAKE_SRC_SCU 1U /* Wakeup from SCU to resume CPU (IRQSTEER & GIC powered down) */ +#define SC_PM_WAKE_SRC_IRQSTEER 2U /* Wakeup from IRQSTEER to resume CPU (GIC powered down) */ +#define SC_PM_WAKE_SRC_IRQSTEER_GIC 3U /* Wakeup from IRQSTEER+GIC to wake CPU (GIC clock gated) */ +#define SC_PM_WAKE_SRC_GIC 4U /* Wakeup from GIC to wake CPU */ /*@}*/ /* Types */ @@ -247,7 +247,7 @@ sc_err_t sc_pm_set_sys_power_mode(sc_ipc_t ipc, sc_pm_power_mode_t mode); * individual resource mode set using sc_pm_set_resource_power_mode(). */ sc_err_t sc_pm_set_partition_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, - sc_pm_power_mode_t mode); + sc_pm_power_mode_t mode); /*! * This function gets the power mode of a partition. @@ -262,7 +262,24 @@ sc_err_t sc_pm_set_partition_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, * - SC_ERR_PARM if invalid partition */ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, - sc_pm_power_mode_t *mode); + sc_pm_power_mode_t *mode); + +/*! + * This function sends a wake interrupt to a partition. + * + * @param[in] ipc IPC handle + * @param[in] pt handle of partition to wake + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * An SC_IRQ_SW_WAKE interrupt is sent to all MUs owned by the + * partition that have this interrupt enabled. The CPU using an + * MU will exit a low-power state to service the MU interrupt. + * + * Return errors: + * - SC_ERR_PARM if invalid partition + */ +sc_err_t sc_pm_partition_wake(sc_ipc_t ipc, sc_rm_pt_t pt); /*! * This function sets the power mode of a resource. @@ -275,6 +292,7 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, * * Return errors: * - SC_ERR_PARM if invalid resource or mode, + * - SC_ERR_PARM if resource is the MU used to make the call, * - SC_ERR_NOACCESS if caller's partition is not the resource owner * or parent of the owner * @@ -300,7 +318,7 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, * infrastructure (bus fabrics, clock domains, etc.). */ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_power_mode_t mode); + sc_pm_power_mode_t mode); /*! * This function sets the power mode for all the resources owned @@ -316,7 +334,7 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, * Return errors: * - SC_ERR_PARM if invalid partition or mode, * - SC_ERR_NOACCESS if caller's partition is not the parent -* of \a pt +* (with grant) of \a pt * * This functions loops through all the resources owned by \a pt * and sets the power mode to \a mode. It will skip setting @@ -326,7 +344,9 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, * implement some aspects of virtualization. */ sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, - sc_rm_pt_t pt, sc_pm_power_mode_t mode, sc_rsrc_t exclude); + sc_rm_pt_t pt, + sc_pm_power_mode_t mode, + sc_rsrc_t exclude); /*! * This function gets the power mode of a resource. @@ -341,10 +361,10 @@ sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, * returned does not reflect the power mode of the partition.. */ sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_power_mode_t *mode); + sc_pm_power_mode_t *mode); /*! - * This function requests the low power mode some of the resources + * This function specifies the low power mode some of the resources * can enter based on their state. This API is only valid for the * following resources : SC_R_A53, SC_R_A53_0, SC_R_A53_1, SC_A53_2, * SC_A53_3, SC_R_A72, SC_R_A72_0, SC_R_A72_1, SC_R_CC1, SC_R_A35, @@ -362,7 +382,7 @@ sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, * */ sc_err_t sc_pm_req_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_power_mode_t mode); + sc_pm_power_mode_t mode); /*! * This function requests low-power mode entry for CPU/cluster @@ -385,7 +405,8 @@ sc_err_t sc_pm_req_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, * */ sc_err_t sc_pm_req_cpu_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_power_mode_t mode, sc_pm_wake_src_t wake_src); + sc_pm_power_mode_t mode, + sc_pm_wake_src_t wake_src); /*! * This function is used to set the resume address of a CPU. @@ -400,9 +421,12 @@ sc_err_t sc_pm_req_cpu_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, * - SC_ERR_PARM if invalid resource or address, * - SC_ERR_NOACCESS if caller's partition is not the parent of the * resource (CPU) owner + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_set_cpu_resume_addr(sc_ipc_t ipc, sc_rsrc_t resource, - sc_faddr_t address); + sc_faddr_t address); /*! * This function is used to set parameters for CPU resume from @@ -419,13 +443,16 @@ sc_err_t sc_pm_set_cpu_resume_addr(sc_ipc_t ipc, sc_rsrc_t resource, * - SC_ERR_PARM if invalid resource or address, * - SC_ERR_NOACCESS if caller's partition is not the parent of the * resource (CPU) owner + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_set_cpu_resume(sc_ipc_t ipc, sc_rsrc_t resource, - sc_bool_t isPrimary, sc_faddr_t address); + sc_bool_t isPrimary, sc_faddr_t address); /*! * This function requests the power mode configuration for system-level - * interfaces including messaging units, interconnect, and memories. This API + * interfaces including messaging units, interconnect, and memories. This API * is only valid for the following resources : SC_R_A53, SC_R_A72, and * SC_R_M4_x_PID_y. For all other resources, it will return SC_ERR_PARAM. * The requested power mode will be captured and applied to system-level @@ -441,7 +468,9 @@ sc_err_t sc_pm_set_cpu_resume(sc_ipc_t ipc, sc_rsrc_t resource, * */ sc_err_t sc_pm_req_sys_if_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_sys_if_t sys_if, sc_pm_power_mode_t hpm, sc_pm_power_mode_t lpm); + sc_pm_sys_if_t sys_if, + sc_pm_power_mode_t hpm, + sc_pm_power_mode_t lpm); /* @} */ @@ -470,7 +499,7 @@ sc_err_t sc_pm_req_sys_if_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, * Refer to the [Clock List](@ref CLOCKS) for valid clock/PLL values. */ sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_pm_clock_rate_t *rate); + sc_pm_clk_t clk, sc_pm_clock_rate_t *rate); /*! * This function gets the rate of a resource's clock/PLL. @@ -488,10 +517,14 @@ sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, * or parent of the owner, * - SC_ERR_UNAVAILABLE if clock/PLL not applicable to this resource * + * This function returns the actual clock rate of the hardware. This rate + * may be different from the original requested clock rate if the resource + * is set to a low power mode. + * * Refer to the [Clock List](@ref CLOCKS) for valid clock/PLL values. */ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_pm_clock_rate_t *rate); + sc_pm_clk_t clk, sc_pm_clock_rate_t *rate); /*! * This function enables/disables a resource's clock. @@ -513,13 +546,13 @@ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, * Return errors: * - SC_ERR_PARM if invalid resource or clock, * - SC_ERR_NOACCESS if caller's partition is not the resource owner - * or parent of the owner, + * or parent (with grant) of the owner, * - SC_ERR_UNAVAILABLE if clock not applicable to this resource * * Refer to the [Clock List](@ref CLOCKS) for valid clock values. */ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog); + sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog); /*! * This function sets the parent of a resource's clock. @@ -528,14 +561,14 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, * @param[in] ipc IPC handle * @param[in] resource ID of the resource * @param[in] clk clock to affect - * @param[in] parent New parent of the clock. + * @param[in] parent New parent of the clock * * @return Returns an error code (SC_ERR_NONE = success). * * Return errors: * - SC_ERR_PARM if invalid resource or clock, * - SC_ERR_NOACCESS if caller's partition is not the resource owner - * or parent of the owner, + * or parent (with grant) of the owner, * - SC_ERR_UNAVAILABLE if clock not applicable to this resource * - SC_ERR_BUSY if clock is currently enabled. * - SC_ERR_NOPOWER if resource not powered @@ -543,7 +576,7 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, * Refer to the [Clock List](@ref CLOCKS) for valid clock values. */ sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_pm_clk_parent_t parent); + sc_pm_clk_t clk, sc_pm_clk_parent_t parent); /*! * This function gets the parent of a resource's clock. @@ -551,7 +584,7 @@ sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, * @param[in] ipc IPC handle * @param[in] resource ID of the resource * @param[in] clk clock to affect - * @param[out] parent pointer to return parent of clock. + * @param[out] parent pointer to return parent of clock * * @return Returns an error code (SC_ERR_NONE = success). * @@ -564,7 +597,7 @@ sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, * Refer to the [Clock List](@ref CLOCKS) for valid clock values. */ sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, - sc_pm_clk_t clk, sc_pm_clk_parent_t *parent); + sc_pm_clk_t clk, sc_pm_clk_parent_t *parent); /* @} */ @@ -647,10 +680,13 @@ sc_err_t sc_pm_get_reset_part(sc_ipc_t ipc, sc_rm_pt_t *pt); * This must be used to boot a partition. Only a partition booted this * way can be rebooted using the watchdog, sc_pm_boot() or * sc_pm_reboot_partition(). + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, - sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, - sc_rsrc_t resource_mu, sc_rsrc_t resource_dev); + sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, + sc_rsrc_t resource_mu, sc_rsrc_t resource_dev); /*! * This function is used to change the boot parameters for a partition. @@ -669,10 +705,13 @@ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt, * This function can be used to change the boot parameters for a partition. * This can be useful if a partitions reboots differently from the initial * boot done via sc_pm_boot() or via ROM. + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_set_boot_parm(sc_ipc_t ipc, - sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, - sc_rsrc_t resource_mu, sc_rsrc_t resource_dev); + sc_rsrc_t resource_cpu, sc_faddr_t boot_addr, + sc_rsrc_t resource_mu, sc_rsrc_t resource_dev); /*! * This function is used to reboot the caller's partition. @@ -725,7 +764,7 @@ void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type); * sc_pm_reboot_continue() to continue the boot. */ sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt, - sc_pm_reset_type_t type); + sc_pm_reset_type_t type); /*! * This function is used to continue the reboot a partition. @@ -756,17 +795,20 @@ sc_err_t sc_pm_reboot_continue(sc_ipc_t ipc, sc_rm_pt_t pt); * resource (CPU) owner * * This function is usually used to start a secondar CPU in the - * same partition as the caller. It is not used to start the first - * CPU in a dedicated partition. That would be started by calling + * same partition as the caller. It is not used to start the first + * CPU in a dedicated partition. That would be started by calling * sc_pm_boot(). * * A CPU started with sc_pm_cpu_start() will not restart as a result * of a watchdog event or calling sc_pm_reboot() or sc_pm_reboot_partition(). * Those will reboot that partition which will start the CPU started with * sc_pm_boot(). + * + * Note the address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, - sc_faddr_t address); + sc_faddr_t address); /*! * This function is used to reset a CPU. @@ -784,10 +826,36 @@ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, * Note this just resets the CPU. None of the peripherals or bus fabric used by * the CPU is reset. State configured in the SCFW is not reset. The SW running * on the core has to understand and deal with this. + * + * The address is limited by the hardware implementation. See the + * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide. */ void sc_pm_cpu_reset(sc_ipc_t ipc, sc_rsrc_t resource, sc_faddr_t address); /*! + * This function is used to reset a peripheral. + * + * @param[in] ipc IPC handle + * @param[in] resource resource to reset + * + * This function will reset a resource. Most resources cannot be reset unless + * the SoC design specifically allows it. In the case on MUs, the IPC/RPC + * protocol is also reset. Note a caller cannot reset an MU that this API + * call is sent on. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid resource, + * - SC_ERR_PARM if resource is the MU used to make the call, + * - SC_ERR_NOACCESS if caller's partition is not the resource owner or parent + * (with grant) of the owner, + * - SC_ERR_BUSY if the resource cannot be reset bdue to power state of buses, + * - SC_ERR_UNAVAILABLE if the resource cannot be reset due to hardware limitations + */ +sc_err_t sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource); + +/*! * This function returns a bool indicating if a partition was started. * * @param[in] ipc IPC handle @@ -802,7 +870,6 @@ sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt); /* @} */ -#endif /* SC_PM_API_H */ +#endif /* SC_PM_API_H */ /**@}*/ - |