diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/fsl-diu-fb.h | 92 | ||||
| -rw-r--r-- | include/video/omap-panel-dvi.h | 37 | ||||
| -rw-r--r-- | include/video/omap-panel-n8x0.h | 15 | ||||
| -rw-r--r-- | include/video/omap-panel-nokia-dsi.h | 8 | ||||
| -rw-r--r-- | include/video/omap-panel-picodlp.h | 23 | ||||
| -rw-r--r-- | include/video/omapdss.h | 100 | ||||
| -rw-r--r-- | include/video/sh_mobile_lcdc.h | 135 | ||||
| -rw-r--r-- | include/video/udlfb.h | 1 |
8 files changed, 300 insertions, 111 deletions
diff --git a/include/linux/fsl-diu-fb.h b/include/linux/fsl-diu-fb.h index daa9952d2174..11c16a1fb9e3 100644 --- a/include/linux/fsl-diu-fb.h +++ b/include/linux/fsl-diu-fb.h @@ -20,18 +20,8 @@ #ifndef __FSL_DIU_FB_H__ #define __FSL_DIU_FB_H__ -/* Arbitrary threshold to determine the allocation method - * See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory() - */ -#define MEM_ALLOC_THRESHOLD (1024*768*4+32) - #include <linux/types.h> -struct mfb_alpha { - int enable; - int alpha; -}; - struct mfb_chroma_key { int enable; __u8 red_max; @@ -43,25 +33,29 @@ struct mfb_chroma_key { }; struct aoi_display_offset { - int x_aoi_d; - int y_aoi_d; + __s32 x_aoi_d; + __s32 y_aoi_d; }; #define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key) #define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8) +#define MFB_SET_ALPHA _IOW('M', 0, __u8) +#define MFB_GET_ALPHA _IOR('M', 0, __u8) +#define MFB_SET_AOID _IOW('M', 4, struct aoi_display_offset) +#define MFB_GET_AOID _IOR('M', 4, struct aoi_display_offset) +#define MFB_SET_PIXFMT _IOW('M', 8, __u32) +#define MFB_GET_PIXFMT _IOR('M', 8, __u32) -#define MFB_SET_ALPHA 0x80014d00 -#define MFB_GET_ALPHA 0x40014d00 -#define MFB_SET_AOID 0x80084d04 -#define MFB_GET_AOID 0x40084d04 -#define MFB_SET_PIXFMT 0x80014d08 -#define MFB_GET_PIXFMT 0x40014d08 - -#define FBIOGET_GWINFO 0x46E0 -#define FBIOPUT_GWINFO 0x46E1 +/* + * The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the + * wrong value for 'size' field of the ioctl. The current macros above use the + * right size, but we still need to provide backwards compatibility, at least + * for a while. +*/ +#define MFB_SET_PIXFMT_OLD 0x80014d08 +#define MFB_GET_PIXFMT_OLD 0x40014d08 #ifdef __KERNEL__ -#include <linux/spinlock.h> /* * These are the fields of area descriptor(in DDR memory) for every plane @@ -159,58 +153,12 @@ struct diu { __be32 plut; } __attribute__ ((packed)); -struct diu_hw { - struct diu *diu_reg; - spinlock_t reg_lock; - - __u32 mode; /* DIU operation mode */ -}; - -struct diu_addr { - __u8 __iomem *vaddr; /* Virtual address */ - dma_addr_t paddr; /* Physical address */ - __u32 offset; -}; - -struct diu_pool { - struct diu_addr ad; - struct diu_addr gamma; - struct diu_addr pallete; - struct diu_addr cursor; -}; - -#define FSL_DIU_BASE_OFFSET 0x2C000 /* Offset of DIU */ -#define INT_LCDC 64 /* DIU interrupt number */ - -#define FSL_AOI_NUM 6 /* 5 AOIs and one dummy AOI */ - /* 1 for plane 0, 2 for plane 1&2 each */ - -/* Minimum X and Y resolutions */ -#define MIN_XRES 64 -#define MIN_YRES 64 - -/* HW cursor parameters */ -#define MAX_CURS 32 - -/* Modes of operation of DIU */ +/* + * Modes of operation of DIU. The DIU supports five different modes, but + * the driver only supports modes 0 and 1. + */ #define MFB_MODE0 0 /* DIU off */ #define MFB_MODE1 1 /* All three planes output to display */ -#define MFB_MODE2 2 /* Plane 1 to display, planes 2+3 written back*/ -#define MFB_MODE3 3 /* All three planes written back to memory */ -#define MFB_MODE4 4 /* Color bar generation */ - -/* INT_STATUS/INT_MASK field descriptions */ -#define INT_VSYNC 0x01 /* Vsync interrupt */ -#define INT_VSYNC_WB 0x02 /* Vsync interrupt for write back operation */ -#define INT_UNDRUN 0x04 /* Under run exception interrupt */ -#define INT_PARERR 0x08 /* Display parameters error interrupt */ -#define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */ - -/* Panels'operation modes */ -#define MFB_TYPE_OUTPUT 0 /* Panel output to display */ -#define MFB_TYPE_OFF 1 /* Panel off */ -#define MFB_TYPE_WB 2 /* Panel written back to memory */ -#define MFB_TYPE_TEST 3 /* Panel generate color bar */ #endif /* __KERNEL__ */ #endif /* __FSL_DIU_FB_H__ */ diff --git a/include/video/omap-panel-dvi.h b/include/video/omap-panel-dvi.h new file mode 100644 index 000000000000..87ad567b4229 --- /dev/null +++ b/include/video/omap-panel-dvi.h @@ -0,0 +1,37 @@ +/* + * Header for DVI output driver + * + * Copyright (C) 2011 Texas Instruments Inc + * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __OMAP_PANEL_DVI_H +#define __OMAP_PANEL_DVI_H + +struct omap_dss_device; + +/** + * struct panel_dvi_platform_data - panel driver configuration data + * @platform_enable: platform specific panel enable function + * @platform_disable: platform specific panel disable function + * @i2c_bus_num: i2c bus id for the panel + */ +struct panel_dvi_platform_data { + int (*platform_enable)(struct omap_dss_device *dssdev); + void (*platform_disable)(struct omap_dss_device *dssdev); + u16 i2c_bus_num; +}; + +#endif /* __OMAP_PANEL_DVI_H */ diff --git a/include/video/omap-panel-n8x0.h b/include/video/omap-panel-n8x0.h new file mode 100644 index 000000000000..50a1302e2cfd --- /dev/null +++ b/include/video/omap-panel-n8x0.h @@ -0,0 +1,15 @@ +#ifndef __OMAP_PANEL_N8X0_H +#define __OMAP_PANEL_N8X0_H + +struct omap_dss_device; + +struct panel_n8x0_data { + int (*platform_enable)(struct omap_dss_device *dssdev); + void (*platform_disable)(struct omap_dss_device *dssdev); + int panel_reset; + int ctrl_pwrdown; + + int (*set_backlight)(struct omap_dss_device *dssdev, int level); +}; + +#endif diff --git a/include/video/omap-panel-nokia-dsi.h b/include/video/omap-panel-nokia-dsi.h index 921ae9327228..7dc71f9c13e6 100644 --- a/include/video/omap-panel-nokia-dsi.h +++ b/include/video/omap-panel-nokia-dsi.h @@ -10,9 +10,7 @@ struct omap_dss_device; * @ext_te_gpio: external TE GPIO * @esd_interval: interval of ESD checks, 0 = disabled (ms) * @ulps_timeout: time to wait before entering ULPS, 0 = disabled (ms) - * @max_backlight_level: maximum backlight level - * @set_backlight: pointer to backlight set function - * @get_backlight: pointer to backlight get function + * @use_dsi_backlight: true if panel uses DSI command to control backlight */ struct nokia_dsi_panel_data { const char *name; @@ -25,9 +23,7 @@ struct nokia_dsi_panel_data { unsigned esd_interval; unsigned ulps_timeout; - int max_backlight_level; - int (*set_backlight)(struct omap_dss_device *dssdev, int level); - int (*get_backlight)(struct omap_dss_device *dssdev); + bool use_dsi_backlight; }; #endif /* __OMAP_NOKIA_DSI_PANEL_H */ diff --git a/include/video/omap-panel-picodlp.h b/include/video/omap-panel-picodlp.h new file mode 100644 index 000000000000..1c342ef6f3a1 --- /dev/null +++ b/include/video/omap-panel-picodlp.h @@ -0,0 +1,23 @@ +/* + * panel data for picodlp panel + * + * Copyright (C) 2011 Texas Instruments + * + * Author: Mayuresh Janorkar <mayur@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __PANEL_PICODLP_H +#define __PANEL_PICODLP_H +/** + * struct : picodlp panel data + * picodlp_adapter_id: i2c_adapter number for picodlp + */ +struct picodlp_panel_data { + int picodlp_adapter_id; + int emu_done_gpio; + int pwrgood_gpio; +}; +#endif /* __PANEL_PICODLP_H */ diff --git a/include/video/omapdss.h b/include/video/omapdss.h index 3b55ef22f8db..b66ebb2032c6 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h @@ -41,8 +41,13 @@ #define DISPC_IRQ_WAKEUP (1 << 16) #define DISPC_IRQ_SYNC_LOST2 (1 << 17) #define DISPC_IRQ_VSYNC2 (1 << 18) +#define DISPC_IRQ_VID3_END_WIN (1 << 19) +#define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20) #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21) #define DISPC_IRQ_FRAMEDONE2 (1 << 22) +#define DISPC_IRQ_FRAMEDONEWB (1 << 23) +#define DISPC_IRQ_FRAMEDONETV (1 << 24) +#define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25) struct omap_dss_device; struct omap_overlay_manager; @@ -60,7 +65,8 @@ enum omap_display_type { enum omap_plane { OMAP_DSS_GFX = 0, OMAP_DSS_VIDEO1 = 1, - OMAP_DSS_VIDEO2 = 2 + OMAP_DSS_VIDEO2 = 2, + OMAP_DSS_VIDEO3 = 3, }; enum omap_channel { @@ -129,6 +135,18 @@ enum omap_dss_venc_type { OMAP_DSS_VENC_TYPE_SVIDEO, }; +enum omap_dss_dsi_pixel_format { + OMAP_DSS_DSI_FMT_RGB888, + OMAP_DSS_DSI_FMT_RGB666, + OMAP_DSS_DSI_FMT_RGB666_PACKED, + OMAP_DSS_DSI_FMT_RGB565, +}; + +enum omap_dss_dsi_mode { + OMAP_DSS_DSI_CMD_MODE = 0, + OMAP_DSS_DSI_VIDEO_MODE, +}; + enum omap_display_caps { OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0, OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1, @@ -162,11 +180,13 @@ enum omap_dss_rotation_angle { enum omap_overlay_caps { OMAP_DSS_OVL_CAP_SCALE = 1 << 0, - OMAP_DSS_OVL_CAP_DISPC = 1 << 1, + OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1, + OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2, + OMAP_DSS_OVL_CAP_ZORDER = 1 << 3, }; enum omap_overlay_manager_caps { - OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0, + OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */ }; enum omap_dss_clk_source { @@ -215,26 +235,67 @@ void rfbi_bus_lock(void); void rfbi_bus_unlock(void); /* DSI */ + +struct omap_dss_dsi_videomode_data { + /* DSI video mode blanking data */ + /* Unit: byte clock cycles */ + u16 hsa; + u16 hfp; + u16 hbp; + /* Unit: line clocks */ + u16 vsa; + u16 vfp; + u16 vbp; + + /* DSI blanking modes */ + int blanking_mode; + int hsa_blanking_mode; + int hbp_blanking_mode; + int hfp_blanking_mode; + + /* Video port sync events */ + int vp_de_pol; + int vp_hsync_pol; + int vp_vsync_pol; + bool vp_vsync_end; + bool vp_hsync_end; + + bool ddr_clk_always_on; + int window_sync; +}; + void dsi_bus_lock(struct omap_dss_device *dssdev); void dsi_bus_unlock(struct omap_dss_device *dssdev); int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data, int len); -int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, - u8 dcs_cmd); +int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data, + int len); +int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd); +int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel); int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, u8 param); +int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel, + u8 param); +int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel, + u8 param1, u8 param2); int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel, u8 *data, int len); +int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel, + u8 *data, int len); int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, u8 *buf, int buflen); -int dsi_vc_dcs_read_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, - u8 *data); -int dsi_vc_dcs_read_2(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, - u8 *data1, u8 *data2); +int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf, + int buflen); +int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param, + u8 *buf, int buflen); +int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel, + u8 param1, u8 param2, u8 *buf, int buflen); int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel, u16 len); int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel); int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel); +int dsi_video_mode_enable(struct omap_dss_device *dssdev, int channel); +void dsi_video_mode_disable(struct omap_dss_device *dssdev, int channel); /* Board specific data */ struct omap_dss_board_info { @@ -242,7 +303,8 @@ struct omap_dss_board_info { int num_devices; struct omap_dss_device **devices; struct omap_dss_device *default_device; - void (*dsi_mux_pads)(bool enable); + int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask); + void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask); }; #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS) @@ -300,7 +362,6 @@ struct omap_overlay_info { bool enabled; u32 paddr; - void __iomem *vaddr; u32 p_uv_addr; /* for NV12 format */ u16 screen_width; u16 width; @@ -316,6 +377,7 @@ struct omap_overlay_info { u16 out_height; /* if 0, out_height == height */ u8 global_alpha; u8 pre_mult_alpha; + u8 zorder; }; struct omap_overlay { @@ -324,7 +386,7 @@ struct omap_overlay { /* static fields */ const char *name; - int id; + enum omap_plane id; enum omap_color_mode supported_modes; enum omap_overlay_caps caps; @@ -332,6 +394,7 @@ struct omap_overlay { struct omap_overlay_manager *manager; struct omap_overlay_info info; + bool manager_changed; /* if true, info has been changed, but not applied() yet */ bool info_dirty; @@ -354,7 +417,7 @@ struct omap_overlay_manager_info { u32 trans_key; bool trans_enabled; - bool alpha_enabled; + bool partial_alpha_enabled; bool cpr_enable; struct omap_dss_cpr_coefs cpr_coefs; @@ -366,7 +429,7 @@ struct omap_overlay_manager { /* static fields */ const char *name; - int id; + enum omap_channel id; enum omap_overlay_manager_caps caps; int num_overlays; struct omap_overlay **overlays; @@ -454,6 +517,7 @@ struct omap_dss_device { } dispc; struct { + /* regn is one greater than TRM's REGN value */ u16 regn; u16 regm; u16 regm_dispc; @@ -464,6 +528,7 @@ struct omap_dss_device { } dsi; struct { + /* regn is one greater than TRM's REGN value */ u16 regn; u16 regm2; } hdmi; @@ -477,6 +542,10 @@ struct omap_dss_device { int acb; /* ac-bias pin frequency */ enum omap_panel_config config; + + enum omap_dss_dsi_pixel_format dsi_pix_fmt; + enum omap_dss_dsi_mode dsi_mode; + struct omap_dss_dsi_videomode_data dsi_vm_data; } panel; struct { @@ -557,6 +626,9 @@ struct omap_dss_driver { int (*set_wss)(struct omap_dss_device *dssdev, u32 wss); u32 (*get_wss)(struct omap_dss_device *dssdev); + + int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len); + bool (*detect)(struct omap_dss_device *dssdev); }; int omap_dss_register_driver(struct omap_dss_driver *); diff --git a/include/video/sh_mobile_lcdc.h b/include/video/sh_mobile_lcdc.h index d964e68fc61d..8101b726b48a 100644 --- a/include/video/sh_mobile_lcdc.h +++ b/include/video/sh_mobile_lcdc.h @@ -4,26 +4,123 @@ #include <linux/fb.h> #include <video/sh_mobile_meram.h> +/* Register definitions */ +#define _LDDCKR 0x410 +#define LDDCKR_ICKSEL_BUS (0 << 16) +#define LDDCKR_ICKSEL_MIPI (1 << 16) +#define LDDCKR_ICKSEL_HDMI (2 << 16) +#define LDDCKR_ICKSEL_EXT (3 << 16) +#define LDDCKR_ICKSEL_MASK (7 << 16) +#define LDDCKR_MOSEL (1 << 6) +#define _LDDCKSTPR 0x414 +#define _LDINTR 0x468 +#define LDINTR_FE (1 << 10) +#define LDINTR_VSE (1 << 9) +#define LDINTR_VEE (1 << 8) +#define LDINTR_FS (1 << 2) +#define LDINTR_VSS (1 << 1) +#define LDINTR_VES (1 << 0) +#define LDINTR_STATUS_MASK (0xff << 0) +#define _LDSR 0x46c +#define LDSR_MSS (1 << 10) +#define LDSR_MRS (1 << 8) +#define LDSR_AS (1 << 1) +#define _LDCNT1R 0x470 +#define LDCNT1R_DE (1 << 0) +#define _LDCNT2R 0x474 +#define LDCNT2R_BR (1 << 8) +#define LDCNT2R_MD (1 << 3) +#define LDCNT2R_SE (1 << 2) +#define LDCNT2R_ME (1 << 1) +#define LDCNT2R_DO (1 << 0) +#define _LDRCNTR 0x478 +#define LDRCNTR_SRS (1 << 17) +#define LDRCNTR_SRC (1 << 16) +#define LDRCNTR_MRS (1 << 1) +#define LDRCNTR_MRC (1 << 0) +#define _LDDDSR 0x47c +#define LDDDSR_LS (1 << 2) +#define LDDDSR_WS (1 << 1) +#define LDDDSR_BS (1 << 0) + +#define LDMT1R_VPOL (1 << 28) +#define LDMT1R_HPOL (1 << 27) +#define LDMT1R_DWPOL (1 << 26) +#define LDMT1R_DIPOL (1 << 25) +#define LDMT1R_DAPOL (1 << 24) +#define LDMT1R_HSCNT (1 << 17) +#define LDMT1R_DWCNT (1 << 16) +#define LDMT1R_IFM (1 << 12) +#define LDMT1R_MIFTYP_RGB8 (0x0 << 0) +#define LDMT1R_MIFTYP_RGB9 (0x4 << 0) +#define LDMT1R_MIFTYP_RGB12A (0x5 << 0) +#define LDMT1R_MIFTYP_RGB12B (0x6 << 0) +#define LDMT1R_MIFTYP_RGB16 (0x7 << 0) +#define LDMT1R_MIFTYP_RGB18 (0xa << 0) +#define LDMT1R_MIFTYP_RGB24 (0xb << 0) +#define LDMT1R_MIFTYP_YCBCR (0xf << 0) +#define LDMT1R_MIFTYP_SYS8A (0x0 << 0) +#define LDMT1R_MIFTYP_SYS8B (0x1 << 0) +#define LDMT1R_MIFTYP_SYS8C (0x2 << 0) +#define LDMT1R_MIFTYP_SYS8D (0x3 << 0) +#define LDMT1R_MIFTYP_SYS9 (0x4 << 0) +#define LDMT1R_MIFTYP_SYS12 (0x5 << 0) +#define LDMT1R_MIFTYP_SYS16A (0x7 << 0) +#define LDMT1R_MIFTYP_SYS16B (0x8 << 0) +#define LDMT1R_MIFTYP_SYS16C (0x9 << 0) +#define LDMT1R_MIFTYP_SYS18 (0xa << 0) +#define LDMT1R_MIFTYP_SYS24 (0xb << 0) +#define LDMT1R_MIFTYP_MASK (0xf << 0) + +#define LDDFR_CF1 (1 << 18) +#define LDDFR_CF0 (1 << 17) +#define LDDFR_CC (1 << 16) +#define LDDFR_YF_420 (0 << 8) +#define LDDFR_YF_422 (1 << 8) +#define LDDFR_YF_444 (2 << 8) +#define LDDFR_YF_MASK (3 << 8) +#define LDDFR_PKF_ARGB32 (0x00 << 0) +#define LDDFR_PKF_RGB16 (0x03 << 0) +#define LDDFR_PKF_RGB24 (0x0b << 0) +#define LDDFR_PKF_MASK (0x1f << 0) + +#define LDSM1R_OS (1 << 0) + +#define LDSM2R_OSTRG (1 << 0) + +#define LDPMR_LPS (3 << 0) + +#define _LDDWD0R 0x800 +#define LDDWDxR_WDACT (1 << 28) +#define LDDWDxR_RSW (1 << 24) +#define _LDDRDR 0x840 +#define LDDRDR_RSR (1 << 24) +#define LDDRDR_DRD_MASK (0x3ffff << 0) +#define _LDDWAR 0x900 +#define LDDWAR_WA (1 << 0) +#define _LDDRAR 0x904 +#define LDDRAR_RA (1 << 0) + enum { - RGB8, /* 24bpp, 8:8:8 */ - RGB9, /* 18bpp, 9:9 */ - RGB12A, /* 24bpp, 12:12 */ - RGB12B, /* 12bpp */ - RGB16, /* 16bpp */ - RGB18, /* 18bpp */ - RGB24, /* 24bpp */ - YUV422, /* 16bpp */ - SYS8A, /* 24bpp, 8:8:8 */ - SYS8B, /* 18bpp, 8:8:2 */ - SYS8C, /* 18bpp, 2:8:8 */ - SYS8D, /* 16bpp, 8:8 */ - SYS9, /* 18bpp, 9:9 */ - SYS12, /* 24bpp, 12:12 */ - SYS16A, /* 16bpp */ - SYS16B, /* 18bpp, 16:2 */ - SYS16C, /* 18bpp, 2:16 */ - SYS18, /* 18bpp */ - SYS24, /* 24bpp */ + RGB8 = LDMT1R_MIFTYP_RGB8, /* 24bpp, 8:8:8 */ + RGB9 = LDMT1R_MIFTYP_RGB9, /* 18bpp, 9:9 */ + RGB12A = LDMT1R_MIFTYP_RGB12A, /* 24bpp, 12:12 */ + RGB12B = LDMT1R_MIFTYP_RGB12B, /* 12bpp */ + RGB16 = LDMT1R_MIFTYP_RGB16, /* 16bpp */ + RGB18 = LDMT1R_MIFTYP_RGB18, /* 18bpp */ + RGB24 = LDMT1R_MIFTYP_RGB24, /* 24bpp */ + YUV422 = LDMT1R_MIFTYP_YCBCR, /* 16bpp */ + SYS8A = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8A, /* 24bpp, 8:8:8 */ + SYS8B = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8B, /* 18bpp, 8:8:2 */ + SYS8C = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8C, /* 18bpp, 2:8:8 */ + SYS8D = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8D, /* 16bpp, 8:8 */ + SYS9 = LDMT1R_IFM | LDMT1R_MIFTYP_SYS9, /* 18bpp, 9:9 */ + SYS12 = LDMT1R_IFM | LDMT1R_MIFTYP_SYS12, /* 24bpp, 12:12 */ + SYS16A = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16A, /* 16bpp */ + SYS16B = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16B, /* 18bpp, 16:2 */ + SYS16C = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16C, /* 18bpp, 2:16 */ + SYS18 = LDMT1R_IFM | LDMT1R_MIFTYP_SYS18, /* 18bpp */ + SYS24 = LDMT1R_IFM | LDMT1R_MIFTYP_SYS24, /* 24bpp */ }; enum { LCDC_CHAN_DISABLED = 0, diff --git a/include/video/udlfb.h b/include/video/udlfb.h index 69d485a4a026..c41f308c9636 100644 --- a/include/video/udlfb.h +++ b/include/video/udlfb.h @@ -50,6 +50,7 @@ struct dlfb_data { int base16; int base8; u32 pseudo_palette[256]; + int blank_mode; /*one of FB_BLANK_ */ /* blit-only rendering path metrics, exposed through sysfs */ atomic_t bytes_rendered; /* raw pixel-bytes driver asked to render */ atomic_t bytes_identical; /* saved effort with backbuffer comparison */ |