diff options
Diffstat (limited to 'include')
34 files changed, 940 insertions, 100 deletions
diff --git a/include/drm/drmP.h b/include/drm/drmP.h index 8ba35c622e22..e1b2e8b98af7 100644 --- a/include/drm/drmP.h +++ b/include/drm/drmP.h @@ -901,11 +901,15 @@ extern int drm_vblank_init(struct drm_device *dev, int num_crtcs); extern int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *filp); extern u32 drm_vblank_count(struct drm_device *dev, int crtc); +extern u32 drm_crtc_vblank_count(struct drm_crtc *crtc); extern u32 drm_vblank_count_and_time(struct drm_device *dev, int crtc, struct timeval *vblanktime); extern void drm_send_vblank_event(struct drm_device *dev, int crtc, struct drm_pending_vblank_event *e); +extern void drm_crtc_send_vblank_event(struct drm_crtc *crtc, + struct drm_pending_vblank_event *e); extern bool drm_handle_vblank(struct drm_device *dev, int crtc); +extern bool drm_crtc_handle_vblank(struct drm_crtc *crtc); extern int drm_vblank_get(struct drm_device *dev, int crtc); extern void drm_vblank_put(struct drm_device *dev, int crtc); extern int drm_crtc_vblank_get(struct drm_crtc *crtc); diff --git a/include/drm/drm_gem.h b/include/drm/drm_gem.h index 780511a459c0..1e6ae1458f7a 100644 --- a/include/drm/drm_gem.h +++ b/include/drm/drm_gem.h @@ -119,13 +119,6 @@ struct drm_gem_object { * simply leave it as NULL. */ struct dma_buf_attachment *import_attach; - - /** - * dumb - created as dumb buffer - * Whether the gem object was created using the dumb buffer interface - * as such it may not be used for GPU rendering. - */ - bool dumb; }; void drm_gem_object_release(struct drm_gem_object *obj); diff --git a/include/dt-bindings/clock/exynos4415.h b/include/dt-bindings/clock/exynos4415.h new file mode 100644 index 000000000000..7eed55100721 --- /dev/null +++ b/include/dt-bindings/clock/exynos4415.h @@ -0,0 +1,360 @@ +/* + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Author: Chanwoo Choi <cw00.choi@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants for Samsung Exynos4415 clock controllers. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS4415_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS4415_CLOCK_H + +/* + * Let each exported clock get a unique index, which is used on DT-enabled + * platforms to lookup the clock from a clock specifier. These indices are + * therefore considered an ABI and so must not be changed. This implies + * that new clocks should be added either in free spaces between clock groups + * or at the end. + */ + +/* + * Main CMU + */ + +#define CLK_OSCSEL 1 +#define CLK_FIN_PLL 2 +#define CLK_FOUT_APLL 3 +#define CLK_FOUT_MPLL 4 +#define CLK_FOUT_EPLL 5 +#define CLK_FOUT_G3D_PLL 6 +#define CLK_FOUT_ISP_PLL 7 +#define CLK_FOUT_DISP_PLL 8 + +/* Muxes */ +#define CLK_MOUT_MPLL_USER_L 16 +#define CLK_MOUT_GDL 17 +#define CLK_MOUT_MPLL_USER_R 18 +#define CLK_MOUT_GDR 19 +#define CLK_MOUT_EBI 20 +#define CLK_MOUT_ACLK_200 21 +#define CLK_MOUT_ACLK_160 22 +#define CLK_MOUT_ACLK_100 23 +#define CLK_MOUT_ACLK_266 24 +#define CLK_MOUT_G3D_PLL 25 +#define CLK_MOUT_EPLL 26 +#define CLK_MOUT_EBI_1 27 +#define CLK_MOUT_ISP_PLL 28 +#define CLK_MOUT_DISP_PLL 29 +#define CLK_MOUT_MPLL_USER_T 30 +#define CLK_MOUT_ACLK_400_MCUISP 31 +#define CLK_MOUT_G3D_PLLSRC 32 +#define CLK_MOUT_CSIS1 33 +#define CLK_MOUT_CSIS0 34 +#define CLK_MOUT_CAM1 35 +#define CLK_MOUT_FIMC3_LCLK 36 +#define CLK_MOUT_FIMC2_LCLK 37 +#define CLK_MOUT_FIMC1_LCLK 38 +#define CLK_MOUT_FIMC0_LCLK 39 +#define CLK_MOUT_MFC 40 +#define CLK_MOUT_MFC_1 41 +#define CLK_MOUT_MFC_0 42 +#define CLK_MOUT_G3D 43 +#define CLK_MOUT_G3D_1 44 +#define CLK_MOUT_G3D_0 45 +#define CLK_MOUT_MIPI0 46 +#define CLK_MOUT_FIMD0 47 +#define CLK_MOUT_TSADC_ISP 48 +#define CLK_MOUT_UART_ISP 49 +#define CLK_MOUT_SPI1_ISP 50 +#define CLK_MOUT_SPI0_ISP 51 +#define CLK_MOUT_PWM_ISP 52 +#define CLK_MOUT_AUDIO0 53 +#define CLK_MOUT_TSADC 54 +#define CLK_MOUT_MMC2 55 +#define CLK_MOUT_MMC1 56 +#define CLK_MOUT_MMC0 57 +#define CLK_MOUT_UART3 58 +#define CLK_MOUT_UART2 59 +#define CLK_MOUT_UART1 60 +#define CLK_MOUT_UART0 61 +#define CLK_MOUT_SPI2 62 +#define CLK_MOUT_SPI1 63 +#define CLK_MOUT_SPI0 64 +#define CLK_MOUT_SPDIF 65 +#define CLK_MOUT_AUDIO2 66 +#define CLK_MOUT_AUDIO1 67 +#define CLK_MOUT_MPLL_USER_C 68 +#define CLK_MOUT_HPM 69 +#define CLK_MOUT_CORE 70 +#define CLK_MOUT_APLL 71 +#define CLK_MOUT_PXLASYNC_CSIS1_FIMC 72 +#define CLK_MOUT_PXLASYNC_CSIS0_FIMC 73 +#define CLK_MOUT_JPEG 74 +#define CLK_MOUT_JPEG1 75 +#define CLK_MOUT_JPEG0 76 +#define CLK_MOUT_ACLK_ISP0_300 77 +#define CLK_MOUT_ACLK_ISP0_400 78 +#define CLK_MOUT_ACLK_ISP0_300_USER 79 +#define CLK_MOUT_ACLK_ISP1_300 80 +#define CLK_MOUT_ACLK_ISP1_300_USER 81 +#define CLK_MOUT_HDMI 82 + +/* Dividers */ +#define CLK_DIV_GPL 90 +#define CLK_DIV_GDL 91 +#define CLK_DIV_GPR 92 +#define CLK_DIV_GDR 93 +#define CLK_DIV_ACLK_400_MCUISP 94 +#define CLK_DIV_EBI 95 +#define CLK_DIV_ACLK_200 96 +#define CLK_DIV_ACLK_160 97 +#define CLK_DIV_ACLK_100 98 +#define CLK_DIV_ACLK_266 99 +#define CLK_DIV_CSIS1 100 +#define CLK_DIV_CSIS0 101 +#define CLK_DIV_CAM1 102 +#define CLK_DIV_FIMC3_LCLK 103 +#define CLK_DIV_FIMC2_LCLK 104 +#define CLK_DIV_FIMC1_LCLK 105 +#define CLK_DIV_FIMC0_LCLK 106 +#define CLK_DIV_TV_BLK 107 +#define CLK_DIV_MFC 108 +#define CLK_DIV_G3D 109 +#define CLK_DIV_MIPI0_PRE 110 +#define CLK_DIV_MIPI0 111 +#define CLK_DIV_FIMD0 112 +#define CLK_DIV_UART_ISP 113 +#define CLK_DIV_SPI1_ISP_PRE 114 +#define CLK_DIV_SPI1_ISP 115 +#define CLK_DIV_SPI0_ISP_PRE 116 +#define CLK_DIV_SPI0_ISP 117 +#define CLK_DIV_PWM_ISP 118 +#define CLK_DIV_PCM0 119 +#define CLK_DIV_AUDIO0 120 +#define CLK_DIV_TSADC_PRE 121 +#define CLK_DIV_TSADC 122 +#define CLK_DIV_MMC1_PRE 123 +#define CLK_DIV_MMC1 124 +#define CLK_DIV_MMC0_PRE 125 +#define CLK_DIV_MMC0 126 +#define CLK_DIV_MMC2_PRE 127 +#define CLK_DIV_MMC2 128 +#define CLK_DIV_UART3 129 +#define CLK_DIV_UART2 130 +#define CLK_DIV_UART1 131 +#define CLK_DIV_UART0 132 +#define CLK_DIV_SPI1_PRE 133 +#define CLK_DIV_SPI1 134 +#define CLK_DIV_SPI0_PRE 135 +#define CLK_DIV_SPI0 136 +#define CLK_DIV_SPI2_PRE 137 +#define CLK_DIV_SPI2 138 +#define CLK_DIV_PCM2 139 +#define CLK_DIV_AUDIO2 140 +#define CLK_DIV_PCM1 141 +#define CLK_DIV_AUDIO1 142 +#define CLK_DIV_I2S1 143 +#define CLK_DIV_PXLASYNC_CSIS1_FIMC 144 +#define CLK_DIV_PXLASYNC_CSIS0_FIMC 145 +#define CLK_DIV_JPEG 146 +#define CLK_DIV_CORE2 147 +#define CLK_DIV_APLL 148 +#define CLK_DIV_PCLK_DBG 149 +#define CLK_DIV_ATB 150 +#define CLK_DIV_PERIPH 151 +#define CLK_DIV_COREM1 152 +#define CLK_DIV_COREM0 153 +#define CLK_DIV_CORE 154 +#define CLK_DIV_HPM 155 +#define CLK_DIV_COPY 156 + +/* Gates */ +#define CLK_ASYNC_G3D 180 +#define CLK_ASYNC_MFCL 181 +#define CLK_ASYNC_TVX 182 +#define CLK_PPMULEFT 183 +#define CLK_GPIO_LEFT 184 +#define CLK_PPMUIMAGE 185 +#define CLK_QEMDMA2 186 +#define CLK_QEROTATOR 187 +#define CLK_SMMUMDMA2 188 +#define CLK_SMMUROTATOR 189 +#define CLK_MDMA2 190 +#define CLK_ROTATOR 191 +#define CLK_ASYNC_ISPMX 192 +#define CLK_ASYNC_MAUDIOX 193 +#define CLK_ASYNC_MFCR 194 +#define CLK_ASYNC_FSYSD 195 +#define CLK_ASYNC_LCD0X 196 +#define CLK_ASYNC_CAMX 197 +#define CLK_PPMURIGHT 198 +#define CLK_GPIO_RIGHT 199 +#define CLK_ANTIRBK_APBIF 200 +#define CLK_EFUSE_WRITER_APBIF 201 +#define CLK_MONOCNT 202 +#define CLK_TZPC6 203 +#define CLK_PROVISIONKEY1 204 +#define CLK_PROVISIONKEY0 205 +#define CLK_CMU_ISPPART 206 +#define CLK_TMU_APBIF 207 +#define CLK_KEYIF 208 +#define CLK_RTC 209 +#define CLK_WDT 210 +#define CLK_MCT 211 +#define CLK_SECKEY 212 +#define CLK_HDMI_CEC 213 +#define CLK_TZPC5 214 +#define CLK_TZPC4 215 +#define CLK_TZPC3 216 +#define CLK_TZPC2 217 +#define CLK_TZPC1 218 +#define CLK_TZPC0 219 +#define CLK_CMU_COREPART 220 +#define CLK_CMU_TOPPART 221 +#define CLK_PMU_APBIF 222 +#define CLK_SYSREG 223 +#define CLK_CHIP_ID 224 +#define CLK_SMMUFIMC_LITE2 225 +#define CLK_FIMC_LITE2 226 +#define CLK_PIXELASYNCM1 227 +#define CLK_PIXELASYNCM0 228 +#define CLK_PPMUCAMIF 229 +#define CLK_SMMUJPEG 230 +#define CLK_SMMUFIMC3 231 +#define CLK_SMMUFIMC2 232 +#define CLK_SMMUFIMC1 233 +#define CLK_SMMUFIMC0 234 +#define CLK_JPEG 235 +#define CLK_CSIS1 236 +#define CLK_CSIS0 237 +#define CLK_FIMC3 238 +#define CLK_FIMC2 239 +#define CLK_FIMC1 240 +#define CLK_FIMC0 241 +#define CLK_PPMUTV 242 +#define CLK_SMMUTV 243 +#define CLK_HDMI 244 +#define CLK_MIXER 245 +#define CLK_VP 246 +#define CLK_PPMUMFC_R 247 +#define CLK_PPMUMFC_L 248 +#define CLK_SMMUMFC_R 249 +#define CLK_SMMUMFC_L 250 +#define CLK_MFC 251 +#define CLK_PPMUG3D 252 +#define CLK_G3D 253 +#define CLK_PPMULCD0 254 +#define CLK_SMMUFIMD0 255 +#define CLK_DSIM0 256 +#define CLK_SMIES 257 +#define CLK_MIE0 258 +#define CLK_FIMD0 259 +#define CLK_TSADC 260 +#define CLK_PPMUFILE 261 +#define CLK_NFCON 262 +#define CLK_USBDEVICE 263 +#define CLK_USBHOST 264 +#define CLK_SROMC 265 +#define CLK_SDMMC2 266 +#define CLK_SDMMC1 267 +#define CLK_SDMMC0 268 +#define CLK_PDMA1 269 +#define CLK_PDMA0 270 +#define CLK_SPDIF 271 +#define CLK_PWM 272 +#define CLK_PCM2 273 +#define CLK_PCM1 274 +#define CLK_I2S1 275 +#define CLK_SPI2 276 +#define CLK_SPI1 277 +#define CLK_SPI0 278 +#define CLK_I2CHDMI 279 +#define CLK_I2C7 280 +#define CLK_I2C6 281 +#define CLK_I2C5 282 +#define CLK_I2C4 283 +#define CLK_I2C3 284 +#define CLK_I2C2 285 +#define CLK_I2C1 286 +#define CLK_I2C0 287 +#define CLK_UART3 288 +#define CLK_UART2 289 +#define CLK_UART1 290 +#define CLK_UART0 291 + +/* Special clocks */ +#define CLK_SCLK_PXLAYSNC_CSIS1_FIMC 330 +#define CLK_SCLK_PXLAYSNC_CSIS0_FIMC 331 +#define CLK_SCLK_JPEG 332 +#define CLK_SCLK_CSIS1 333 +#define CLK_SCLK_CSIS0 334 +#define CLK_SCLK_CAM1 335 +#define CLK_SCLK_FIMC3_LCLK 336 +#define CLK_SCLK_FIMC2_LCLK 337 +#define CLK_SCLK_FIMC1_LCLK 338 +#define CLK_SCLK_FIMC0_LCLK 339 +#define CLK_SCLK_PIXEL 340 +#define CLK_SCLK_HDMI 341 +#define CLK_SCLK_MIXER 342 +#define CLK_SCLK_MFC 343 +#define CLK_SCLK_G3D 344 +#define CLK_SCLK_MIPIDPHY4L 345 +#define CLK_SCLK_MIPI0 346 +#define CLK_SCLK_MDNIE0 347 +#define CLK_SCLK_FIMD0 348 +#define CLK_SCLK_PCM0 349 +#define CLK_SCLK_AUDIO0 350 +#define CLK_SCLK_TSADC 351 +#define CLK_SCLK_EBI 352 +#define CLK_SCLK_MMC2 353 +#define CLK_SCLK_MMC1 354 +#define CLK_SCLK_MMC0 355 +#define CLK_SCLK_I2S 356 +#define CLK_SCLK_PCM2 357 +#define CLK_SCLK_PCM1 358 +#define CLK_SCLK_AUDIO2 359 +#define CLK_SCLK_AUDIO1 360 +#define CLK_SCLK_SPDIF 361 +#define CLK_SCLK_SPI2 362 +#define CLK_SCLK_SPI1 363 +#define CLK_SCLK_SPI0 364 +#define CLK_SCLK_UART3 365 +#define CLK_SCLK_UART2 366 +#define CLK_SCLK_UART1 367 +#define CLK_SCLK_UART0 368 +#define CLK_SCLK_HDMIPHY 369 + +/* + * Total number of clocks of main CMU. + * NOTE: Must be equal to last clock ID increased by one. + */ +#define CLK_NR_CLKS 370 + +/* + * CMU DMC + */ +#define CLK_DMC_FOUT_MPLL 1 +#define CLK_DMC_FOUT_BPLL 2 + +#define CLK_DMC_MOUT_MPLL 3 +#define CLK_DMC_MOUT_BPLL 4 +#define CLK_DMC_MOUT_DPHY 5 +#define CLK_DMC_MOUT_DMC_BUS 6 + +#define CLK_DMC_DIV_DMC 7 +#define CLK_DMC_DIV_DPHY 8 +#define CLK_DMC_DIV_DMC_PRE 9 +#define CLK_DMC_DIV_DMCP 10 +#define CLK_DMC_DIV_DMCD 11 +#define CLK_DMC_DIV_MPLL_PRE 12 + +/* + * Total number of clocks of CMU_DMC. + * NOTE: Must be equal to highest clock ID increased by one. + */ +#define NR_CLKS_DMC 13 + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS4415_CLOCK_H */ diff --git a/include/dt-bindings/clock/exynos7-clk.h b/include/dt-bindings/clock/exynos7-clk.h new file mode 100644 index 000000000000..8e4681b07ae7 --- /dev/null +++ b/include/dt-bindings/clock/exynos7-clk.h @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Author: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef _DT_BINDINGS_CLOCK_EXYNOS7_H +#define _DT_BINDINGS_CLOCK_EXYNOS7_H + +/* TOPC */ +#define DOUT_ACLK_PERIS 1 +#define DOUT_SCLK_BUS0_PLL 2 +#define DOUT_SCLK_BUS1_PLL 3 +#define DOUT_SCLK_CC_PLL 4 +#define DOUT_SCLK_MFC_PLL 5 +#define DOUT_ACLK_CCORE_133 6 +#define TOPC_NR_CLK 7 + +/* TOP0 */ +#define DOUT_ACLK_PERIC1 1 +#define DOUT_ACLK_PERIC0 2 +#define CLK_SCLK_UART0 3 +#define CLK_SCLK_UART1 4 +#define CLK_SCLK_UART2 5 +#define CLK_SCLK_UART3 6 +#define TOP0_NR_CLK 7 + +/* TOP1 */ +#define DOUT_ACLK_FSYS1_200 1 +#define DOUT_ACLK_FSYS0_200 2 +#define DOUT_SCLK_MMC2 3 +#define DOUT_SCLK_MMC1 4 +#define DOUT_SCLK_MMC0 5 +#define CLK_SCLK_MMC2 6 +#define CLK_SCLK_MMC1 7 +#define CLK_SCLK_MMC0 8 +#define TOP1_NR_CLK 9 + +/* CCORE */ +#define PCLK_RTC 1 +#define CCORE_NR_CLK 2 + +/* PERIC0 */ +#define PCLK_UART0 1 +#define SCLK_UART0 2 +#define PCLK_HSI2C0 3 +#define PCLK_HSI2C1 4 +#define PCLK_HSI2C4 5 +#define PCLK_HSI2C5 6 +#define PCLK_HSI2C9 7 +#define PCLK_HSI2C10 8 +#define PCLK_HSI2C11 9 +#define PCLK_PWM 10 +#define SCLK_PWM 11 +#define PCLK_ADCIF 12 +#define PERIC0_NR_CLK 13 + +/* PERIC1 */ +#define PCLK_UART1 1 +#define PCLK_UART2 2 +#define PCLK_UART3 3 +#define SCLK_UART1 4 +#define SCLK_UART2 5 +#define SCLK_UART3 6 +#define PCLK_HSI2C2 7 +#define PCLK_HSI2C3 8 +#define PCLK_HSI2C6 9 +#define PCLK_HSI2C7 10 +#define PCLK_HSI2C8 11 +#define PERIC1_NR_CLK 12 + +/* PERIS */ +#define PCLK_CHIPID 1 +#define SCLK_CHIPID 2 +#define PCLK_WDT 3 +#define PCLK_TMU 4 +#define SCLK_TMU 5 +#define PERIS_NR_CLK 6 + +/* FSYS0 */ +#define ACLK_MMC2 1 +#define FSYS0_NR_CLK 2 + +/* FSYS1 */ +#define ACLK_MMC1 1 +#define ACLK_MMC0 2 +#define FSYS1_NR_CLK 3 + +#endif /* _DT_BINDINGS_CLOCK_EXYNOS7_H */ diff --git a/include/dt-bindings/clock/marvell,mmp2.h b/include/dt-bindings/clock/marvell,mmp2.h new file mode 100644 index 000000000000..591f7fba89e2 --- /dev/null +++ b/include/dt-bindings/clock/marvell,mmp2.h @@ -0,0 +1,74 @@ +#ifndef __DTS_MARVELL_MMP2_CLOCK_H +#define __DTS_MARVELL_MMP2_CLOCK_H + +/* fixed clocks and plls */ +#define MMP2_CLK_CLK32 1 +#define MMP2_CLK_VCTCXO 2 +#define MMP2_CLK_PLL1 3 +#define MMP2_CLK_PLL1_2 8 +#define MMP2_CLK_PLL1_4 9 +#define MMP2_CLK_PLL1_8 10 +#define MMP2_CLK_PLL1_16 11 +#define MMP2_CLK_PLL1_3 12 +#define MMP2_CLK_PLL1_6 13 +#define MMP2_CLK_PLL1_12 14 +#define MMP2_CLK_PLL1_20 15 +#define MMP2_CLK_PLL2 16 +#define MMP2_CLK_PLL2_2 17 +#define MMP2_CLK_PLL2_4 18 +#define MMP2_CLK_PLL2_8 19 +#define MMP2_CLK_PLL2_16 20 +#define MMP2_CLK_PLL2_3 21 +#define MMP2_CLK_PLL2_6 22 +#define MMP2_CLK_PLL2_12 23 +#define MMP2_CLK_VCTCXO_2 24 +#define MMP2_CLK_VCTCXO_4 25 +#define MMP2_CLK_UART_PLL 26 +#define MMP2_CLK_USB_PLL 27 + +/* apb periphrals */ +#define MMP2_CLK_TWSI0 60 +#define MMP2_CLK_TWSI1 61 +#define MMP2_CLK_TWSI2 62 +#define MMP2_CLK_TWSI3 63 +#define MMP2_CLK_TWSI4 64 +#define MMP2_CLK_TWSI5 65 +#define MMP2_CLK_GPIO 66 +#define MMP2_CLK_KPC 67 +#define MMP2_CLK_RTC 68 +#define MMP2_CLK_PWM0 69 +#define MMP2_CLK_PWM1 70 +#define MMP2_CLK_PWM2 71 +#define MMP2_CLK_PWM3 72 +#define MMP2_CLK_UART0 73 +#define MMP2_CLK_UART1 74 +#define MMP2_CLK_UART2 75 +#define MMP2_CLK_UART3 76 +#define MMP2_CLK_SSP0 77 +#define MMP2_CLK_SSP1 78 +#define MMP2_CLK_SSP2 79 +#define MMP2_CLK_SSP3 80 + +/* axi periphrals */ +#define MMP2_CLK_SDH0 101 +#define MMP2_CLK_SDH1 102 +#define MMP2_CLK_SDH2 103 +#define MMP2_CLK_SDH3 104 +#define MMP2_CLK_USB 105 +#define MMP2_CLK_DISP0 106 +#define MMP2_CLK_DISP0_MUX 107 +#define MMP2_CLK_DISP0_SPHY 108 +#define MMP2_CLK_DISP1 109 +#define MMP2_CLK_DISP1_MUX 110 +#define MMP2_CLK_CCIC_ARBITER 111 +#define MMP2_CLK_CCIC0 112 +#define MMP2_CLK_CCIC0_MIX 113 +#define MMP2_CLK_CCIC0_PHY 114 +#define MMP2_CLK_CCIC0_SPHY 115 +#define MMP2_CLK_CCIC1 116 +#define MMP2_CLK_CCIC1_MIX 117 +#define MMP2_CLK_CCIC1_PHY 118 +#define MMP2_CLK_CCIC1_SPHY 119 + +#define MMP2_NR_CLKS 200 +#endif diff --git a/include/dt-bindings/clock/marvell,pxa168.h b/include/dt-bindings/clock/marvell,pxa168.h new file mode 100644 index 000000000000..79630b9d74b8 --- /dev/null +++ b/include/dt-bindings/clock/marvell,pxa168.h @@ -0,0 +1,57 @@ +#ifndef __DTS_MARVELL_PXA168_CLOCK_H +#define __DTS_MARVELL_PXA168_CLOCK_H + +/* fixed clocks and plls */ +#define PXA168_CLK_CLK32 1 +#define PXA168_CLK_VCTCXO 2 +#define PXA168_CLK_PLL1 3 +#define PXA168_CLK_PLL1_2 8 +#define PXA168_CLK_PLL1_4 9 +#define PXA168_CLK_PLL1_8 10 +#define PXA168_CLK_PLL1_16 11 +#define PXA168_CLK_PLL1_6 12 +#define PXA168_CLK_PLL1_12 13 +#define PXA168_CLK_PLL1_24 14 +#define PXA168_CLK_PLL1_48 15 +#define PXA168_CLK_PLL1_96 16 +#define PXA168_CLK_PLL1_13 17 +#define PXA168_CLK_PLL1_13_1_5 18 +#define PXA168_CLK_PLL1_2_1_5 19 +#define PXA168_CLK_PLL1_3_16 20 +#define PXA168_CLK_UART_PLL 27 + +/* apb periphrals */ +#define PXA168_CLK_TWSI0 60 +#define PXA168_CLK_TWSI1 61 +#define PXA168_CLK_TWSI2 62 +#define PXA168_CLK_TWSI3 63 +#define PXA168_CLK_GPIO 64 +#define PXA168_CLK_KPC 65 +#define PXA168_CLK_RTC 66 +#define PXA168_CLK_PWM0 67 +#define PXA168_CLK_PWM1 68 +#define PXA168_CLK_PWM2 69 +#define PXA168_CLK_PWM3 70 +#define PXA168_CLK_UART0 71 +#define PXA168_CLK_UART1 72 +#define PXA168_CLK_UART2 73 +#define PXA168_CLK_SSP0 74 +#define PXA168_CLK_SSP1 75 +#define PXA168_CLK_SSP2 76 +#define PXA168_CLK_SSP3 77 +#define PXA168_CLK_SSP4 78 + +/* axi periphrals */ +#define PXA168_CLK_DFC 100 +#define PXA168_CLK_SDH0 101 +#define PXA168_CLK_SDH1 102 +#define PXA168_CLK_SDH2 103 +#define PXA168_CLK_USB 104 +#define PXA168_CLK_SPH 105 +#define PXA168_CLK_DISP0 106 +#define PXA168_CLK_CCIC0 107 +#define PXA168_CLK_CCIC0_PHY 108 +#define PXA168_CLK_CCIC0_SPHY 109 + +#define PXA168_NR_CLKS 200 +#endif diff --git a/include/dt-bindings/clock/marvell,pxa910.h b/include/dt-bindings/clock/marvell,pxa910.h new file mode 100644 index 000000000000..719cffb2bea2 --- /dev/null +++ b/include/dt-bindings/clock/marvell,pxa910.h @@ -0,0 +1,54 @@ +#ifndef __DTS_MARVELL_PXA910_CLOCK_H +#define __DTS_MARVELL_PXA910_CLOCK_H + +/* fixed clocks and plls */ +#define PXA910_CLK_CLK32 1 +#define PXA910_CLK_VCTCXO 2 +#define PXA910_CLK_PLL1 3 +#define PXA910_CLK_PLL1_2 8 +#define PXA910_CLK_PLL1_4 9 +#define PXA910_CLK_PLL1_8 10 +#define PXA910_CLK_PLL1_16 11 +#define PXA910_CLK_PLL1_6 12 +#define PXA910_CLK_PLL1_12 13 +#define PXA910_CLK_PLL1_24 14 +#define PXA910_CLK_PLL1_48 15 +#define PXA910_CLK_PLL1_96 16 +#define PXA910_CLK_PLL1_13 17 +#define PXA910_CLK_PLL1_13_1_5 18 +#define PXA910_CLK_PLL1_2_1_5 19 +#define PXA910_CLK_PLL1_3_16 20 +#define PXA910_CLK_UART_PLL 27 + +/* apb periphrals */ +#define PXA910_CLK_TWSI0 60 +#define PXA910_CLK_TWSI1 61 +#define PXA910_CLK_TWSI2 62 +#define PXA910_CLK_TWSI3 63 +#define PXA910_CLK_GPIO 64 +#define PXA910_CLK_KPC 65 +#define PXA910_CLK_RTC 66 +#define PXA910_CLK_PWM0 67 +#define PXA910_CLK_PWM1 68 +#define PXA910_CLK_PWM2 69 +#define PXA910_CLK_PWM3 70 +#define PXA910_CLK_UART0 71 +#define PXA910_CLK_UART1 72 +#define PXA910_CLK_UART2 73 +#define PXA910_CLK_SSP0 74 +#define PXA910_CLK_SSP1 75 + +/* axi periphrals */ +#define PXA910_CLK_DFC 100 +#define PXA910_CLK_SDH0 101 +#define PXA910_CLK_SDH1 102 +#define PXA910_CLK_SDH2 103 +#define PXA910_CLK_USB 104 +#define PXA910_CLK_SPH 105 +#define PXA910_CLK_DISP0 106 +#define PXA910_CLK_CCIC0 107 +#define PXA910_CLK_CCIC0_PHY 108 +#define PXA910_CLK_CCIC0_SPHY 109 + +#define PXA910_NR_CLKS 200 +#endif diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index 100a08c47692..f60ce72a2b2c 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -71,6 +71,15 @@ #define SCLK_HDMI_CEC 110 #define SCLK_HEVC_CABAC 111 #define SCLK_HEVC_CORE 112 +#define SCLK_I2S0_OUT 113 +#define SCLK_SDMMC_DRV 114 +#define SCLK_SDIO0_DRV 115 +#define SCLK_SDIO1_DRV 116 +#define SCLK_EMMC_DRV 117 +#define SCLK_SDMMC_SAMPLE 118 +#define SCLK_SDIO0_SAMPLE 119 +#define SCLK_SDIO1_SAMPLE 120 +#define SCLK_EMMC_SAMPLE 121 #define DCLK_VOP0 190 #define DCLK_VOP1 191 @@ -141,6 +150,10 @@ #define PCLK_VIO2_H2P 361 #define PCLK_CPU 362 #define PCLK_PERI 363 +#define PCLK_DDRUPCTL0 364 +#define PCLK_PUBL0 365 +#define PCLK_DDRUPCTL1 366 +#define PCLK_PUBL1 367 /* hclk gates */ #define HCLK_GPS 448 diff --git a/include/dt-bindings/thermal/thermal.h b/include/dt-bindings/thermal/thermal.h index 59822a995858..b5e6b0069ac7 100644 --- a/include/dt-bindings/thermal/thermal.h +++ b/include/dt-bindings/thermal/thermal.h @@ -11,7 +11,7 @@ #define _DT_BINDINGS_THERMAL_THERMAL_H /* On cooling devices upper and lower limits */ -#define THERMAL_NO_LIMIT (-1UL) +#define THERMAL_NO_LIMIT (~0) #endif diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 6bff83b1f298..856d381b1d5b 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -153,6 +153,7 @@ int acpi_unmap_lsapic(int cpu); int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base); int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base); +int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base); void acpi_irq_stats_init(void); extern u32 acpi_irq_handled; extern u32 acpi_irq_not_handled; diff --git a/include/linux/audit.h b/include/linux/audit.h index 0c04917c2f12..af84234e1f6e 100644 --- a/include/linux/audit.h +++ b/include/linux/audit.h @@ -47,6 +47,7 @@ struct sk_buff; struct audit_krule { int vers_ops; + u32 pflags; u32 flags; u32 listnr; u32 action; @@ -64,6 +65,9 @@ struct audit_krule { u64 prio; }; +/* Flag to indicate legacy AUDIT_LOGINUID unset usage */ +#define AUDIT_LOGINUID_LEGACY 0x1 + struct audit_field { u32 type; union { diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 2839c639f092..d936409520f8 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -176,7 +176,7 @@ struct clk_ops { unsigned long *parent_rate); long (*determine_rate)(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_clk); + struct clk_hw **best_parent_hw); int (*set_parent)(struct clk_hw *hw, u8 index); u8 (*get_parent)(struct clk_hw *hw); int (*set_rate)(struct clk_hw *hw, unsigned long rate, @@ -544,16 +544,14 @@ u8 __clk_get_num_parents(struct clk *clk); struct clk *__clk_get_parent(struct clk *clk); struct clk *clk_get_parent_by_index(struct clk *clk, u8 index); unsigned int __clk_get_enable_count(struct clk *clk); -unsigned int __clk_get_prepare_count(struct clk *clk); unsigned long __clk_get_rate(struct clk *clk); -unsigned long __clk_get_accuracy(struct clk *clk); unsigned long __clk_get_flags(struct clk *clk); bool __clk_is_prepared(struct clk *clk); bool __clk_is_enabled(struct clk *clk); struct clk *__clk_lookup(const char *name); long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_p); + struct clk_hw **best_parent_p); /* * FIXME clock api without lock protection @@ -652,7 +650,7 @@ static inline void clk_writel(u32 val, u32 __iomem *reg) #endif /* platform dependent I/O accessors */ #ifdef CONFIG_DEBUG_FS -struct dentry *clk_debugfs_add_file(struct clk *clk, char *name, umode_t mode, +struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, void *data, const struct file_operations *fops); #endif diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index 74e5341463c9..55ef529a0dbf 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -264,7 +264,7 @@ int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw, long omap3_noncore_dpll_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_clk); + struct clk_hw **best_parent_clk); unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, unsigned long parent_rate); long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, @@ -273,7 +273,7 @@ long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_clk); + struct clk_hw **best_parent_clk); u8 omap2_init_dpll_parent(struct clk_hw *hw); unsigned long omap3_dpll_recalc(struct clk_hw *hw, unsigned long parent_rate); long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, diff --git a/include/linux/compiler.h b/include/linux/compiler.h index d5ad7b1118fc..a1c81f80978e 100644 --- a/include/linux/compiler.h +++ b/include/linux/compiler.h @@ -186,6 +186,80 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); # define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __LINE__) #endif +#include <uapi/linux/types.h> + +static __always_inline void data_access_exceeds_word_size(void) +#ifdef __compiletime_warning +__compiletime_warning("data access exceeds word size and won't be atomic") +#endif +; + +static __always_inline void data_access_exceeds_word_size(void) +{ +} + +static __always_inline void __read_once_size(volatile void *p, void *res, int size) +{ + switch (size) { + case 1: *(__u8 *)res = *(volatile __u8 *)p; break; + case 2: *(__u16 *)res = *(volatile __u16 *)p; break; + case 4: *(__u32 *)res = *(volatile __u32 *)p; break; +#ifdef CONFIG_64BIT + case 8: *(__u64 *)res = *(volatile __u64 *)p; break; +#endif + default: + barrier(); + __builtin_memcpy((void *)res, (const void *)p, size); + data_access_exceeds_word_size(); + barrier(); + } +} + +static __always_inline void __assign_once_size(volatile void *p, void *res, int size) +{ + switch (size) { + case 1: *(volatile __u8 *)p = *(__u8 *)res; break; + case 2: *(volatile __u16 *)p = *(__u16 *)res; break; + case 4: *(volatile __u32 *)p = *(__u32 *)res; break; +#ifdef CONFIG_64BIT + case 8: *(volatile __u64 *)p = *(__u64 *)res; break; +#endif + default: + barrier(); + __builtin_memcpy((void *)p, (const void *)res, size); + data_access_exceeds_word_size(); + barrier(); + } +} + +/* + * Prevent the compiler from merging or refetching reads or writes. The + * compiler is also forbidden from reordering successive instances of + * READ_ONCE, ASSIGN_ONCE and ACCESS_ONCE (see below), but only when the + * compiler is aware of some particular ordering. One way to make the + * compiler aware of ordering is to put the two invocations of READ_ONCE, + * ASSIGN_ONCE or ACCESS_ONCE() in different C statements. + * + * In contrast to ACCESS_ONCE these two macros will also work on aggregate + * data types like structs or unions. If the size of the accessed data + * type exceeds the word size of the machine (e.g., 32 bits or 64 bits) + * READ_ONCE() and ASSIGN_ONCE() will fall back to memcpy and print a + * compile-time warning. + * + * Their two major use cases are: (1) Mediating communication between + * process-level code and irq/NMI handlers, all running on the same CPU, + * and (2) Ensuring that the compiler does not fold, spindle, or otherwise + * mutilate accesses that either do not require ordering or that interact + * with an explicit memory barrier or atomic instruction that provides the + * required ordering. + */ + +#define READ_ONCE(x) \ + ({ typeof(x) __val; __read_once_size(&x, &__val, sizeof(__val)); __val; }) + +#define ASSIGN_ONCE(val, x) \ + ({ typeof(x) __val; __val = val; __assign_once_size(&x, &__val, sizeof(__val)); __val; }) + #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ diff --git a/include/linux/cpu_cooling.h b/include/linux/cpu_cooling.h index c303d383def1..bd955270d5aa 100644 --- a/include/linux/cpu_cooling.h +++ b/include/linux/cpu_cooling.h @@ -50,7 +50,7 @@ static inline struct thermal_cooling_device * of_cpufreq_cooling_register(struct device_node *np, const struct cpumask *clip_cpus) { - return NULL; + return ERR_PTR(-ENOSYS); } #endif @@ -65,13 +65,13 @@ unsigned long cpufreq_cooling_get_level(unsigned int cpu, unsigned int freq); static inline struct thermal_cooling_device * cpufreq_cooling_register(const struct cpumask *clip_cpus) { - return NULL; + return ERR_PTR(-ENOSYS); } static inline struct thermal_cooling_device * of_cpufreq_cooling_register(struct device_node *np, const struct cpumask *clip_cpus) { - return NULL; + return ERR_PTR(-ENOSYS); } static inline void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev) diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h index a07e087f54b2..ab70f3bc44ad 100644 --- a/include/linux/cpuidle.h +++ b/include/linux/cpuidle.h @@ -53,7 +53,6 @@ struct cpuidle_state { }; /* Idle State Flags */ -#define CPUIDLE_FLAG_TIME_INVALID (0x01) /* is residency time measurable? */ #define CPUIDLE_FLAG_COUPLED (0x02) /* state applies to multiple cpus */ #define CPUIDLE_FLAG_TIMER_STOP (0x04) /* timer is stopped on this state */ @@ -89,8 +88,6 @@ DECLARE_PER_CPU(struct cpuidle_device, cpuidle_dev); /** * cpuidle_get_last_residency - retrieves the last state's residency time * @dev: the target CPU - * - * NOTE: this value is invalid if CPUIDLE_FLAG_TIME_INVALID is set */ static inline int cpuidle_get_last_residency(struct cpuidle_device *dev) { diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h index f1863dcd83ea..ce447f0f1bad 100644 --- a/include/linux/devfreq.h +++ b/include/linux/devfreq.h @@ -188,7 +188,7 @@ extern struct devfreq *devm_devfreq_add_device(struct device *dev, extern void devm_devfreq_remove_device(struct device *dev, struct devfreq *devfreq); -/* Supposed to be called by PM_SLEEP/PM_RUNTIME callbacks */ +/* Supposed to be called by PM callbacks */ extern int devfreq_suspend_device(struct devfreq *devfreq); extern int devfreq_resume_device(struct devfreq *devfreq); diff --git a/include/linux/kernel_stat.h b/include/linux/kernel_stat.h index b9376cd5a187..25a822f6f000 100644 --- a/include/linux/kernel_stat.h +++ b/include/linux/kernel_stat.h @@ -68,6 +68,7 @@ static inline unsigned int kstat_softirqs_cpu(unsigned int irq, int cpu) * Number of interrupts per specific IRQ source, since bootup */ extern unsigned int kstat_irqs(unsigned int irq); +extern unsigned int kstat_irqs_usr(unsigned int irq); /* * Number of interrupts per cpu, since bootup diff --git a/include/linux/migrate.h b/include/linux/migrate.h index 01aad3ed89ec..fab9b32ace8e 100644 --- a/include/linux/migrate.h +++ b/include/linux/migrate.h @@ -36,9 +36,6 @@ extern int migrate_pages(struct list_head *l, new_page_t new, free_page_t free, extern int migrate_prep(void); extern int migrate_prep_local(void); -extern int migrate_vmas(struct mm_struct *mm, - const nodemask_t *from, const nodemask_t *to, - unsigned long flags); extern void migrate_page_copy(struct page *newpage, struct page *page); extern int migrate_huge_page_move_mapping(struct address_space *mapping, struct page *newpage, struct page *page); @@ -57,13 +54,6 @@ static inline int migrate_pages(struct list_head *l, new_page_t new, static inline int migrate_prep(void) { return -ENOSYS; } static inline int migrate_prep_local(void) { return -ENOSYS; } -static inline int migrate_vmas(struct mm_struct *mm, - const nodemask_t *from, const nodemask_t *to, - unsigned long flags) -{ - return -ENOSYS; -} - static inline void migrate_page_copy(struct page *newpage, struct page *page) {} diff --git a/include/linux/mm.h b/include/linux/mm.h index c0a67b894c4c..f80d0194c9bc 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -286,8 +286,6 @@ struct vm_operations_struct { */ struct mempolicy *(*get_policy)(struct vm_area_struct *vma, unsigned long addr); - int (*migrate)(struct vm_area_struct *vma, const nodemask_t *from, - const nodemask_t *to, unsigned long flags); #endif /* called by sys_remap_file_pages() to populate non-linear mapping */ int (*remap_pages)(struct vm_area_struct *vma, unsigned long addr, diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index 7ea069cd3257..4b3736f7065c 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -251,7 +251,7 @@ pgoff_t page_cache_prev_hole(struct address_space *mapping, #define FGP_NOWAIT 0x00000020 struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset, - int fgp_flags, gfp_t cache_gfp_mask, gfp_t radix_gfp_mask); + int fgp_flags, gfp_t cache_gfp_mask); /** * find_get_page - find and get a page reference @@ -266,13 +266,13 @@ struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset, static inline struct page *find_get_page(struct address_space *mapping, pgoff_t offset) { - return pagecache_get_page(mapping, offset, 0, 0, 0); + return pagecache_get_page(mapping, offset, 0, 0); } static inline struct page *find_get_page_flags(struct address_space *mapping, pgoff_t offset, int fgp_flags) { - return pagecache_get_page(mapping, offset, fgp_flags, 0, 0); + return pagecache_get_page(mapping, offset, fgp_flags, 0); } /** @@ -292,7 +292,7 @@ static inline struct page *find_get_page_flags(struct address_space *mapping, static inline struct page *find_lock_page(struct address_space *mapping, pgoff_t offset) { - return pagecache_get_page(mapping, offset, FGP_LOCK, 0, 0); + return pagecache_get_page(mapping, offset, FGP_LOCK, 0); } /** @@ -319,7 +319,7 @@ static inline struct page *find_or_create_page(struct address_space *mapping, { return pagecache_get_page(mapping, offset, FGP_LOCK|FGP_ACCESSED|FGP_CREAT, - gfp_mask, gfp_mask & GFP_RECLAIM_MASK); + gfp_mask); } /** @@ -340,8 +340,7 @@ static inline struct page *grab_cache_page_nowait(struct address_space *mapping, { return pagecache_get_page(mapping, index, FGP_LOCK|FGP_CREAT|FGP_NOFS|FGP_NOWAIT, - mapping_gfp_mask(mapping), - GFP_NOFS); + mapping_gfp_mask(mapping)); } struct page *find_get_entry(struct address_space *mapping, pgoff_t offset); diff --git a/include/linux/pci.h b/include/linux/pci.h index 44a27696ab6c..360a966a97a5 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -349,6 +349,7 @@ struct pci_dev { unsigned int __aer_firmware_first:1; unsigned int broken_intx_masking:1; unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ + unsigned int irq_managed:1; pci_dev_flags_t dev_flags; atomic_t enable_cnt; /* pci_enable_device has been called */ diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index 6cd20d5e651b..a9edab2c787a 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -271,6 +271,8 @@ typedef struct generic_pm_domain *(*genpd_xlate_t)(struct of_phandle_args *args, int __of_genpd_add_provider(struct device_node *np, genpd_xlate_t xlate, void *data); void of_genpd_del_provider(struct device_node *np); +struct generic_pm_domain *of_genpd_get_from_provider( + struct of_phandle_args *genpdspec); struct generic_pm_domain *__of_genpd_xlate_simple( struct of_phandle_args *genpdspec, @@ -288,6 +290,12 @@ static inline int __of_genpd_add_provider(struct device_node *np, } static inline void of_genpd_del_provider(struct device_node *np) {} +static inline struct generic_pm_domain *of_genpd_get_from_provider( + struct of_phandle_args *genpdspec) +{ + return NULL; +} + #define __of_genpd_xlate_simple NULL #define __of_genpd_xlate_onecell NULL diff --git a/include/linux/thermal.h b/include/linux/thermal.h index c611a02fbc51..fc52e307efab 100644 --- a/include/linux/thermal.h +++ b/include/linux/thermal.h @@ -38,7 +38,7 @@ #define THERMAL_CSTATE_INVALID -1UL /* No upper/lower limit requirement */ -#define THERMAL_NO_LIMIT THERMAL_CSTATE_INVALID +#define THERMAL_NO_LIMIT ((u32)~0) /* Unit conversion macros */ #define KELVIN_TO_CELSIUS(t) (long)(((long)t-2732 >= 0) ? \ diff --git a/include/linux/uio.h b/include/linux/uio.h index a41e252396c0..1c5e453f7ea9 100644 --- a/include/linux/uio.h +++ b/include/linux/uio.h @@ -101,6 +101,11 @@ static inline size_t iov_iter_count(struct iov_iter *i) return i->count; } +static inline bool iter_is_iovec(struct iov_iter *i) +{ + return !(i->type & (ITER_BVEC | ITER_KVEC)); +} + /* * Cap the iov_iter by given limit; note that the second argument is * *not* the new size - it's upper limit for such. Passing it a value diff --git a/include/scsi/libsas.h b/include/scsi/libsas.h index 9d87a37aecad..dae99d7d2bc0 100644 --- a/include/scsi/libsas.h +++ b/include/scsi/libsas.h @@ -688,7 +688,6 @@ extern int sas_queuecommand(struct Scsi_Host * ,struct scsi_cmnd *); extern int sas_target_alloc(struct scsi_target *); extern int sas_slave_configure(struct scsi_device *); extern int sas_change_queue_depth(struct scsi_device *, int new_depth); -extern int sas_change_queue_type(struct scsi_device *, int qt); extern int sas_bios_param(struct scsi_device *, struct block_device *, sector_t capacity, int *hsc); diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index e939d2b3757a..019e66858ce6 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -278,19 +278,6 @@ struct scsi_host_template { int (* change_queue_depth)(struct scsi_device *, int); /* - * Fill in this function to allow the changing of tag types - * (this also allows the enabling/disabling of tag command - * queueing). An error should only be returned if something - * went wrong in the driver while trying to set the tag type. - * If the driver doesn't support the requested tag type, then - * it should set the closest type it does support without - * returning an error. Returns the actual tag type set. - * - * Status: OPTIONAL - */ - int (* change_queue_type)(struct scsi_device *, int); - - /* * This function determines the BIOS parameters for a given * harddisk. These tend to be numbers that are made up by * the host adapter. Parameters: diff --git a/include/scsi/scsi_tcq.h b/include/scsi/scsi_tcq.h index fe4a70299419..9708b28bd2aa 100644 --- a/include/scsi/scsi_tcq.h +++ b/include/scsi/scsi_tcq.h @@ -6,46 +6,10 @@ #include <scsi/scsi_device.h> #include <scsi/scsi_host.h> -#define MSG_SIMPLE_TAG 0x20 -#define MSG_HEAD_TAG 0x21 -#define MSG_ORDERED_TAG 0x22 -#define MSG_ACA_TAG 0x24 /* unsupported */ - #define SCSI_NO_TAG (-1) /* identify no tag in use */ #ifdef CONFIG_BLOCK - -int scsi_change_queue_type(struct scsi_device *sdev, int tag_type); - -/** - * scsi_get_tag_type - get the type of tag the device supports - * @sdev: the scsi device - */ -static inline int scsi_get_tag_type(struct scsi_device *sdev) -{ - if (!sdev->tagged_supported) - return 0; - if (sdev->simple_tags) - return MSG_SIMPLE_TAG; - return 0; -} - -static inline void scsi_set_tag_type(struct scsi_device *sdev, int tag) -{ - switch (tag) { - case MSG_ORDERED_TAG: - case MSG_SIMPLE_TAG: - sdev->simple_tags = 1; - break; - case 0: - /* fall through */ - default: - sdev->simple_tags = 0; - break; - } -} - static inline struct scsi_cmnd *scsi_mq_find_tag(struct Scsi_Host *shost, int unique_tag) { diff --git a/include/target/target_core_backend.h b/include/target/target_core_backend.h index 9adc1bca1178..430cfaf92285 100644 --- a/include/target/target_core_backend.h +++ b/include/target/target_core_backend.h @@ -5,6 +5,15 @@ #define TRANSPORT_PLUGIN_VHBA_PDEV 2 #define TRANSPORT_PLUGIN_VHBA_VDEV 3 +struct target_backend_cits { + struct config_item_type tb_dev_cit; + struct config_item_type tb_dev_attrib_cit; + struct config_item_type tb_dev_pr_cit; + struct config_item_type tb_dev_wwn_cit; + struct config_item_type tb_dev_alua_tg_pt_gps_cit; + struct config_item_type tb_dev_stat_cit; +}; + struct se_subsystem_api { struct list_head sub_api_list; @@ -44,6 +53,8 @@ struct se_subsystem_api { int (*init_prot)(struct se_device *); int (*format_prot)(struct se_device *); void (*free_prot)(struct se_device *); + + struct target_backend_cits tb_cits; }; struct sbc_ops { @@ -96,4 +107,36 @@ sense_reason_t transport_generic_map_mem_to_cmd(struct se_cmd *, void array_free(void *array, int n); +/* From target_core_configfs.c to setup default backend config_item_types */ +void target_core_setup_sub_cits(struct se_subsystem_api *); + +/* attribute helpers from target_core_device.c for backend drivers */ +int se_dev_set_max_unmap_lba_count(struct se_device *, u32); +int se_dev_set_max_unmap_block_desc_count(struct se_device *, u32); +int se_dev_set_unmap_granularity(struct se_device *, u32); +int se_dev_set_unmap_granularity_alignment(struct se_device *, u32); +int se_dev_set_max_write_same_len(struct se_device *, u32); +int se_dev_set_emulate_model_alias(struct se_device *, int); +int se_dev_set_emulate_dpo(struct se_device *, int); +int se_dev_set_emulate_fua_write(struct se_device *, int); +int se_dev_set_emulate_fua_read(struct se_device *, int); +int se_dev_set_emulate_write_cache(struct se_device *, int); +int se_dev_set_emulate_ua_intlck_ctrl(struct se_device *, int); +int se_dev_set_emulate_tas(struct se_device *, int); +int se_dev_set_emulate_tpu(struct se_device *, int); +int se_dev_set_emulate_tpws(struct se_device *, int); +int se_dev_set_emulate_caw(struct se_device *, int); +int se_dev_set_emulate_3pc(struct se_device *, int); +int se_dev_set_pi_prot_type(struct se_device *, int); +int se_dev_set_pi_prot_format(struct se_device *, int); +int se_dev_set_enforce_pr_isids(struct se_device *, int); +int se_dev_set_force_pr_aptpl(struct se_device *, int); +int se_dev_set_is_nonrot(struct se_device *, int); +int se_dev_set_emulate_rest_reord(struct se_device *dev, int); +int se_dev_set_queue_depth(struct se_device *, u32); +int se_dev_set_max_sectors(struct se_device *, u32); +int se_dev_set_fabric_max_sectors(struct se_device *, u32); +int se_dev_set_optimal_sectors(struct se_device *, u32); +int se_dev_set_block_size(struct se_device *, u32); + #endif /* TARGET_CORE_BACKEND_H */ diff --git a/include/target/target_core_backend_configfs.h b/include/target/target_core_backend_configfs.h new file mode 100644 index 000000000000..3247d7530107 --- /dev/null +++ b/include/target/target_core_backend_configfs.h @@ -0,0 +1,120 @@ +#ifndef TARGET_CORE_BACKEND_CONFIGFS_H +#define TARGET_CORE_BACKEND_CONFIGFS_H + +#include <target/configfs_macros.h> + +#define DEF_TB_DEV_ATTRIB_SHOW(_backend, _name) \ +static ssize_t _backend##_dev_show_attr_##_name( \ + struct se_dev_attrib *da, \ + char *page) \ +{ \ + return snprintf(page, PAGE_SIZE, "%u\n", \ + (u32)da->da_dev->dev_attrib._name); \ +} + +#define DEF_TB_DEV_ATTRIB_STORE(_backend, _name) \ +static ssize_t _backend##_dev_store_attr_##_name( \ + struct se_dev_attrib *da, \ + const char *page, \ + size_t count) \ +{ \ + unsigned long val; \ + int ret; \ + \ + ret = kstrtoul(page, 0, &val); \ + if (ret < 0) { \ + pr_err("kstrtoul() failed with ret: %d\n", ret); \ + return -EINVAL; \ + } \ + ret = se_dev_set_##_name(da->da_dev, (u32)val); \ + \ + return (!ret) ? count : -EINVAL; \ +} + +#define DEF_TB_DEV_ATTRIB(_backend, _name) \ +DEF_TB_DEV_ATTRIB_SHOW(_backend, _name); \ +DEF_TB_DEV_ATTRIB_STORE(_backend, _name); + +#define DEF_TB_DEV_ATTRIB_RO(_backend, name) \ +DEF_TB_DEV_ATTRIB_SHOW(_backend, name); + +CONFIGFS_EATTR_STRUCT(target_backend_dev_attrib, se_dev_attrib); +#define TB_DEV_ATTR(_backend, _name, _mode) \ +static struct target_backend_dev_attrib_attribute _backend##_dev_attrib_##_name = \ + __CONFIGFS_EATTR(_name, _mode, \ + _backend##_dev_show_attr_##_name, \ + _backend##_dev_store_attr_##_name); + +#define TB_DEV_ATTR_RO(_backend, _name) \ +static struct target_backend_dev_attrib_attribute _backend##_dev_attrib_##_name = \ + __CONFIGFS_EATTR_RO(_name, \ + _backend##_dev_show_attr_##_name); + +/* + * Default list of target backend device attributes as defined by + * struct se_dev_attrib + */ + +#define DEF_TB_DEFAULT_ATTRIBS(_backend) \ + DEF_TB_DEV_ATTRIB(_backend, emulate_model_alias); \ + TB_DEV_ATTR(_backend, emulate_model_alias, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_dpo); \ + TB_DEV_ATTR(_backend, emulate_dpo, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_fua_write); \ + TB_DEV_ATTR(_backend, emulate_fua_write, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_fua_read); \ + TB_DEV_ATTR(_backend, emulate_fua_read, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_write_cache); \ + TB_DEV_ATTR(_backend, emulate_write_cache, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_ua_intlck_ctrl); \ + TB_DEV_ATTR(_backend, emulate_ua_intlck_ctrl, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_tas); \ + TB_DEV_ATTR(_backend, emulate_tas, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_tpu); \ + TB_DEV_ATTR(_backend, emulate_tpu, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_tpws); \ + TB_DEV_ATTR(_backend, emulate_tpws, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_caw); \ + TB_DEV_ATTR(_backend, emulate_caw, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_3pc); \ + TB_DEV_ATTR(_backend, emulate_3pc, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, pi_prot_type); \ + TB_DEV_ATTR(_backend, pi_prot_type, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB_RO(_backend, hw_pi_prot_type); \ + TB_DEV_ATTR_RO(_backend, hw_pi_prot_type); \ + DEF_TB_DEV_ATTRIB(_backend, pi_prot_format); \ + TB_DEV_ATTR(_backend, pi_prot_format, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, enforce_pr_isids); \ + TB_DEV_ATTR(_backend, enforce_pr_isids, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, is_nonrot); \ + TB_DEV_ATTR(_backend, is_nonrot, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, emulate_rest_reord); \ + TB_DEV_ATTR(_backend, emulate_rest_reord, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, force_pr_aptpl); \ + TB_DEV_ATTR(_backend, force_pr_aptpl, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB_RO(_backend, hw_block_size); \ + TB_DEV_ATTR_RO(_backend, hw_block_size); \ + DEF_TB_DEV_ATTRIB(_backend, block_size); \ + TB_DEV_ATTR(_backend, block_size, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB_RO(_backend, hw_max_sectors); \ + TB_DEV_ATTR_RO(_backend, hw_max_sectors); \ + DEF_TB_DEV_ATTRIB(_backend, fabric_max_sectors); \ + TB_DEV_ATTR(_backend, fabric_max_sectors, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, optimal_sectors); \ + TB_DEV_ATTR(_backend, optimal_sectors, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB_RO(_backend, hw_queue_depth); \ + TB_DEV_ATTR_RO(_backend, hw_queue_depth); \ + DEF_TB_DEV_ATTRIB(_backend, queue_depth); \ + TB_DEV_ATTR(_backend, queue_depth, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, max_unmap_lba_count); \ + TB_DEV_ATTR(_backend, max_unmap_lba_count, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, max_unmap_block_desc_count); \ + TB_DEV_ATTR(_backend, max_unmap_block_desc_count, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, unmap_granularity); \ + TB_DEV_ATTR(_backend, unmap_granularity, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, unmap_granularity_alignment); \ + TB_DEV_ATTR(_backend, unmap_granularity_alignment, S_IRUGO | S_IWUSR); \ + DEF_TB_DEV_ATTRIB(_backend, max_write_same_len); \ + TB_DEV_ATTR(_backend, max_write_same_len, S_IRUGO | S_IWUSR); + +#endif /* TARGET_CORE_BACKEND_CONFIGFS_H */ diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h index 23c518a0340c..397fb635766a 100644 --- a/include/target/target_core_base.h +++ b/include/target/target_core_base.h @@ -476,6 +476,12 @@ struct se_dif_v1_tuple { __be32 ref_tag; }; +/* for sam_task_attr */ +#define TCM_SIMPLE_TAG 0x20 +#define TCM_HEAD_TAG 0x21 +#define TCM_ORDERED_TAG 0x22 +#define TCM_ACA_TAG 0x24 + struct se_cmd { /* SAM response code being sent to initiator */ u8 scsi_status; diff --git a/include/trace/events/target.h b/include/trace/events/target.h index 45403443dd82..04c3c6efdcc2 100644 --- a/include/trace/events/target.h +++ b/include/trace/events/target.h @@ -109,10 +109,10 @@ #define show_task_attribute_name(val) \ __print_symbolic(val, \ - { MSG_SIMPLE_TAG, "SIMPLE" }, \ - { MSG_HEAD_TAG, "HEAD" }, \ - { MSG_ORDERED_TAG, "ORDERED" }, \ - { MSG_ACA_TAG, "ACA" } ) + { TCM_SIMPLE_TAG, "SIMPLE" }, \ + { TCM_HEAD_TAG, "HEAD" }, \ + { TCM_ORDERED_TAG, "ORDERED" }, \ + { TCM_ACA_TAG, "ACA" } ) #define show_scsi_status_name(val) \ __print_symbolic(val, \ diff --git a/include/uapi/linux/audit.h b/include/uapi/linux/audit.h index 12e26683c706..d3475e1f15ec 100644 --- a/include/uapi/linux/audit.h +++ b/include/uapi/linux/audit.h @@ -371,7 +371,9 @@ enum { #define AUDIT_ARCH_PARISC (EM_PARISC) #define AUDIT_ARCH_PARISC64 (EM_PARISC|__AUDIT_ARCH_64BIT) #define AUDIT_ARCH_PPC (EM_PPC) +/* do not define AUDIT_ARCH_PPCLE since it is not supported by audit */ #define AUDIT_ARCH_PPC64 (EM_PPC64|__AUDIT_ARCH_64BIT) +#define AUDIT_ARCH_PPC64LE (EM_PPC64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) #define AUDIT_ARCH_S390 (EM_S390) #define AUDIT_ARCH_S390X (EM_S390|__AUDIT_ARCH_64BIT) #define AUDIT_ARCH_SH (EM_SH) diff --git a/include/uapi/linux/target_core_user.h b/include/uapi/linux/target_core_user.h index 7dcfbe6771b1..b483d1909d3e 100644 --- a/include/uapi/linux/target_core_user.h +++ b/include/uapi/linux/target_core_user.h @@ -6,10 +6,6 @@ #include <linux/types.h> #include <linux/uio.h> -#ifndef __packed -#define __packed __attribute__((packed)) -#endif - #define TCMU_VERSION "1.0" /* |