diff options
Diffstat (limited to 'sound/soc/codecs/wm8996.c')
| -rw-r--r-- | sound/soc/codecs/wm8996.c | 1391 |
1 files changed, 827 insertions, 564 deletions
diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c index 0cdb9d105671..1fd635494045 100644 --- a/sound/soc/codecs/wm8996.c +++ b/sound/soc/codecs/wm8996.c @@ -19,6 +19,7 @@ #include <linux/gcd.h> #include <linux/gpio.h> #include <linux/i2c.h> +#include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> #include <linux/workqueue.h> @@ -41,15 +42,16 @@ #define HPOUT2L 4 #define HPOUT2R 8 -#define WM8996_NUM_SUPPLIES 4 +#define WM8996_NUM_SUPPLIES 3 static const char *wm8996_supply_names[WM8996_NUM_SUPPLIES] = { "DBVDD", "AVDD1", "AVDD2", - "CPVDD", }; struct wm8996_priv { + struct device *dev; + struct regmap *regmap; struct snd_soc_codec *codec; int ldo1ena; @@ -71,6 +73,7 @@ struct wm8996_priv { struct regulator_bulk_data supplies[WM8996_NUM_SUPPLIES]; struct notifier_block disable_nb[WM8996_NUM_SUPPLIES]; + int bg_ena; struct wm8996_pdata pdata; @@ -86,6 +89,7 @@ struct wm8996_priv { struct snd_soc_jack *jack; bool detecting; bool jack_mic; + int jack_flips; wm8996_polarity_fn polarity_cb; #ifdef CONFIG_GPIOLIB @@ -104,7 +108,7 @@ static int wm8996_regulator_event_##n(struct notifier_block *nb, \ struct wm8996_priv *wm8996 = container_of(nb, struct wm8996_priv, \ disable_nb[n]); \ if (event & REGULATOR_EVENT_DISABLE) { \ - wm8996->codec->cache_sync = 1; \ + regcache_mark_dirty(wm8996->regmap); \ } \ return 0; \ } @@ -112,299 +116,364 @@ static int wm8996_regulator_event_##n(struct notifier_block *nb, \ WM8996_REGULATOR_EVENT(0) WM8996_REGULATOR_EVENT(1) WM8996_REGULATOR_EVENT(2) -WM8996_REGULATOR_EVENT(3) - -static const u16 wm8996_reg[WM8996_MAX_REGISTER] = { - [WM8996_SOFTWARE_RESET] = 0x8996, - [WM8996_POWER_MANAGEMENT_7] = 0x10, - [WM8996_DAC1_HPOUT1_VOLUME] = 0x88, - [WM8996_DAC2_HPOUT2_VOLUME] = 0x88, - [WM8996_DAC1_LEFT_VOLUME] = 0x2c0, - [WM8996_DAC1_RIGHT_VOLUME] = 0x2c0, - [WM8996_DAC2_LEFT_VOLUME] = 0x2c0, - [WM8996_DAC2_RIGHT_VOLUME] = 0x2c0, - [WM8996_OUTPUT1_LEFT_VOLUME] = 0x80, - [WM8996_OUTPUT1_RIGHT_VOLUME] = 0x80, - [WM8996_OUTPUT2_LEFT_VOLUME] = 0x80, - [WM8996_OUTPUT2_RIGHT_VOLUME] = 0x80, - [WM8996_MICBIAS_1] = 0x39, - [WM8996_MICBIAS_2] = 0x39, - [WM8996_LDO_1] = 0x3, - [WM8996_LDO_2] = 0x13, - [WM8996_ACCESSORY_DETECT_MODE_1] = 0x4, - [WM8996_HEADPHONE_DETECT_1] = 0x20, - [WM8996_MIC_DETECT_1] = 0x7600, - [WM8996_MIC_DETECT_2] = 0xbf, - [WM8996_CHARGE_PUMP_1] = 0x1f25, - [WM8996_CHARGE_PUMP_2] = 0xab19, - [WM8996_DC_SERVO_5] = 0x2a2a, - [WM8996_CONTROL_INTERFACE_1] = 0x8004, - [WM8996_CLOCKING_1] = 0x10, - [WM8996_AIF_RATE] = 0x83, - [WM8996_FLL_CONTROL_4] = 0x5dc0, - [WM8996_FLL_CONTROL_5] = 0xc84, - [WM8996_FLL_EFS_2] = 0x2, - [WM8996_AIF1_TX_LRCLK_1] = 0x80, - [WM8996_AIF1_TX_LRCLK_2] = 0x8, - [WM8996_AIF1_RX_LRCLK_1] = 0x80, - [WM8996_AIF1TX_DATA_CONFIGURATION_1] = 0x1818, - [WM8996_AIF1RX_DATA_CONFIGURATION] = 0x1818, - [WM8996_AIF1TX_TEST] = 0x7, - [WM8996_AIF2_TX_LRCLK_1] = 0x80, - [WM8996_AIF2_TX_LRCLK_2] = 0x8, - [WM8996_AIF2_RX_LRCLK_1] = 0x80, - [WM8996_AIF2TX_DATA_CONFIGURATION_1] = 0x1818, - [WM8996_AIF2RX_DATA_CONFIGURATION] = 0x1818, - [WM8996_AIF2TX_TEST] = 0x1, - [WM8996_DSP1_TX_LEFT_VOLUME] = 0xc0, - [WM8996_DSP1_TX_RIGHT_VOLUME] = 0xc0, - [WM8996_DSP1_RX_LEFT_VOLUME] = 0xc0, - [WM8996_DSP1_RX_RIGHT_VOLUME] = 0xc0, - [WM8996_DSP1_TX_FILTERS] = 0x2000, - [WM8996_DSP1_RX_FILTERS_1] = 0x200, - [WM8996_DSP1_RX_FILTERS_2] = 0x10, - [WM8996_DSP1_DRC_1] = 0x98, - [WM8996_DSP1_DRC_2] = 0x845, - [WM8996_DSP1_RX_EQ_GAINS_1] = 0x6318, - [WM8996_DSP1_RX_EQ_GAINS_2] = 0x6300, - [WM8996_DSP1_RX_EQ_BAND_1_A] = 0xfca, - [WM8996_DSP1_RX_EQ_BAND_1_B] = 0x400, - [WM8996_DSP1_RX_EQ_BAND_1_PG] = 0xd8, - [WM8996_DSP1_RX_EQ_BAND_2_A] = 0x1eb5, - [WM8996_DSP1_RX_EQ_BAND_2_B] = 0xf145, - [WM8996_DSP1_RX_EQ_BAND_2_C] = 0xb75, - [WM8996_DSP1_RX_EQ_BAND_2_PG] = 0x1c5, - [WM8996_DSP1_RX_EQ_BAND_3_A] = 0x1c58, - [WM8996_DSP1_RX_EQ_BAND_3_B] = 0xf373, - [WM8996_DSP1_RX_EQ_BAND_3_C] = 0xa54, - [WM8996_DSP1_RX_EQ_BAND_3_PG] = 0x558, - [WM8996_DSP1_RX_EQ_BAND_4_A] = 0x168e, - [WM8996_DSP1_RX_EQ_BAND_4_B] = 0xf829, - [WM8996_DSP1_RX_EQ_BAND_4_C] = 0x7ad, - [WM8996_DSP1_RX_EQ_BAND_4_PG] = 0x1103, - [WM8996_DSP1_RX_EQ_BAND_5_A] = 0x564, - [WM8996_DSP1_RX_EQ_BAND_5_B] = 0x559, - [WM8996_DSP1_RX_EQ_BAND_5_PG] = 0x4000, - [WM8996_DSP2_TX_LEFT_VOLUME] = 0xc0, - [WM8996_DSP2_TX_RIGHT_VOLUME] = 0xc0, - [WM8996_DSP2_RX_LEFT_VOLUME] = 0xc0, - [WM8996_DSP2_RX_RIGHT_VOLUME] = 0xc0, - [WM8996_DSP2_TX_FILTERS] = 0x2000, - [WM8996_DSP2_RX_FILTERS_1] = 0x200, - [WM8996_DSP2_RX_FILTERS_2] = 0x10, - [WM8996_DSP2_DRC_1] = 0x98, - [WM8996_DSP2_DRC_2] = 0x845, - [WM8996_DSP2_RX_EQ_GAINS_1] = 0x6318, - [WM8996_DSP2_RX_EQ_GAINS_2] = 0x6300, - [WM8996_DSP2_RX_EQ_BAND_1_A] = 0xfca, - [WM8996_DSP2_RX_EQ_BAND_1_B] = 0x400, - [WM8996_DSP2_RX_EQ_BAND_1_PG] = 0xd8, - [WM8996_DSP2_RX_EQ_BAND_2_A] = 0x1eb5, - [WM8996_DSP2_RX_EQ_BAND_2_B] = 0xf145, - [WM8996_DSP2_RX_EQ_BAND_2_C] = 0xb75, - [WM8996_DSP2_RX_EQ_BAND_2_PG] = 0x1c5, - [WM8996_DSP2_RX_EQ_BAND_3_A] = 0x1c58, - [WM8996_DSP2_RX_EQ_BAND_3_B] = 0xf373, - [WM8996_DSP2_RX_EQ_BAND_3_C] = 0xa54, - [WM8996_DSP2_RX_EQ_BAND_3_PG] = 0x558, - [WM8996_DSP2_RX_EQ_BAND_4_A] = 0x168e, - [WM8996_DSP2_RX_EQ_BAND_4_B] = 0xf829, - [WM8996_DSP2_RX_EQ_BAND_4_C] = 0x7ad, - [WM8996_DSP2_RX_EQ_BAND_4_PG] = 0x1103, - [WM8996_DSP2_RX_EQ_BAND_5_A] = 0x564, - [WM8996_DSP2_RX_EQ_BAND_5_B] = 0x559, - [WM8996_DSP2_RX_EQ_BAND_5_PG] = 0x4000, - [WM8996_OVERSAMPLING] = 0xd, - [WM8996_SIDETONE] = 0x1040, - [WM8996_GPIO_1] = 0xa101, - [WM8996_GPIO_2] = 0xa101, - [WM8996_GPIO_3] = 0xa101, - [WM8996_GPIO_4] = 0xa101, - [WM8996_GPIO_5] = 0xa101, - [WM8996_PULL_CONTROL_2] = 0x140, - [WM8996_INTERRUPT_STATUS_1_MASK] = 0x1f, - [WM8996_INTERRUPT_STATUS_2_MASK] = 0x1ecf, - [WM8996_RIGHT_PDM_SPEAKER] = 0x1, - [WM8996_PDM_SPEAKER_MUTE_SEQUENCE] = 0x69, - [WM8996_PDM_SPEAKER_VOLUME] = 0x66, - [WM8996_WRITE_SEQUENCER_0] = 0x1, - [WM8996_WRITE_SEQUENCER_1] = 0x1, - [WM8996_WRITE_SEQUENCER_3] = 0x6, - [WM8996_WRITE_SEQUENCER_4] = 0x40, - [WM8996_WRITE_SEQUENCER_5] = 0x1, - [WM8996_WRITE_SEQUENCER_6] = 0xf, - [WM8996_WRITE_SEQUENCER_7] = 0x6, - [WM8996_WRITE_SEQUENCER_8] = 0x1, - [WM8996_WRITE_SEQUENCER_9] = 0x3, - [WM8996_WRITE_SEQUENCER_10] = 0x104, - [WM8996_WRITE_SEQUENCER_12] = 0x60, - [WM8996_WRITE_SEQUENCER_13] = 0x11, - [WM8996_WRITE_SEQUENCER_14] = 0x401, - [WM8996_WRITE_SEQUENCER_16] = 0x50, - [WM8996_WRITE_SEQUENCER_17] = 0x3, - [WM8996_WRITE_SEQUENCER_18] = 0x100, - [WM8996_WRITE_SEQUENCER_20] = 0x51, - [WM8996_WRITE_SEQUENCER_21] = 0x3, - [WM8996_WRITE_SEQUENCER_22] = 0x104, - [WM8996_WRITE_SEQUENCER_23] = 0xa, - [WM8996_WRITE_SEQUENCER_24] = 0x60, - [WM8996_WRITE_SEQUENCER_25] = 0x3b, - [WM8996_WRITE_SEQUENCER_26] = 0x502, - [WM8996_WRITE_SEQUENCER_27] = 0x100, - [WM8996_WRITE_SEQUENCER_28] = 0x2fff, - [WM8996_WRITE_SEQUENCER_32] = 0x2fff, - [WM8996_WRITE_SEQUENCER_36] = 0x2fff, - [WM8996_WRITE_SEQUENCER_40] = 0x2fff, - [WM8996_WRITE_SEQUENCER_44] = 0x2fff, - [WM8996_WRITE_SEQUENCER_48] = 0x2fff, - [WM8996_WRITE_SEQUENCER_52] = 0x2fff, - [WM8996_WRITE_SEQUENCER_56] = 0x2fff, - [WM8996_WRITE_SEQUENCER_60] = 0x2fff, - [WM8996_WRITE_SEQUENCER_64] = 0x1, - [WM8996_WRITE_SEQUENCER_65] = 0x1, - [WM8996_WRITE_SEQUENCER_67] = 0x6, - [WM8996_WRITE_SEQUENCER_68] = 0x40, - [WM8996_WRITE_SEQUENCER_69] = 0x1, - [WM8996_WRITE_SEQUENCER_70] = 0xf, - [WM8996_WRITE_SEQUENCER_71] = 0x6, - [WM8996_WRITE_SEQUENCER_72] = 0x1, - [WM8996_WRITE_SEQUENCER_73] = 0x3, - [WM8996_WRITE_SEQUENCER_74] = 0x104, - [WM8996_WRITE_SEQUENCER_76] = 0x60, - [WM8996_WRITE_SEQUENCER_77] = 0x11, - [WM8996_WRITE_SEQUENCER_78] = 0x401, - [WM8996_WRITE_SEQUENCER_80] = 0x50, - [WM8996_WRITE_SEQUENCER_81] = 0x3, - [WM8996_WRITE_SEQUENCER_82] = 0x100, - [WM8996_WRITE_SEQUENCER_84] = 0x60, - [WM8996_WRITE_SEQUENCER_85] = 0x3b, - [WM8996_WRITE_SEQUENCER_86] = 0x502, - [WM8996_WRITE_SEQUENCER_87] = 0x100, - [WM8996_WRITE_SEQUENCER_88] = 0x2fff, - [WM8996_WRITE_SEQUENCER_92] = 0x2fff, - [WM8996_WRITE_SEQUENCER_96] = 0x2fff, - [WM8996_WRITE_SEQUENCER_100] = 0x2fff, - [WM8996_WRITE_SEQUENCER_104] = 0x2fff, - [WM8996_WRITE_SEQUENCER_108] = 0x2fff, - [WM8996_WRITE_SEQUENCER_112] = 0x2fff, - [WM8996_WRITE_SEQUENCER_116] = 0x2fff, - [WM8996_WRITE_SEQUENCER_120] = 0x2fff, - [WM8996_WRITE_SEQUENCER_124] = 0x2fff, - [WM8996_WRITE_SEQUENCER_128] = 0x1, - [WM8996_WRITE_SEQUENCER_129] = 0x1, - [WM8996_WRITE_SEQUENCER_131] = 0x6, - [WM8996_WRITE_SEQUENCER_132] = 0x40, - [WM8996_WRITE_SEQUENCER_133] = 0x1, - [WM8996_WRITE_SEQUENCER_134] = 0xf, - [WM8996_WRITE_SEQUENCER_135] = 0x6, - [WM8996_WRITE_SEQUENCER_136] = 0x1, - [WM8996_WRITE_SEQUENCER_137] = 0x3, - [WM8996_WRITE_SEQUENCER_138] = 0x106, - [WM8996_WRITE_SEQUENCER_140] = 0x61, - [WM8996_WRITE_SEQUENCER_141] = 0x11, - [WM8996_WRITE_SEQUENCER_142] = 0x401, - [WM8996_WRITE_SEQUENCER_144] = 0x50, - [WM8996_WRITE_SEQUENCER_145] = 0x3, - [WM8996_WRITE_SEQUENCER_146] = 0x102, - [WM8996_WRITE_SEQUENCER_148] = 0x51, - [WM8996_WRITE_SEQUENCER_149] = 0x3, - [WM8996_WRITE_SEQUENCER_150] = 0x106, - [WM8996_WRITE_SEQUENCER_151] = 0xa, - [WM8996_WRITE_SEQUENCER_152] = 0x61, - [WM8996_WRITE_SEQUENCER_153] = 0x3b, - [WM8996_WRITE_SEQUENCER_154] = 0x502, - [WM8996_WRITE_SEQUENCER_155] = 0x100, - [WM8996_WRITE_SEQUENCER_156] = 0x2fff, - [WM8996_WRITE_SEQUENCER_160] = 0x2fff, - [WM8996_WRITE_SEQUENCER_164] = 0x2fff, - [WM8996_WRITE_SEQUENCER_168] = 0x2fff, - [WM8996_WRITE_SEQUENCER_172] = 0x2fff, - [WM8996_WRITE_SEQUENCER_176] = 0x2fff, - [WM8996_WRITE_SEQUENCER_180] = 0x2fff, - [WM8996_WRITE_SEQUENCER_184] = 0x2fff, - [WM8996_WRITE_SEQUENCER_188] = 0x2fff, - [WM8996_WRITE_SEQUENCER_192] = 0x1, - [WM8996_WRITE_SEQUENCER_193] = 0x1, - [WM8996_WRITE_SEQUENCER_195] = 0x6, - [WM8996_WRITE_SEQUENCER_196] = 0x40, - [WM8996_WRITE_SEQUENCER_197] = 0x1, - [WM8996_WRITE_SEQUENCER_198] = 0xf, - [WM8996_WRITE_SEQUENCER_199] = 0x6, - [WM8996_WRITE_SEQUENCER_200] = 0x1, - [WM8996_WRITE_SEQUENCER_201] = 0x3, - [WM8996_WRITE_SEQUENCER_202] = 0x106, - [WM8996_WRITE_SEQUENCER_204] = 0x61, - [WM8996_WRITE_SEQUENCER_205] = 0x11, - [WM8996_WRITE_SEQUENCER_206] = 0x401, - [WM8996_WRITE_SEQUENCER_208] = 0x50, - [WM8996_WRITE_SEQUENCER_209] = 0x3, - [WM8996_WRITE_SEQUENCER_210] = 0x102, - [WM8996_WRITE_SEQUENCER_212] = 0x61, - [WM8996_WRITE_SEQUENCER_213] = 0x3b, - [WM8996_WRITE_SEQUENCER_214] = 0x502, - [WM8996_WRITE_SEQUENCER_215] = 0x100, - [WM8996_WRITE_SEQUENCER_216] = 0x2fff, - [WM8996_WRITE_SEQUENCER_220] = 0x2fff, - [WM8996_WRITE_SEQUENCER_224] = 0x2fff, - [WM8996_WRITE_SEQUENCER_228] = 0x2fff, - [WM8996_WRITE_SEQUENCER_232] = 0x2fff, - [WM8996_WRITE_SEQUENCER_236] = 0x2fff, - [WM8996_WRITE_SEQUENCER_240] = 0x2fff, - [WM8996_WRITE_SEQUENCER_244] = 0x2fff, - [WM8996_WRITE_SEQUENCER_248] = 0x2fff, - [WM8996_WRITE_SEQUENCER_252] = 0x2fff, - [WM8996_WRITE_SEQUENCER_256] = 0x60, - [WM8996_WRITE_SEQUENCER_258] = 0x601, - [WM8996_WRITE_SEQUENCER_260] = 0x50, - [WM8996_WRITE_SEQUENCER_262] = 0x100, - [WM8996_WRITE_SEQUENCER_264] = 0x1, - [WM8996_WRITE_SEQUENCER_266] = 0x104, - [WM8996_WRITE_SEQUENCER_267] = 0x100, - [WM8996_WRITE_SEQUENCER_268] = 0x2fff, - [WM8996_WRITE_SEQUENCER_272] = 0x2fff, - [WM8996_WRITE_SEQUENCER_276] = 0x2fff, - [WM8996_WRITE_SEQUENCER_280] = 0x2fff, - [WM8996_WRITE_SEQUENCER_284] = 0x2fff, - [WM8996_WRITE_SEQUENCER_288] = 0x2fff, - [WM8996_WRITE_SEQUENCER_292] = 0x2fff, - [WM8996_WRITE_SEQUENCER_296] = 0x2fff, - [WM8996_WRITE_SEQUENCER_300] = 0x2fff, - [WM8996_WRITE_SEQUENCER_304] = 0x2fff, - [WM8996_WRITE_SEQUENCER_308] = 0x2fff, - [WM8996_WRITE_SEQUENCER_312] = 0x2fff, - [WM8996_WRITE_SEQUENCER_316] = 0x2fff, - [WM8996_WRITE_SEQUENCER_320] = 0x61, - [WM8996_WRITE_SEQUENCER_322] = 0x601, - [WM8996_WRITE_SEQUENCER_324] = 0x50, - [WM8996_WRITE_SEQUENCER_326] = 0x102, - [WM8996_WRITE_SEQUENCER_328] = 0x1, - [WM8996_WRITE_SEQUENCER_330] = 0x106, - [WM8996_WRITE_SEQUENCER_331] = 0x100, - [WM8996_WRITE_SEQUENCER_332] = 0x2fff, - [WM8996_WRITE_SEQUENCER_336] = 0x2fff, - [WM8996_WRITE_SEQUENCER_340] = 0x2fff, - [WM8996_WRITE_SEQUENCER_344] = 0x2fff, - [WM8996_WRITE_SEQUENCER_348] = 0x2fff, - [WM8996_WRITE_SEQUENCER_352] = 0x2fff, - [WM8996_WRITE_SEQUENCER_356] = 0x2fff, - [WM8996_WRITE_SEQUENCER_360] = 0x2fff, - [WM8996_WRITE_SEQUENCER_364] = 0x2fff, - [WM8996_WRITE_SEQUENCER_368] = 0x2fff, - [WM8996_WRITE_SEQUENCER_372] = 0x2fff, - [WM8996_WRITE_SEQUENCER_376] = 0x2fff, - [WM8996_WRITE_SEQUENCER_380] = 0x2fff, - [WM8996_WRITE_SEQUENCER_384] = 0x60, - [WM8996_WRITE_SEQUENCER_386] = 0x601, - [WM8996_WRITE_SEQUENCER_388] = 0x61, - [WM8996_WRITE_SEQUENCER_390] = 0x601, - [WM8996_WRITE_SEQUENCER_392] = 0x50, - [WM8996_WRITE_SEQUENCER_394] = 0x300, - [WM8996_WRITE_SEQUENCER_396] = 0x1, - [WM8996_WRITE_SEQUENCER_398] = 0x304, - [WM8996_WRITE_SEQUENCER_400] = 0x40, - [WM8996_WRITE_SEQUENCER_402] = 0xf, - [WM8996_WRITE_SEQUENCER_404] = 0x1, - [WM8996_WRITE_SEQUENCER_407] = 0x100, + +static struct reg_default wm8996_reg[] = { + { WM8996_POWER_MANAGEMENT_1, 0x0 }, + { WM8996_POWER_MANAGEMENT_2, 0x0 }, + { WM8996_POWER_MANAGEMENT_3, 0x0 }, + { WM8996_POWER_MANAGEMENT_4, 0x0 }, + { WM8996_POWER_MANAGEMENT_5, 0x0 }, + { WM8996_POWER_MANAGEMENT_6, 0x0 }, + { WM8996_POWER_MANAGEMENT_7, 0x10 }, + { WM8996_POWER_MANAGEMENT_8, 0x0 }, + { WM8996_LEFT_LINE_INPUT_VOLUME, 0x0 }, + { WM8996_RIGHT_LINE_INPUT_VOLUME, 0x0 }, + { WM8996_LINE_INPUT_CONTROL, 0x0 }, + { WM8996_DAC1_HPOUT1_VOLUME, 0x88 }, + { WM8996_DAC2_HPOUT2_VOLUME, 0x88 }, + { WM8996_DAC1_LEFT_VOLUME, 0x2c0 }, + { WM8996_DAC1_RIGHT_VOLUME, 0x2c0 }, + { WM8996_DAC2_LEFT_VOLUME, 0x2c0 }, + { WM8996_DAC2_RIGHT_VOLUME, 0x2c0 }, + { WM8996_OUTPUT1_LEFT_VOLUME, 0x80 }, + { WM8996_OUTPUT1_RIGHT_VOLUME, 0x80 }, + { WM8996_OUTPUT2_LEFT_VOLUME, 0x80 }, + { WM8996_OUTPUT2_RIGHT_VOLUME, 0x80 }, + { WM8996_MICBIAS_1, 0x39 }, + { WM8996_MICBIAS_2, 0x39 }, + { WM8996_LDO_1, 0x3 }, + { WM8996_LDO_2, 0x13 }, + { WM8996_ACCESSORY_DETECT_MODE_1, 0x4 }, + { WM8996_ACCESSORY_DETECT_MODE_2, 0x0 }, + { WM8996_HEADPHONE_DETECT_1, 0x20 }, + { WM8996_HEADPHONE_DETECT_2, 0x0 }, + { WM8996_MIC_DETECT_1, 0x7600 }, + { WM8996_MIC_DETECT_2, 0xbf }, + { WM8996_CHARGE_PUMP_1, 0x1f25 }, + { WM8996_CHARGE_PUMP_2, 0xab19 }, + { WM8996_DC_SERVO_1, 0x0 }, + { WM8996_DC_SERVO_3, 0x0 }, + { WM8996_DC_SERVO_5, 0x2a2a }, + { WM8996_DC_SERVO_6, 0x0 }, + { WM8996_DC_SERVO_7, 0x0 }, + { WM8996_ANALOGUE_HP_1, 0x0 }, + { WM8996_ANALOGUE_HP_2, 0x0 }, + { WM8996_CONTROL_INTERFACE_1, 0x8004 }, + { WM8996_WRITE_SEQUENCER_CTRL_1, 0x0 }, + { WM8996_WRITE_SEQUENCER_CTRL_2, 0x0 }, + { WM8996_AIF_CLOCKING_1, 0x0 }, + { WM8996_AIF_CLOCKING_2, 0x0 }, + { WM8996_CLOCKING_1, 0x10 }, + { WM8996_CLOCKING_2, 0x0 }, + { WM8996_AIF_RATE, 0x83 }, + { WM8996_FLL_CONTROL_1, 0x0 }, + { WM8996_FLL_CONTROL_2, 0x0 }, + { WM8996_FLL_CONTROL_3, 0x0 }, + { WM8996_FLL_CONTROL_4, 0x5dc0 }, + { WM8996_FLL_CONTROL_5, 0xc84 }, + { WM8996_FLL_EFS_1, 0x0 }, + { WM8996_FLL_EFS_2, 0x2 }, + { WM8996_AIF1_CONTROL, 0x0 }, + { WM8996_AIF1_BCLK, 0x0 }, + { WM8996_AIF1_TX_LRCLK_1, 0x80 }, + { WM8996_AIF1_TX_LRCLK_2, 0x8 }, + { WM8996_AIF1_RX_LRCLK_1, 0x80 }, + { WM8996_AIF1_RX_LRCLK_2, 0x0 }, + { WM8996_AIF1TX_DATA_CONFIGURATION_1, 0x1818 }, + { WM8996_AIF1TX_DATA_CONFIGURATION_2, 0 }, + { WM8996_AIF1RX_DATA_CONFIGURATION, 0x1818 }, + { WM8996_AIF1TX_CHANNEL_0_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_2_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_3_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_4_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_CHANNEL_5_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_0_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_1_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_2_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_3_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_4_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_CHANNEL_5_CONFIGURATION, 0x0 }, + { WM8996_AIF1RX_MONO_CONFIGURATION, 0x0 }, + { WM8996_AIF1TX_TEST, 0x7 }, + { WM8996_AIF2_CONTROL, 0x0 }, + { WM8996_AIF2_BCLK, 0x0 }, + { WM8996_AIF2_TX_LRCLK_1, 0x80 }, + { WM8996_AIF2_TX_LRCLK_2, 0x8 }, + { WM8996_AIF2_RX_LRCLK_1, 0x80 }, + { WM8996_AIF2_RX_LRCLK_2, 0x0 }, + { WM8996_AIF2TX_DATA_CONFIGURATION_1, 0x1818 }, + { WM8996_AIF2RX_DATA_CONFIGURATION, 0x1818 }, + { WM8996_AIF2RX_DATA_CONFIGURATION, 0x0 }, + { WM8996_AIF2TX_CHANNEL_0_CONFIGURATION, 0x0 }, + { WM8996_AIF2TX_CHANNEL_1_CONFIGURATION, 0x0 }, + { WM8996_AIF2RX_CHANNEL_0_CONFIGURATION, 0x0 }, + { WM8996_AIF2RX_CHANNEL_1_CONFIGURATION, 0x0 }, + { WM8996_AIF2RX_MONO_CONFIGURATION, 0x0 }, + { WM8996_AIF2TX_TEST, 0x1 }, + { WM8996_DSP1_TX_LEFT_VOLUME, 0xc0 }, + { WM8996_DSP1_TX_RIGHT_VOLUME, 0xc0 }, + { WM8996_DSP1_RX_LEFT_VOLUME, 0xc0 }, + { WM8996_DSP1_RX_RIGHT_VOLUME, 0xc0 }, + { WM8996_DSP1_TX_FILTERS, 0x2000 }, + { WM8996_DSP1_RX_FILTERS_1, 0x200 }, + { WM8996_DSP1_RX_FILTERS_2, 0x10 }, + { WM8996_DSP1_DRC_1, 0x98 }, + { WM8996_DSP1_DRC_2, 0x845 }, + { WM8996_DSP1_RX_EQ_GAINS_1, 0x6318 }, + { WM8996_DSP1_RX_EQ_GAINS_2, 0x6300 }, + { WM8996_DSP1_RX_EQ_BAND_1_A, 0xfca }, + { WM8996_DSP1_RX_EQ_BAND_1_B, 0x400 }, + { WM8996_DSP1_RX_EQ_BAND_1_PG, 0xd8 }, + { WM8996_DSP1_RX_EQ_BAND_2_A, 0x1eb5 }, + { WM8996_DSP1_RX_EQ_BAND_2_B, 0xf145 }, + { WM8996_DSP1_RX_EQ_BAND_2_C, 0xb75 }, + { WM8996_DSP1_RX_EQ_BAND_2_PG, 0x1c5 }, + { WM8996_DSP1_RX_EQ_BAND_3_A, 0x1c58 }, + { WM8996_DSP1_RX_EQ_BAND_3_B, 0xf373 }, + { WM8996_DSP1_RX_EQ_BAND_3_C, 0xa54 }, + { WM8996_DSP1_RX_EQ_BAND_3_PG, 0x558 }, + { WM8996_DSP1_RX_EQ_BAND_4_A, 0x168e }, + { WM8996_DSP1_RX_EQ_BAND_4_B, 0xf829 }, + { WM8996_DSP1_RX_EQ_BAND_4_C, 0x7ad }, + { WM8996_DSP1_RX_EQ_BAND_4_PG, 0x1103 }, + { WM8996_DSP1_RX_EQ_BAND_5_A, 0x564 }, + { WM8996_DSP1_RX_EQ_BAND_5_B, 0x559 }, + { WM8996_DSP1_RX_EQ_BAND_5_PG, 0x4000 }, + { WM8996_DSP2_TX_LEFT_VOLUME, 0xc0 }, + { WM8996_DSP2_TX_RIGHT_VOLUME, 0xc0 }, + { WM8996_DSP2_RX_LEFT_VOLUME, 0xc0 }, + { WM8996_DSP2_RX_RIGHT_VOLUME, 0xc0 }, + { WM8996_DSP2_TX_FILTERS, 0x2000 }, + { WM8996_DSP2_RX_FILTERS_1, 0x200 }, + { WM8996_DSP2_RX_FILTERS_2, 0x10 }, + { WM8996_DSP2_DRC_1, 0x98 }, + { WM8996_DSP2_DRC_2, 0x845 }, + { WM8996_DSP2_RX_EQ_GAINS_1, 0x6318 }, + { WM8996_DSP2_RX_EQ_GAINS_2, 0x6300 }, + { WM8996_DSP2_RX_EQ_BAND_1_A, 0xfca }, + { WM8996_DSP2_RX_EQ_BAND_1_B, 0x400 }, + { WM8996_DSP2_RX_EQ_BAND_1_PG, 0xd8 }, + { WM8996_DSP2_RX_EQ_BAND_2_A, 0x1eb5 }, + { WM8996_DSP2_RX_EQ_BAND_2_B, 0xf145 }, + { WM8996_DSP2_RX_EQ_BAND_2_C, 0xb75 }, + { WM8996_DSP2_RX_EQ_BAND_2_PG, 0x1c5 }, + { WM8996_DSP2_RX_EQ_BAND_3_A, 0x1c58 }, + { WM8996_DSP2_RX_EQ_BAND_3_B, 0xf373 }, + { WM8996_DSP2_RX_EQ_BAND_3_C, 0xa54 }, + { WM8996_DSP2_RX_EQ_BAND_3_PG, 0x558 }, + { WM8996_DSP2_RX_EQ_BAND_4_A, 0x168e }, + { WM8996_DSP2_RX_EQ_BAND_4_B, 0xf829 }, + { WM8996_DSP2_RX_EQ_BAND_4_C, 0x7ad }, + { WM8996_DSP2_RX_EQ_BAND_4_PG, 0x1103 }, + { WM8996_DSP2_RX_EQ_BAND_5_A, 0x564 }, + { WM8996_DSP2_RX_EQ_BAND_5_B, 0x559 }, + { WM8996_DSP2_RX_EQ_BAND_5_PG, 0x4000 }, + { WM8996_DAC1_MIXER_VOLUMES, 0x0 }, + { WM8996_DAC1_LEFT_MIXER_ROUTING, 0x0 }, + { WM8996_DAC1_RIGHT_MIXER_ROUTING, 0x0 }, + { WM8996_DAC2_MIXER_VOLUMES, 0x0 }, + { WM8996_DAC2_LEFT_MIXER_ROUTING, 0x0 }, + { WM8996_DAC2_RIGHT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 0x0 }, + { WM8996_DSP_TX_MIXER_SELECT, 0x0 }, + { WM8996_DAC_SOFTMUTE, 0x0 }, + { WM8996_OVERSAMPLING, 0xd }, + { WM8996_SIDETONE, 0x1040 }, + { WM8996_GPIO_1, 0xa101 }, + { WM8996_GPIO_2, 0xa101 }, + { WM8996_GPIO_3, 0xa101 }, + { WM8996_GPIO_4, 0xa101 }, + { WM8996_GPIO_5, 0xa101 }, + { WM8996_PULL_CONTROL_1, 0x0 }, + { WM8996_PULL_CONTROL_2, 0x140 }, + { WM8996_INTERRUPT_STATUS_1_MASK, 0x1f }, + { WM8996_INTERRUPT_STATUS_2_MASK, 0x1ecf }, + { WM8996_LEFT_PDM_SPEAKER, 0x0 }, + { WM8996_RIGHT_PDM_SPEAKER, 0x1 }, + { WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 0x69 }, + { WM8996_PDM_SPEAKER_VOLUME, 0x66 }, + { WM8996_WRITE_SEQUENCER_0, 0x1 }, + { WM8996_WRITE_SEQUENCER_1, 0x1 }, + { WM8996_WRITE_SEQUENCER_3, 0x6 }, + { WM8996_WRITE_SEQUENCER_4, 0x40 }, + { WM8996_WRITE_SEQUENCER_5, 0x1 }, + { WM8996_WRITE_SEQUENCER_6, 0xf }, + { WM8996_WRITE_SEQUENCER_7, 0x6 }, + { WM8996_WRITE_SEQUENCER_8, 0x1 }, + { WM8996_WRITE_SEQUENCER_9, 0x3 }, + { WM8996_WRITE_SEQUENCER_10, 0x104 }, + { WM8996_WRITE_SEQUENCER_12, 0x60 }, + { WM8996_WRITE_SEQUENCER_13, 0x11 }, + { WM8996_WRITE_SEQUENCER_14, 0x401 }, + { WM8996_WRITE_SEQUENCER_16, 0x50 }, + { WM8996_WRITE_SEQUENCER_17, 0x3 }, + { WM8996_WRITE_SEQUENCER_18, 0x100 }, + { WM8996_WRITE_SEQUENCER_20, 0x51 }, + { WM8996_WRITE_SEQUENCER_21, 0x3 }, + { WM8996_WRITE_SEQUENCER_22, 0x104 }, + { WM8996_WRITE_SEQUENCER_23, 0xa }, + { WM8996_WRITE_SEQUENCER_24, 0x60 }, + { WM8996_WRITE_SEQUENCER_25, 0x3b }, + { WM8996_WRITE_SEQUENCER_26, 0x502 }, + { WM8996_WRITE_SEQUENCER_27, 0x100 }, + { WM8996_WRITE_SEQUENCER_28, 0x2fff }, + { WM8996_WRITE_SEQUENCER_32, 0x2fff }, + { WM8996_WRITE_SEQUENCER_36, 0x2fff }, + { WM8996_WRITE_SEQUENCER_40, 0x2fff }, + { WM8996_WRITE_SEQUENCER_44, 0x2fff }, + { WM8996_WRITE_SEQUENCER_48, 0x2fff }, + { WM8996_WRITE_SEQUENCER_52, 0x2fff }, + { WM8996_WRITE_SEQUENCER_56, 0x2fff }, + { WM8996_WRITE_SEQUENCER_60, 0x2fff }, + { WM8996_WRITE_SEQUENCER_64, 0x1 }, + { WM8996_WRITE_SEQUENCER_65, 0x1 }, + { WM8996_WRITE_SEQUENCER_67, 0x6 }, + { WM8996_WRITE_SEQUENCER_68, 0x40 }, + { WM8996_WRITE_SEQUENCER_69, 0x1 }, + { WM8996_WRITE_SEQUENCER_70, 0xf }, + { WM8996_WRITE_SEQUENCER_71, 0x6 }, + { WM8996_WRITE_SEQUENCER_72, 0x1 }, + { WM8996_WRITE_SEQUENCER_73, 0x3 }, + { WM8996_WRITE_SEQUENCER_74, 0x104 }, + { WM8996_WRITE_SEQUENCER_76, 0x60 }, + { WM8996_WRITE_SEQUENCER_77, 0x11 }, + { WM8996_WRITE_SEQUENCER_78, 0x401 }, + { WM8996_WRITE_SEQUENCER_80, 0x50 }, + { WM8996_WRITE_SEQUENCER_81, 0x3 }, + { WM8996_WRITE_SEQUENCER_82, 0x100 }, + { WM8996_WRITE_SEQUENCER_84, 0x60 }, + { WM8996_WRITE_SEQUENCER_85, 0x3b }, + { WM8996_WRITE_SEQUENCER_86, 0x502 }, + { WM8996_WRITE_SEQUENCER_87, 0x100 }, + { WM8996_WRITE_SEQUENCER_88, 0x2fff }, + { WM8996_WRITE_SEQUENCER_92, 0x2fff }, + { WM8996_WRITE_SEQUENCER_96, 0x2fff }, + { WM8996_WRITE_SEQUENCER_100, 0x2fff }, + { WM8996_WRITE_SEQUENCER_104, 0x2fff }, + { WM8996_WRITE_SEQUENCER_108, 0x2fff }, + { WM8996_WRITE_SEQUENCER_112, 0x2fff }, + { WM8996_WRITE_SEQUENCER_116, 0x2fff }, + { WM8996_WRITE_SEQUENCER_120, 0x2fff }, + { WM8996_WRITE_SEQUENCER_124, 0x2fff }, + { WM8996_WRITE_SEQUENCER_128, 0x1 }, + { WM8996_WRITE_SEQUENCER_129, 0x1 }, + { WM8996_WRITE_SEQUENCER_131, 0x6 }, + { WM8996_WRITE_SEQUENCER_132, 0x40 }, + { WM8996_WRITE_SEQUENCER_133, 0x1 }, + { WM8996_WRITE_SEQUENCER_134, 0xf }, + { WM8996_WRITE_SEQUENCER_135, 0x6 }, + { WM8996_WRITE_SEQUENCER_136, 0x1 }, + { WM8996_WRITE_SEQUENCER_137, 0x3 }, + { WM8996_WRITE_SEQUENCER_138, 0x106 }, + { WM8996_WRITE_SEQUENCER_140, 0x61 }, + { WM8996_WRITE_SEQUENCER_141, 0x11 }, + { WM8996_WRITE_SEQUENCER_142, 0x401 }, + { WM8996_WRITE_SEQUENCER_144, 0x50 }, + { WM8996_WRITE_SEQUENCER_145, 0x3 }, + { WM8996_WRITE_SEQUENCER_146, 0x102 }, + { WM8996_WRITE_SEQUENCER_148, 0x51 }, + { WM8996_WRITE_SEQUENCER_149, 0x3 }, + { WM8996_WRITE_SEQUENCER_150, 0x106 }, + { WM8996_WRITE_SEQUENCER_151, 0xa }, + { WM8996_WRITE_SEQUENCER_152, 0x61 }, + { WM8996_WRITE_SEQUENCER_153, 0x3b }, + { WM8996_WRITE_SEQUENCER_154, 0x502 }, + { WM8996_WRITE_SEQUENCER_155, 0x100 }, + { WM8996_WRITE_SEQUENCER_156, 0x2fff }, + { WM8996_WRITE_SEQUENCER_160, 0x2fff }, + { WM8996_WRITE_SEQUENCER_164, 0x2fff }, + { WM8996_WRITE_SEQUENCER_168, 0x2fff }, + { WM8996_WRITE_SEQUENCER_172, 0x2fff }, + { WM8996_WRITE_SEQUENCER_176, 0x2fff }, + { WM8996_WRITE_SEQUENCER_180, 0x2fff }, + { WM8996_WRITE_SEQUENCER_184, 0x2fff }, + { WM8996_WRITE_SEQUENCER_188, 0x2fff }, + { WM8996_WRITE_SEQUENCER_192, 0x1 }, + { WM8996_WRITE_SEQUENCER_193, 0x1 }, + { WM8996_WRITE_SEQUENCER_195, 0x6 }, + { WM8996_WRITE_SEQUENCER_196, 0x40 }, + { WM8996_WRITE_SEQUENCER_197, 0x1 }, + { WM8996_WRITE_SEQUENCER_198, 0xf }, + { WM8996_WRITE_SEQUENCER_199, 0x6 }, + { WM8996_WRITE_SEQUENCER_200, 0x1 }, + { WM8996_WRITE_SEQUENCER_201, 0x3 }, + { WM8996_WRITE_SEQUENCER_202, 0x106 }, + { WM8996_WRITE_SEQUENCER_204, 0x61 }, + { WM8996_WRITE_SEQUENCER_205, 0x11 }, + { WM8996_WRITE_SEQUENCER_206, 0x401 }, + { WM8996_WRITE_SEQUENCER_208, 0x50 }, + { WM8996_WRITE_SEQUENCER_209, 0x3 }, + { WM8996_WRITE_SEQUENCER_210, 0x102 }, + { WM8996_WRITE_SEQUENCER_212, 0x61 }, + { WM8996_WRITE_SEQUENCER_213, 0x3b }, + { WM8996_WRITE_SEQUENCER_214, 0x502 }, + { WM8996_WRITE_SEQUENCER_215, 0x100 }, + { WM8996_WRITE_SEQUENCER_216, 0x2fff }, + { WM8996_WRITE_SEQUENCER_220, 0x2fff }, + { WM8996_WRITE_SEQUENCER_224, 0x2fff }, + { WM8996_WRITE_SEQUENCER_228, 0x2fff }, + { WM8996_WRITE_SEQUENCER_232, 0x2fff }, + { WM8996_WRITE_SEQUENCER_236, 0x2fff }, + { WM8996_WRITE_SEQUENCER_240, 0x2fff }, + { WM8996_WRITE_SEQUENCER_244, 0x2fff }, + { WM8996_WRITE_SEQUENCER_248, 0x2fff }, + { WM8996_WRITE_SEQUENCER_252, 0x2fff }, + { WM8996_WRITE_SEQUENCER_256, 0x60 }, + { WM8996_WRITE_SEQUENCER_258, 0x601 }, + { WM8996_WRITE_SEQUENCER_260, 0x50 }, + { WM8996_WRITE_SEQUENCER_262, 0x100 }, + { WM8996_WRITE_SEQUENCER_264, 0x1 }, + { WM8996_WRITE_SEQUENCER_266, 0x104 }, + { WM8996_WRITE_SEQUENCER_267, 0x100 }, + { WM8996_WRITE_SEQUENCER_268, 0x2fff }, + { WM8996_WRITE_SEQUENCER_272, 0x2fff }, + { WM8996_WRITE_SEQUENCER_276, 0x2fff }, + { WM8996_WRITE_SEQUENCER_280, 0x2fff }, + { WM8996_WRITE_SEQUENCER_284, 0x2fff }, + { WM8996_WRITE_SEQUENCER_288, 0x2fff }, + { WM8996_WRITE_SEQUENCER_292, 0x2fff }, + { WM8996_WRITE_SEQUENCER_296, 0x2fff }, + { WM8996_WRITE_SEQUENCER_300, 0x2fff }, + { WM8996_WRITE_SEQUENCER_304, 0x2fff }, + { WM8996_WRITE_SEQUENCER_308, 0x2fff }, + { WM8996_WRITE_SEQUENCER_312, 0x2fff }, + { WM8996_WRITE_SEQUENCER_316, 0x2fff }, + { WM8996_WRITE_SEQUENCER_320, 0x61 }, + { WM8996_WRITE_SEQUENCER_322, 0x601 }, + { WM8996_WRITE_SEQUENCER_324, 0x50 }, + { WM8996_WRITE_SEQUENCER_326, 0x102 }, + { WM8996_WRITE_SEQUENCER_328, 0x1 }, + { WM8996_WRITE_SEQUENCER_330, 0x106 }, + { WM8996_WRITE_SEQUENCER_331, 0x100 }, + { WM8996_WRITE_SEQUENCER_332, 0x2fff }, + { WM8996_WRITE_SEQUENCER_336, 0x2fff }, + { WM8996_WRITE_SEQUENCER_340, 0x2fff }, + { WM8996_WRITE_SEQUENCER_344, 0x2fff }, + { WM8996_WRITE_SEQUENCER_348, 0x2fff }, + { WM8996_WRITE_SEQUENCER_352, 0x2fff }, + { WM8996_WRITE_SEQUENCER_356, 0x2fff }, + { WM8996_WRITE_SEQUENCER_360, 0x2fff }, + { WM8996_WRITE_SEQUENCER_364, 0x2fff }, + { WM8996_WRITE_SEQUENCER_368, 0x2fff }, + { WM8996_WRITE_SEQUENCER_372, 0x2fff }, + { WM8996_WRITE_SEQUENCER_376, 0x2fff }, + { WM8996_WRITE_SEQUENCER_380, 0x2fff }, + { WM8996_WRITE_SEQUENCER_384, 0x60 }, + { WM8996_WRITE_SEQUENCER_386, 0x601 }, + { WM8996_WRITE_SEQUENCER_388, 0x61 }, + { WM8996_WRITE_SEQUENCER_390, 0x601 }, + { WM8996_WRITE_SEQUENCER_392, 0x50 }, + { WM8996_WRITE_SEQUENCER_394, 0x300 }, + { WM8996_WRITE_SEQUENCER_396, 0x1 }, + { WM8996_WRITE_SEQUENCER_398, 0x304 }, + { WM8996_WRITE_SEQUENCER_400, 0x40 }, + { WM8996_WRITE_SEQUENCER_402, 0xf }, + { WM8996_WRITE_SEQUENCER_404, 0x1 }, + { WM8996_WRITE_SEQUENCER_407, 0x100 }, }; static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0); @@ -414,6 +483,7 @@ static const DECLARE_TLV_DB_SCALE(out_digital_tlv, -1200, 150, 0); static const DECLARE_TLV_DB_SCALE(out_tlv, -900, 75, 0); static const DECLARE_TLV_DB_SCALE(spk_tlv, -900, 150, 0); static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static const DECLARE_TLV_DB_SCALE(threedstereo_tlv, -1600, 183, 1); static const char *sidetone_hpf_text[] = { "2.9kHz", "1.5kHz", "735Hz", "403Hz", "196Hz", "98Hz", "49Hz" @@ -608,6 +678,14 @@ SOC_SINGLE("DAC High Performance Switch", WM8996_OVERSAMPLING, 0, 1, 0), SOC_SINGLE("DAC Soft Mute Switch", WM8996_DAC_SOFTMUTE, 1, 1, 0), SOC_SINGLE("DAC Slow Soft Mute Switch", WM8996_DAC_SOFTMUTE, 0, 1, 0), +SOC_SINGLE("DSP1 3D Stereo Switch", WM8996_DSP1_RX_FILTERS_2, 8, 1, 0), +SOC_SINGLE("DSP2 3D Stereo Switch", WM8996_DSP2_RX_FILTERS_2, 8, 1, 0), + +SOC_SINGLE_TLV("DSP1 3D Stereo Volume", WM8996_DSP1_RX_FILTERS_2, 10, 15, + 0, threedstereo_tlv), +SOC_SINGLE_TLV("DSP2 3D Stereo Volume", WM8996_DSP2_RX_FILTERS_2, 10, 15, + 0, threedstereo_tlv), + SOC_DOUBLE_TLV("Digital Output 1 Volume", WM8996_DAC1_HPOUT1_VOLUME, 0, 4, 8, 0, out_digital_tlv), SOC_DOUBLE_TLV("Digital Output 2 Volume", WM8996_DAC2_HPOUT2_VOLUME, 0, 4, @@ -632,6 +710,20 @@ SOC_DOUBLE_R("Speaker ZC Switch", WM8996_LEFT_PDM_SPEAKER, SOC_SINGLE("DSP1 EQ Switch", WM8996_DSP1_RX_EQ_GAINS_1, 0, 1, 0), SOC_SINGLE("DSP2 EQ Switch", WM8996_DSP2_RX_EQ_GAINS_1, 0, 1, 0), + +SOC_SINGLE("DSP1 DRC TXL Switch", WM8996_DSP1_DRC_1, 0, 1, 0), +SOC_SINGLE("DSP1 DRC TXR Switch", WM8996_DSP1_DRC_1, 1, 1, 0), +SOC_SINGLE("DSP1 DRC RX Switch", WM8996_DSP1_DRC_1, 2, 1, 0), +SND_SOC_BYTES_MASK("DSP1 DRC", WM8996_DSP1_DRC_1, 5, + WM8996_DSP1RX_DRC_ENA | WM8996_DSP1TXL_DRC_ENA | + WM8996_DSP1TXR_DRC_ENA), + +SOC_SINGLE("DSP2 DRC TXL Switch", WM8996_DSP2_DRC_1, 0, 1, 0), +SOC_SINGLE("DSP2 DRC TXR Switch", WM8996_DSP2_DRC_1, 1, 1, 0), +SOC_SINGLE("DSP2 DRC RX Switch", WM8996_DSP2_DRC_1, 2, 1, 0), +SND_SOC_BYTES_MASK("DSP2 DRC", WM8996_DSP2_DRC_1, 5, + WM8996_DSP2RX_DRC_ENA | WM8996_DSP2TXL_DRC_ENA | + WM8996_DSP2TXR_DRC_ENA), }; static const struct snd_kcontrol_new wm8996_eq_controls[] = { @@ -658,16 +750,61 @@ SOC_SINGLE_TLV("DSP2 EQ B5 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 6, 31, 0, eq_tlv), }; +static void wm8996_bg_enable(struct snd_soc_codec *codec) +{ + struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); + + wm8996->bg_ena++; + if (wm8996->bg_ena == 1) { + snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1, + WM8996_BG_ENA, WM8996_BG_ENA); + msleep(2); + } +} + +static void wm8996_bg_disable(struct snd_soc_codec *codec) +{ + struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); + + wm8996->bg_ena--; + if (!wm8996->bg_ena) + snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1, + WM8996_BG_ENA, 0); +} + +static int bg_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + int ret = 0; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + wm8996_bg_enable(codec); + break; + case SND_SOC_DAPM_POST_PMD: + wm8996_bg_disable(codec); + break; + default: + BUG(); + ret = -EINVAL; + } + + return ret; +} + static int cp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { + int ret = 0; + switch (event) { case SND_SOC_DAPM_POST_PMU: msleep(5); break; default: BUG(); - return -EINVAL; + ret = -EINVAL; } return 0; @@ -698,7 +835,7 @@ static void wait_for_dc_servo(struct snd_soc_codec *codec, u16 mask) { struct i2c_client *i2c = to_i2c_client(codec->dev); struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); - int i, ret; + int ret; unsigned long timeout = 200; snd_soc_write(codec, WM8996_DC_SERVO_2, mask); @@ -713,15 +850,12 @@ static void wait_for_dc_servo(struct snd_soc_codec *codec, u16 mask) } else { msleep(1); - if (--i) { - timeout = 0; - break; - } + timeout--; } ret = snd_soc_read(codec, WM8996_DC_SERVO_2); dev_dbg(codec->dev, "DC servo state: %x\n", ret); - } while (ret & mask); + } while (timeout && ret & mask); if (timeout == 0) dev_err(codec->dev, "DC servo timed out for %x\n", mask); @@ -756,8 +890,8 @@ static void wm8996_seq_notifier(struct snd_soc_dapm_context *dapm, val = 0; mask = 0; if (wm8996->hpout_pending & HPOUT1L) { - val |= WM8996_HPOUT1L_RMV_SHORT; - mask |= WM8996_HPOUT1L_RMV_SHORT; + val |= WM8996_HPOUT1L_RMV_SHORT | WM8996_HPOUT1L_OUTP; + mask |= WM8996_HPOUT1L_RMV_SHORT | WM8996_HPOUT1L_OUTP; } else { mask |= WM8996_HPOUT1L_RMV_SHORT | WM8996_HPOUT1L_OUTP | @@ -765,8 +899,8 @@ static void wm8996_seq_notifier(struct snd_soc_dapm_context *dapm, } if (wm8996->hpout_pending & HPOUT1R) { - val |= WM8996_HPOUT1R_RMV_SHORT; - mask |= WM8996_HPOUT1R_RMV_SHORT; + val |= WM8996_HPOUT1R_RMV_SHORT | WM8996_HPOUT1R_OUTP; + mask |= WM8996_HPOUT1R_RMV_SHORT | WM8996_HPOUT1R_OUTP; } else { mask |= WM8996_HPOUT1R_RMV_SHORT | WM8996_HPOUT1R_OUTP | @@ -778,8 +912,8 @@ static void wm8996_seq_notifier(struct snd_soc_dapm_context *dapm, val = 0; mask = 0; if (wm8996->hpout_pending & HPOUT2L) { - val |= WM8996_HPOUT2L_RMV_SHORT; - mask |= WM8996_HPOUT2L_RMV_SHORT; + val |= WM8996_HPOUT2L_RMV_SHORT | WM8996_HPOUT2L_OUTP; + mask |= WM8996_HPOUT2L_RMV_SHORT | WM8996_HPOUT2L_OUTP; } else { mask |= WM8996_HPOUT2L_RMV_SHORT | WM8996_HPOUT2L_OUTP | @@ -787,8 +921,8 @@ static void wm8996_seq_notifier(struct snd_soc_dapm_context *dapm, } if (wm8996->hpout_pending & HPOUT2R) { - val |= WM8996_HPOUT2R_RMV_SHORT; - mask |= WM8996_HPOUT2R_RMV_SHORT; + val |= WM8996_HPOUT2R_RMV_SHORT | WM8996_HPOUT2R_OUTP; + mask |= WM8996_HPOUT2R_RMV_SHORT | WM8996_HPOUT2R_OUTP; } else { mask |= WM8996_HPOUT2R_RMV_SHORT | WM8996_HPOUT2R_OUTP | @@ -975,13 +1109,17 @@ SND_SOC_DAPM_INPUT("IN2RP"), SND_SOC_DAPM_INPUT("DMIC1DAT"), SND_SOC_DAPM_INPUT("DMIC2DAT"), +SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20), SND_SOC_DAPM_SUPPLY_S("SYSCLK", 1, WM8996_AIF_CLOCKING_1, 0, 0, NULL, 0), SND_SOC_DAPM_SUPPLY_S("SYSDSPCLK", 2, WM8996_CLOCKING_1, 1, 0, NULL, 0), SND_SOC_DAPM_SUPPLY_S("AIFCLK", 2, WM8996_CLOCKING_1, 2, 0, NULL, 0), SND_SOC_DAPM_SUPPLY_S("Charge Pump", 2, WM8996_CHARGE_PUMP_1, 15, 0, cp_event, SND_SOC_DAPM_POST_PMU), - +SND_SOC_DAPM_SUPPLY("Bandgap", SND_SOC_NOPM, 0, 0, bg_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_SUPPLY("LDO2", WM8996_POWER_MANAGEMENT_2, 1, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICB1 Audio", WM8996_MICBIAS_1, 4, 1, NULL, 0), +SND_SOC_DAPM_SUPPLY("MICB2 Audio", WM8996_MICBIAS_2, 4, 1, NULL, 0), SND_SOC_DAPM_MICBIAS("MICB2", WM8996_POWER_MANAGEMENT_1, 9, 0), SND_SOC_DAPM_MICBIAS("MICB1", WM8996_POWER_MANAGEMENT_1, 8, 0), @@ -1035,41 +1173,25 @@ SND_SOC_DAPM_DAC("DAC2R", NULL, WM8996_POWER_MANAGEMENT_5, 2, 0), SND_SOC_DAPM_DAC("DAC1L", NULL, WM8996_POWER_MANAGEMENT_5, 1, 0), SND_SOC_DAPM_DAC("DAC1R", NULL, WM8996_POWER_MANAGEMENT_5, 0, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX1", "AIF2 Playback", 1, - WM8996_POWER_MANAGEMENT_4, 9, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX0", "AIF2 Playback", 2, - WM8996_POWER_MANAGEMENT_4, 8, 0), - -SND_SOC_DAPM_AIF_IN("AIF2TX1", "AIF2 Capture", 1, - WM8996_POWER_MANAGEMENT_6, 9, 0), -SND_SOC_DAPM_AIF_IN("AIF2TX0", "AIF2 Capture", 2, - WM8996_POWER_MANAGEMENT_6, 8, 0), - -SND_SOC_DAPM_AIF_IN("AIF1RX5", "AIF1 Playback", 5, - WM8996_POWER_MANAGEMENT_4, 5, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX4", "AIF1 Playback", 4, - WM8996_POWER_MANAGEMENT_4, 4, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX3", "AIF1 Playback", 3, - WM8996_POWER_MANAGEMENT_4, 3, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX2", "AIF1 Playback", 2, - WM8996_POWER_MANAGEMENT_4, 2, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX1", "AIF1 Playback", 1, - WM8996_POWER_MANAGEMENT_4, 1, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX0", "AIF1 Playback", 0, - WM8996_POWER_MANAGEMENT_4, 0, 0), - -SND_SOC_DAPM_AIF_OUT("AIF1TX5", "AIF1 Capture", 5, - WM8996_POWER_MANAGEMENT_6, 5, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX4", "AIF1 Capture", 4, - WM8996_POWER_MANAGEMENT_6, 4, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX3", "AIF1 Capture", 3, - WM8996_POWER_MANAGEMENT_6, 3, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX2", "AIF1 Capture", 2, - WM8996_POWER_MANAGEMENT_6, 2, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX1", "AIF1 Capture", 1, - WM8996_POWER_MANAGEMENT_6, 1, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX0", "AIF1 Capture", 0, - WM8996_POWER_MANAGEMENT_6, 0, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, WM8996_POWER_MANAGEMENT_4, 9, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX0", NULL, 1, WM8996_POWER_MANAGEMENT_4, 8, 0), + +SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, WM8996_POWER_MANAGEMENT_6, 9, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX0", NULL, 1, WM8996_POWER_MANAGEMENT_6, 8, 0), + +SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 5, WM8996_POWER_MANAGEMENT_4, 5, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 4, WM8996_POWER_MANAGEMENT_4, 4, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 3, WM8996_POWER_MANAGEMENT_4, 3, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 2, WM8996_POWER_MANAGEMENT_4, 2, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 1, WM8996_POWER_MANAGEMENT_4, 1, 0), +SND_SOC_DAPM_AIF_IN("AIF1RX0", NULL, 0, WM8996_POWER_MANAGEMENT_4, 0, 0), + +SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 5, WM8996_POWER_MANAGEMENT_6, 5, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 4, WM8996_POWER_MANAGEMENT_6, 4, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 3, WM8996_POWER_MANAGEMENT_6, 3, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 2, WM8996_POWER_MANAGEMENT_6, 2, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 1, WM8996_POWER_MANAGEMENT_6, 1, 0), +SND_SOC_DAPM_AIF_OUT("AIF1TX0", NULL, 0, WM8996_POWER_MANAGEMENT_6, 0, 0), /* We route as stereo pairs so define some dummy widgets to squash * things down for now. RXA = 0,1, RXB = 2,3 and so on */ @@ -1092,7 +1214,6 @@ SND_SOC_DAPM_PGA_S("HPOUT2L PGA", 0, WM8996_POWER_MANAGEMENT_1, 7, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT2L_DLY", 1, WM8996_ANALOGUE_HP_2, 5, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT2L_DCS", 2, WM8996_DC_SERVO_1, 2, 0, dcs_start, SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_S("HPOUT2L_OUTP", 3, WM8996_ANALOGUE_HP_2, 6, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT2L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2L, 0, rmv_short_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), @@ -1101,7 +1222,6 @@ SND_SOC_DAPM_PGA_S("HPOUT2R PGA", 0, WM8996_POWER_MANAGEMENT_1, 6, 0,NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT2R_DLY", 1, WM8996_ANALOGUE_HP_2, 1, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT2R_DCS", 2, WM8996_DC_SERVO_1, 3, 0, dcs_start, SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_S("HPOUT2R_OUTP", 3, WM8996_ANALOGUE_HP_2, 2, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT2R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2R, 0, rmv_short_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), @@ -1110,7 +1230,6 @@ SND_SOC_DAPM_PGA_S("HPOUT1L PGA", 0, WM8996_POWER_MANAGEMENT_1, 5, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT1L_DLY", 1, WM8996_ANALOGUE_HP_1, 5, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT1L_DCS", 2, WM8996_DC_SERVO_1, 0, 0, dcs_start, SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_S("HPOUT1L_OUTP", 3, WM8996_ANALOGUE_HP_1, 6, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT1L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1L, 0, rmv_short_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), @@ -1119,7 +1238,6 @@ SND_SOC_DAPM_PGA_S("HPOUT1R PGA", 0, WM8996_POWER_MANAGEMENT_1, 4, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT1R_DLY", 1, WM8996_ANALOGUE_HP_1, 1, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT1R_DCS", 2, WM8996_DC_SERVO_1, 1, 0, dcs_start, SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_S("HPOUT1R_OUTP", 3, WM8996_ANALOGUE_HP_1, 2, 0, NULL, 0), SND_SOC_DAPM_PGA_S("HPOUT1R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1R, 0, rmv_short_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), @@ -1135,19 +1253,46 @@ static const struct snd_soc_dapm_route wm8996_dapm_routes[] = { { "AIFCLK", NULL, "SYSCLK" }, { "SYSDSPCLK", NULL, "SYSCLK" }, { "Charge Pump", NULL, "SYSCLK" }, + { "Charge Pump", NULL, "CPVDD" }, { "MICB1", NULL, "LDO2" }, + { "MICB1", NULL, "MICB1 Audio" }, + { "MICB1", NULL, "Bandgap" }, { "MICB2", NULL, "LDO2" }, + { "MICB2", NULL, "MICB2 Audio" }, + { "MICB2", NULL, "Bandgap" }, + + { "AIF1RX0", NULL, "AIF1 Playback" }, + { "AIF1RX1", NULL, "AIF1 Playback" }, + { "AIF1RX2", NULL, "AIF1 Playback" }, + { "AIF1RX3", NULL, "AIF1 Playback" }, + { "AIF1RX4", NULL, "AIF1 Playback" }, + { "AIF1RX5", NULL, "AIF1 Playback" }, + + { "AIF2RX0", NULL, "AIF2 Playback" }, + { "AIF2RX1", NULL, "AIF2 Playback" }, + + { "AIF1 Capture", NULL, "AIF1TX0" }, + { "AIF1 Capture", NULL, "AIF1TX1" }, + { "AIF1 Capture", NULL, "AIF1TX2" }, + { "AIF1 Capture", NULL, "AIF1TX3" }, + { "AIF1 Capture", NULL, "AIF1TX4" }, + { "AIF1 Capture", NULL, "AIF1TX5" }, + + { "AIF2 Capture", NULL, "AIF2TX0" }, + { "AIF2 Capture", NULL, "AIF2TX1" }, { "IN1L PGA", NULL, "IN2LN" }, { "IN1L PGA", NULL, "IN2LP" }, { "IN1L PGA", NULL, "IN1LN" }, { "IN1L PGA", NULL, "IN1LP" }, + { "IN1L PGA", NULL, "Bandgap" }, { "IN1R PGA", NULL, "IN2RN" }, { "IN1R PGA", NULL, "IN2RP" }, { "IN1R PGA", NULL, "IN1RN" }, { "IN1R PGA", NULL, "IN1RP" }, + { "IN1R PGA", NULL, "Bandgap" }, { "ADCL", NULL, "IN1L PGA" }, @@ -1281,32 +1426,32 @@ static const struct snd_soc_dapm_route wm8996_dapm_routes[] = { { "DAC2R", NULL, "DAC2R Mixer" }, { "HPOUT2L PGA", NULL, "Charge Pump" }, + { "HPOUT2L PGA", NULL, "Bandgap" }, { "HPOUT2L PGA", NULL, "DAC2L" }, { "HPOUT2L_DLY", NULL, "HPOUT2L PGA" }, { "HPOUT2L_DCS", NULL, "HPOUT2L_DLY" }, - { "HPOUT2L_OUTP", NULL, "HPOUT2L_DCS" }, - { "HPOUT2L_RMV_SHORT", NULL, "HPOUT2L_OUTP" }, + { "HPOUT2L_RMV_SHORT", NULL, "HPOUT2L_DCS" }, { "HPOUT2R PGA", NULL, "Charge Pump" }, + { "HPOUT2R PGA", NULL, "Bandgap" }, { "HPOUT2R PGA", NULL, "DAC2R" }, { "HPOUT2R_DLY", NULL, "HPOUT2R PGA" }, { "HPOUT2R_DCS", NULL, "HPOUT2R_DLY" }, - { "HPOUT2R_OUTP", NULL, "HPOUT2R_DCS" }, - { "HPOUT2R_RMV_SHORT", NULL, "HPOUT2R_OUTP" }, + { "HPOUT2R_RMV_SHORT", NULL, "HPOUT2R_DCS" }, { "HPOUT1L PGA", NULL, "Charge Pump" }, + { "HPOUT1L PGA", NULL, "Bandgap" }, { "HPOUT1L PGA", NULL, "DAC1L" }, { "HPOUT1L_DLY", NULL, "HPOUT1L PGA" }, { "HPOUT1L_DCS", NULL, "HPOUT1L_DLY" }, - { "HPOUT1L_OUTP", NULL, "HPOUT1L_DCS" }, - { "HPOUT1L_RMV_SHORT", NULL, "HPOUT1L_OUTP" }, + { "HPOUT1L_RMV_SHORT", NULL, "HPOUT1L_DCS" }, { "HPOUT1R PGA", NULL, "Charge Pump" }, + { "HPOUT1R PGA", NULL, "Bandgap" }, { "HPOUT1R PGA", NULL, "DAC1R" }, { "HPOUT1R_DLY", NULL, "HPOUT1R PGA" }, { "HPOUT1R_DCS", NULL, "HPOUT1R_DLY" }, - { "HPOUT1R_OUTP", NULL, "HPOUT1R_DCS" }, - { "HPOUT1R_RMV_SHORT", NULL, "HPOUT1R_OUTP" }, + { "HPOUT1R_RMV_SHORT", NULL, "HPOUT1R_DCS" }, { "HPOUT2L", NULL, "HPOUT2L_RMV_SHORT" }, { "HPOUT2R", NULL, "HPOUT2R_RMV_SHORT" }, @@ -1330,8 +1475,7 @@ static const struct snd_soc_dapm_route wm8996_dapm_routes[] = { { "SPKDAT", NULL, "SPKR PGA" }, }; -static int wm8996_readable_register(struct snd_soc_codec *codec, - unsigned int reg) +static bool wm8996_readable_register(struct device *dev, unsigned int reg) { /* Due to the sparseness of the register map the compiler * output from an explicit switch statement ends up being much @@ -1538,8 +1682,7 @@ static int wm8996_readable_register(struct snd_soc_codec *codec, } } -static int wm8996_volatile_register(struct snd_soc_codec *codec, - unsigned int reg) +static bool wm8996_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case WM8996_SOFTWARE_RESET: @@ -1563,9 +1706,16 @@ static int wm8996_volatile_register(struct snd_soc_codec *codec, } } -static int wm8996_reset(struct snd_soc_codec *codec) +static int wm8996_reset(struct wm8996_priv *wm8996) { - return snd_soc_write(codec, WM8996_SOFTWARE_RESET, 0x8915); + if (wm8996->pdata.ldo_ena > 0) { + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1); + return 0; + } else { + return regmap_write(wm8996->regmap, WM8996_SOFTWARE_RESET, + 0x8915); + } } static const int bclk_divs[] = { @@ -1620,14 +1770,7 @@ static int wm8996_set_bias_level(struct snd_soc_codec *codec, switch (level) { case SND_SOC_BIAS_ON: - break; - case SND_SOC_BIAS_PREPARE: - if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) { - snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1, - WM8996_BG_ENA, WM8996_BG_ENA); - msleep(2); - } break; case SND_SOC_BIAS_STANDBY: @@ -1647,16 +1790,13 @@ static int wm8996_set_bias_level(struct snd_soc_codec *codec, msleep(5); } - codec->cache_only = false; - snd_soc_cache_sync(codec); + regcache_cache_only(codec->control_data, false); + regcache_sync(codec->control_data); } - - snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1, - WM8996_BG_ENA, 0); break; case SND_SOC_BIAS_OFF: - codec->cache_only = true; + regcache_cache_only(codec->control_data, true); if (wm8996->pdata.ldo_ena >= 0) gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), @@ -1774,7 +1914,7 @@ static int wm8996_hw_params(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); - int bits, i, bclk_rate; + int bits, i, bclk_rate, best; int aifdata = 0; int lrclk = 0; int dsp = 0; @@ -1823,14 +1963,11 @@ static int wm8996_hw_params(struct snd_pcm_substream *substream, return bits; aifdata |= (bits << WM8996_AIF1TX_WL_SHIFT) | bits; + best = 0; for (i = 0; i < ARRAY_SIZE(dsp_divs); i++) { - if (dsp_divs[i] == params_rate(params)) - break; - } - if (i == ARRAY_SIZE(dsp_divs)) { - dev_err(codec->dev, "Unsupported sample rate %dHz\n", - params_rate(params)); - return -EINVAL; + if (abs(dsp_divs[i] - params_rate(params)) < + abs(dsp_divs[best] - params_rate(params))) + best = i; } dsp |= i << dsp_shift; @@ -1847,7 +1984,7 @@ static int wm8996_hw_params(struct snd_pcm_substream *substream, snd_soc_update_bits(codec, lrclk_reg, WM8996_AIF1RX_RATE_MASK, lrclk); snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_2, - WM8996_DSP1_DIV_SHIFT << dsp_shift, dsp); + WM8996_DSP1_DIV_MASK << dsp_shift, dsp); return 0; } @@ -1859,6 +1996,7 @@ static int wm8996_set_sysclk(struct snd_soc_dai *dai, struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); int lfclk = 0; int ratediv = 0; + int sync = WM8996_REG_SYNC; int src; int old; @@ -1889,12 +2027,16 @@ static int wm8996_set_sysclk(struct snd_soc_dai *dai, } switch (wm8996->sysclk) { + case 5644800: case 6144000: snd_soc_update_bits(codec, WM8996_AIF_RATE, WM8996_SYSCLK_RATE, 0); break; + case 22579200: case 24576000: ratediv = WM8996_SYSCLK_DIV; + wm8996->sysclk /= 2; + case 11289600: case 12288000: snd_soc_update_bits(codec, WM8996_AIF_RATE, WM8996_SYSCLK_RATE, WM8996_SYSCLK_RATE); @@ -1902,6 +2044,7 @@ static int wm8996_set_sysclk(struct snd_soc_dai *dai, case 32000: case 32768: lfclk = WM8996_LFCLK_ENA; + sync = 0; break; default: dev_warn(codec->dev, "Unsupported clock rate %dHz\n", @@ -1915,6 +2058,8 @@ static int wm8996_set_sysclk(struct snd_soc_dai *dai, WM8996_SYSCLK_SRC_MASK | WM8996_SYSCLK_DIV_MASK, src << WM8996_SYSCLK_SRC_SHIFT | ratediv); snd_soc_update_bits(codec, WM8996_CLOCKING_1, WM8996_LFCLK_ENA, lfclk); + snd_soc_update_bits(codec, WM8996_CONTROL_INTERFACE_1, + WM8996_REG_SYNC, sync); snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1, WM8996_SYSCLK_ENA, old); @@ -2041,7 +2186,7 @@ static int wm8996_set_fll(struct snd_soc_codec *codec, int fll_id, int source, struct i2c_client *i2c = to_i2c_client(codec->dev); struct _fll_div fll_div; unsigned long timeout; - int ret, reg; + int ret, reg, retry; /* Any change? */ if (source == wm8996->fll_src && Fref == wm8996->fll_fref && @@ -2057,6 +2202,8 @@ static int wm8996_set_fll(struct snd_soc_codec *codec, int fll_id, int source, snd_soc_update_bits(codec, WM8996_FLL_CONTROL_1, WM8996_FLL_ENA, 0); + wm8996_bg_disable(codec); + return 0; } @@ -2111,6 +2258,11 @@ static int wm8996_set_fll(struct snd_soc_codec *codec, int fll_id, int source, snd_soc_write(codec, WM8996_FLL_EFS_1, fll_div.lambda); + /* Enable the bandgap if it's not already enabled */ + ret = snd_soc_read(codec, WM8996_FLL_CONTROL_1); + if (!(ret & WM8996_FLL_ENA)) + wm8996_bg_enable(codec); + /* Clear any pending completions (eg, from failed startups) */ try_wait_for_completion(&wm8996->fll_lock); @@ -2128,17 +2280,29 @@ static int wm8996_set_fll(struct snd_soc_codec *codec, int fll_id, int source, else timeout = msecs_to_jiffies(2); - /* Allow substantially longer if we've actually got the IRQ */ + /* Allow substantially longer if we've actually got the IRQ, poll + * at a slightly higher rate if we don't. + */ if (i2c->irq) - timeout *= 1000; + timeout *= 10; + else + timeout /= 2; - ret = wait_for_completion_timeout(&wm8996->fll_lock, timeout); + for (retry = 0; retry < 10; retry++) { + ret = wait_for_completion_timeout(&wm8996->fll_lock, + timeout); + if (ret != 0) { + WARN_ON(!i2c->irq); + break; + } - if (ret == 0 && i2c->irq) { + ret = snd_soc_read(codec, WM8996_INTERRUPT_RAW_STATUS_2); + if (ret & WM8996_FLL_LOCK_STS) + break; + } + if (retry == 10) { dev_err(codec->dev, "Timed out waiting for FLL\n"); ret = -ETIMEDOUT; - } else { - ret = 0; } dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); @@ -2159,48 +2323,45 @@ static inline struct wm8996_priv *gpio_to_wm8996(struct gpio_chip *chip) static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); - struct snd_soc_codec *codec = wm8996->codec; - snd_soc_update_bits(codec, WM8996_GPIO_1 + offset, - WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT); + regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, + WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT); } static int wm8996_gpio_direction_out(struct gpio_chip *chip, unsigned offset, int value) { struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); - struct snd_soc_codec *codec = wm8996->codec; int val; val = (1 << WM8996_GP1_FN_SHIFT) | (!!value << WM8996_GP1_LVL_SHIFT); - return snd_soc_update_bits(codec, WM8996_GPIO_1 + offset, - WM8996_GP1_FN_MASK | WM8996_GP1_DIR | - WM8996_GP1_LVL, val); + return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, + WM8996_GP1_FN_MASK | WM8996_GP1_DIR | + WM8996_GP1_LVL, val); } static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset) { struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); - struct snd_soc_codec *codec = wm8996->codec; + unsigned int reg; int ret; - ret = snd_soc_read(codec, WM8996_GPIO_1 + offset); + ret = regmap_read(wm8996->regmap, WM8996_GPIO_1 + offset, ®); if (ret < 0) return ret; - return (ret & WM8996_GP1_LVL) != 0; + return (reg & WM8996_GP1_LVL) != 0; } static int wm8996_gpio_direction_in(struct gpio_chip *chip, unsigned offset) { struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); - struct snd_soc_codec *codec = wm8996->codec; - return snd_soc_update_bits(codec, WM8996_GPIO_1 + offset, - WM8996_GP1_FN_MASK | WM8996_GP1_DIR, - (1 << WM8996_GP1_FN_SHIFT) | - (1 << WM8996_GP1_DIR_SHIFT)); + return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, + WM8996_GP1_FN_MASK | WM8996_GP1_DIR, + (1 << WM8996_GP1_FN_SHIFT) | + (1 << WM8996_GP1_DIR_SHIFT)); } static struct gpio_chip wm8996_template_chip = { @@ -2213,14 +2374,13 @@ static struct gpio_chip wm8996_template_chip = { .can_sleep = 1, }; -static void wm8996_init_gpio(struct snd_soc_codec *codec) +static void wm8996_init_gpio(struct wm8996_priv *wm8996) { - struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); int ret; wm8996->gpio_chip = wm8996_template_chip; wm8996->gpio_chip.ngpio = 5; - wm8996->gpio_chip.dev = codec->dev; + wm8996->gpio_chip.dev = wm8996->dev; if (wm8996->pdata.gpio_base) wm8996->gpio_chip.base = wm8996->pdata.gpio_base; @@ -2229,24 +2389,23 @@ static void wm8996_init_gpio(struct snd_soc_codec *codec) ret = gpiochip_add(&wm8996->gpio_chip); if (ret != 0) - dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret); + dev_err(wm8996->dev, "Failed to add GPIOs: %d\n", ret); } -static void wm8996_free_gpio(struct snd_soc_codec *codec) +static void wm8996_free_gpio(struct wm8996_priv *wm8996) { - struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); int ret; ret = gpiochip_remove(&wm8996->gpio_chip); if (ret != 0) - dev_err(codec->dev, "Failed to remove GPIOs: %d\n", ret); + dev_err(wm8996->dev, "Failed to remove GPIOs: %d\n", ret); } #else -static void wm8996_init_gpio(struct snd_soc_codec *codec) +static void wm8996_init_gpio(struct wm8996_priv *wm8996) { } -static void wm8996_free_gpio(struct snd_soc_codec *codec) +static void wm8996_free_gpio(struct wm8996_priv *wm8996) { } #endif @@ -2270,6 +2429,7 @@ int wm8996_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, wm8996->jack = jack; wm8996->detecting = true; wm8996->polarity_cb = polarity_cb; + wm8996->jack_flips = 0; if (wm8996->polarity_cb) wm8996->polarity_cb(codec, 0); @@ -2297,12 +2457,107 @@ int wm8996_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, /* Enable interrupts and we're off */ snd_soc_update_bits(codec, WM8996_INTERRUPT_STATUS_2_MASK, - WM8996_IM_MICD_EINT, 0); + WM8996_IM_MICD_EINT | WM8996_HP_DONE_EINT, 0); return 0; } EXPORT_SYMBOL_GPL(wm8996_detect); +static void wm8996_hpdet_irq(struct snd_soc_codec *codec) +{ + struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); + int val, reg, report; + + /* Assume headphone in error conditions; we need to report + * something or we stall our state machine. + */ + report = SND_JACK_HEADPHONE; + + reg = snd_soc_read(codec, WM8996_HEADPHONE_DETECT_2); + if (reg < 0) { + dev_err(codec->dev, "Failed to read HPDET status\n"); + goto out; + } + + if (!(reg & WM8996_HP_DONE)) { + dev_err(codec->dev, "Got HPDET IRQ but HPDET is busy\n"); + goto out; + } + + val = reg & WM8996_HP_LVL_MASK; + + dev_dbg(codec->dev, "HPDET measured %d ohms\n", val); + + /* If we've got high enough impedence then report as line, + * otherwise assume headphone. + */ + if (val >= 126) + report = SND_JACK_LINEOUT; + else + report = SND_JACK_HEADPHONE; + +out: + if (wm8996->jack_mic) + report |= SND_JACK_MICROPHONE; + + snd_soc_jack_report(wm8996->jack, report, + SND_JACK_LINEOUT | SND_JACK_HEADSET); + + wm8996->detecting = false; + + /* If the output isn't running re-clamp it */ + if (!(snd_soc_read(codec, WM8996_POWER_MANAGEMENT_1) & + (WM8996_HPOUT1L_ENA | WM8996_HPOUT1R_RMV_SHORT))) + snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, + WM8996_HPOUT1L_RMV_SHORT | + WM8996_HPOUT1R_RMV_SHORT, 0); + + /* Go back to looking at the microphone */ + snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_1, + WM8996_JD_MODE_MASK, 0); + snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, WM8996_MICD_ENA, + WM8996_MICD_ENA); + + snd_soc_dapm_disable_pin(&codec->dapm, "Bandgap"); + snd_soc_dapm_sync(&codec->dapm); +} + +static void wm8996_hpdet_start(struct snd_soc_codec *codec) +{ + /* Unclamp the output, we can't measure while we're shorting it */ + snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, + WM8996_HPOUT1L_RMV_SHORT | + WM8996_HPOUT1R_RMV_SHORT, + WM8996_HPOUT1L_RMV_SHORT | + WM8996_HPOUT1R_RMV_SHORT); + + /* We need bandgap for HPDET */ + snd_soc_dapm_force_enable_pin(&codec->dapm, "Bandgap"); + snd_soc_dapm_sync(&codec->dapm); + + /* Go into headphone detect left mode */ + snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, WM8996_MICD_ENA, 0); + snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_1, + WM8996_JD_MODE_MASK, 1); + + /* Trigger a measurement */ + snd_soc_update_bits(codec, WM8996_HEADPHONE_DETECT_1, + WM8996_HP_POLL, WM8996_HP_POLL); +} + +static void wm8996_report_headphone(struct snd_soc_codec *codec) +{ + dev_dbg(codec->dev, "Headphone detected\n"); + wm8996_hpdet_start(codec); + + /* Increase the detection rate a bit for responsiveness. */ + snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, + WM8996_MICD_RATE_MASK | + WM8996_MICD_BIAS_STARTTIME_MASK, + 7 << WM8996_MICD_RATE_SHIFT | + 7 << WM8996_MICD_BIAS_STARTTIME_SHIFT); +} + static void wm8996_micd(struct snd_soc_codec *codec) { struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); @@ -2322,37 +2577,58 @@ static void wm8996_micd(struct snd_soc_codec *codec) dev_dbg(codec->dev, "Jack removal detected\n"); wm8996->jack_mic = false; wm8996->detecting = true; + wm8996->jack_flips = 0; snd_soc_jack_report(wm8996->jack, 0, - SND_JACK_HEADSET | SND_JACK_BTN_0); + SND_JACK_LINEOUT | SND_JACK_HEADSET | + SND_JACK_BTN_0); + snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, - WM8996_MICD_RATE_MASK, - WM8996_MICD_RATE_MASK); + WM8996_MICD_RATE_MASK | + WM8996_MICD_BIAS_STARTTIME_MASK, + WM8996_MICD_RATE_MASK | + 9 << WM8996_MICD_BIAS_STARTTIME_SHIFT); return; } - /* If the measurement is very high we've got a microphone but - * do a little debounce to account for mechanical issues. + /* If the measurement is very high we've got a microphone, + * either we just detected one or if we already reported then + * we've got a button release event. */ if (val & 0x400) { - dev_dbg(codec->dev, "Microphone detected\n"); - snd_soc_jack_report(wm8996->jack, SND_JACK_HEADSET, - SND_JACK_HEADSET | SND_JACK_BTN_0); - wm8996->jack_mic = true; - wm8996->detecting = false; - - /* Increase poll rate to give better responsiveness - * for buttons */ - snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, - WM8996_MICD_RATE_MASK, - 5 << WM8996_MICD_RATE_SHIFT); + if (wm8996->detecting) { + dev_dbg(codec->dev, "Microphone detected\n"); + wm8996->jack_mic = true; + wm8996_hpdet_start(codec); + + /* Increase poll rate to give better responsiveness + * for buttons */ + snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, + WM8996_MICD_RATE_MASK | + WM8996_MICD_BIAS_STARTTIME_MASK, + 5 << WM8996_MICD_RATE_SHIFT | + 7 << WM8996_MICD_BIAS_STARTTIME_SHIFT); + } else { + dev_dbg(codec->dev, "Mic button up\n"); + snd_soc_jack_report(wm8996->jack, 0, SND_JACK_BTN_0); + } + + return; } /* If we detected a lower impedence during initial startup * then we probably have the wrong polarity, flip it. Don't * do this for the lowest impedences to speed up detection of - * plain headphones. + * plain headphones. If both polarities report a low + * impedence then give up and report headphones. */ if (wm8996->detecting && (val & 0x3f0)) { + wm8996->jack_flips++; + + if (wm8996->jack_flips > 1) { + wm8996_report_headphone(codec); + return; + } + reg = snd_soc_read(codec, WM8996_ACCESSORY_DETECT_MODE_2); reg ^= WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC | WM8996_MICD_BIAS_SRC; @@ -2376,24 +2652,10 @@ static void wm8996_micd(struct snd_soc_codec *codec) if (val & 0x3fc) { if (wm8996->jack_mic) { dev_dbg(codec->dev, "Mic button detected\n"); - snd_soc_jack_report(wm8996->jack, - SND_JACK_HEADSET | SND_JACK_BTN_0, - SND_JACK_HEADSET | SND_JACK_BTN_0); - } else { - dev_dbg(codec->dev, "Headphone detected\n"); - snd_soc_jack_report(wm8996->jack, - SND_JACK_HEADPHONE, - SND_JACK_HEADSET | + snd_soc_jack_report(wm8996->jack, SND_JACK_BTN_0, SND_JACK_BTN_0); - - /* Increase the detection rate a bit for - * responsiveness. - */ - snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, - WM8996_MICD_RATE_MASK, - 7 << WM8996_MICD_RATE_SHIFT); - - wm8996->detecting = false; + } else if (wm8996->detecting) { + wm8996_report_headphone(codec); } } } @@ -2412,6 +2674,9 @@ static irqreturn_t wm8996_irq(int irq, void *data) } irq_val &= ~snd_soc_read(codec, WM8996_INTERRUPT_STATUS_2_MASK); + if (!irq_val) + return IRQ_NONE; + snd_soc_write(codec, WM8996_INTERRUPT_STATUS_2, irq_val); if (irq_val & (WM8996_DCS_DONE_01_EINT | WM8996_DCS_DONE_23_EINT)) { @@ -2430,10 +2695,10 @@ static irqreturn_t wm8996_irq(int irq, void *data) if (irq_val & WM8996_MICD_EINT) wm8996_micd(codec); - if (irq_val) - return IRQ_HANDLED; - else - return IRQ_NONE; + if (irq_val & WM8996_HP_DONE_EINT) + wm8996_hpdet_irq(codec); + + return IRQ_HANDLED; } static irqreturn_t wm8996_edge_irq(int irq, void *data) @@ -2507,18 +2772,29 @@ static void wm8996_retune_mobile_pdata(struct snd_soc_codec *codec) wm8996->retune_mobile_enum.max = wm8996->num_retune_mobile_texts; wm8996->retune_mobile_enum.texts = wm8996->retune_mobile_texts; - ret = snd_soc_add_controls(codec, controls, ARRAY_SIZE(controls)); + ret = snd_soc_add_codec_controls(codec, controls, ARRAY_SIZE(controls)); if (ret != 0) dev_err(codec->dev, "Failed to add ReTune Mobile controls: %d\n", ret); } +static const struct regmap_config wm8996_regmap = { + .reg_bits = 16, + .val_bits = 16, + + .max_register = WM8996_MAX_REGISTER, + .reg_defaults = wm8996_reg, + .num_reg_defaults = ARRAY_SIZE(wm8996_reg), + .volatile_reg = wm8996_volatile_register, + .readable_reg = wm8996_readable_register, + .cache_type = REGCACHE_RBTREE, +}; + static int wm8996_probe(struct snd_soc_codec *codec) { int ret; struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); struct i2c_client *i2c = to_i2c_client(codec->dev); - struct snd_soc_dapm_context *dapm = &codec->dapm; int i, irq_flags; wm8996->codec = codec; @@ -2526,29 +2802,17 @@ static int wm8996_probe(struct snd_soc_codec *codec) init_completion(&wm8996->dcs_done); init_completion(&wm8996->fll_lock); - dapm->idle_bias_off = true; - dapm->bias_level = SND_SOC_BIAS_OFF; + codec->control_data = wm8996->regmap; - ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_I2C); + ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP); if (ret != 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); goto err; } - for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) - wm8996->supplies[i].supply = wm8996_supply_names[i]; - - ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8996->supplies), - wm8996->supplies); - if (ret != 0) { - dev_err(codec->dev, "Failed to request supplies: %d\n", ret); - goto err; - } - wm8996->disable_nb[0].notifier_call = wm8996_regulator_event_0; wm8996->disable_nb[1].notifier_call = wm8996_regulator_event_1; wm8996->disable_nb[2].notifier_call = wm8996_regulator_event_2; - wm8996->disable_nb[3].notifier_call = wm8996_regulator_event_3; /* This should really be moved into the regulator core */ for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) { @@ -2561,50 +2825,7 @@ static int wm8996_probe(struct snd_soc_codec *codec) } } - ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies), - wm8996->supplies); - if (ret != 0) { - dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); - goto err_get; - } - - if (wm8996->pdata.ldo_ena >= 0) { - gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1); - msleep(5); - } - - ret = snd_soc_read(codec, WM8996_SOFTWARE_RESET); - if (ret < 0) { - dev_err(codec->dev, "Failed to read ID register: %d\n", ret); - goto err_enable; - } - if (ret != 0x8915) { - dev_err(codec->dev, "Device is not a WM8996, ID %x\n", ret); - ret = -EINVAL; - goto err_enable; - } - - ret = snd_soc_read(codec, WM8996_CHIP_REVISION); - if (ret < 0) { - dev_err(codec->dev, "Failed to read device revision: %d\n", - ret); - goto err_enable; - } - - dev_info(codec->dev, "revision %c\n", - (ret & WM8996_CHIP_REV_MASK) + 'A'); - - if (wm8996->pdata.ldo_ena >= 0) { - gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); - } else { - ret = wm8996_reset(codec); - if (ret < 0) { - dev_err(codec->dev, "Failed to issue reset\n"); - goto err_enable; - } - } - - codec->cache_only = true; + regcache_cache_only(codec->control_data, true); /* Apply platform data settings */ snd_soc_update_bits(codec, WM8996_LINE_INPUT_CONTROL, @@ -2746,7 +2967,7 @@ static int wm8996_probe(struct snd_soc_codec *codec) if (wm8996->pdata.num_retune_mobile_cfgs) wm8996_retune_mobile_pdata(codec); else - snd_soc_add_controls(codec, wm8996_eq_controls, + snd_soc_add_codec_controls(codec, wm8996_eq_controls, ARRAY_SIZE(wm8996_eq_controls)); /* If the TX LRCLK pins are not in LRCLK mode configure the @@ -2762,10 +2983,6 @@ static int wm8996_probe(struct snd_soc_codec *codec) WM8996_AIF2TX_LRCLK_MODE, WM8996_AIF2TX_LRCLK_MODE); - regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); - - wm8996_init_gpio(codec); - if (i2c->irq) { if (wm8996->pdata.irq_flags) irq_flags = wm8996->pdata.irq_flags; @@ -2803,13 +3020,6 @@ static int wm8996_probe(struct snd_soc_codec *codec) return 0; -err_enable: - if (wm8996->pdata.ldo_ena >= 0) - gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); - - regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); -err_get: - regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); err: return ret; } @@ -2826,8 +3036,6 @@ static int wm8996_remove(struct snd_soc_codec *codec) if (i2c->irq) free_irq(i2c->irq, codec); - wm8996_free_gpio(codec); - for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) regulator_unregister_notifier(wm8996->supplies[i].consumer, &wm8996->disable_nb[i]); @@ -2840,13 +3048,8 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8996 = { .probe = wm8996_probe, .remove = wm8996_remove, .set_bias_level = wm8996_set_bias_level, + .idle_bias_off = true, .seq_notifier = wm8996_seq_notifier, - .reg_cache_size = WM8996_MAX_REGISTER + 1, - .reg_word_size = sizeof(u16), - .reg_cache_default = wm8996_reg, - .volatile_register = wm8996_volatile_register, - .readable_register = wm8996_readable_register, - .compress_type = SND_SOC_RBTREE_COMPRESSION, .controls = wm8996_snd_controls, .num_controls = ARRAY_SIZE(wm8996_snd_controls), .dapm_widgets = wm8996_dapm_widgets, @@ -2857,12 +3060,13 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8996 = { }; #define WM8996_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ - SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000) + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ + SNDRV_PCM_RATE_48000) #define WM8996_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\ SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE |\ SNDRV_PCM_FMTBIT_S32_LE) -static struct snd_soc_dai_ops wm8996_dai_ops = { +static const struct snd_soc_dai_ops wm8996_dai_ops = { .set_fmt = wm8996_set_fmt, .hw_params = wm8996_hw_params, .set_sysclk = wm8996_set_sysclk, @@ -2877,6 +3081,7 @@ static struct snd_soc_dai_driver wm8996_dai[] = { .channels_max = 6, .rates = WM8996_RATES, .formats = WM8996_FORMATS, + .sig_bits = 24, }, .capture = { .stream_name = "AIF1 Capture", @@ -2884,6 +3089,7 @@ static struct snd_soc_dai_driver wm8996_dai[] = { .channels_max = 6, .rates = WM8996_RATES, .formats = WM8996_FORMATS, + .sig_bits = 24, }, .ops = &wm8996_dai_ops, }, @@ -2895,6 +3101,7 @@ static struct snd_soc_dai_driver wm8996_dai[] = { .channels_max = 2, .rates = WM8996_RATES, .formats = WM8996_FORMATS, + .sig_bits = 24, }, .capture = { .stream_name = "AIF2 Capture", @@ -2902,6 +3109,7 @@ static struct snd_soc_dai_driver wm8996_dai[] = { .channels_max = 2, .rates = WM8996_RATES, .formats = WM8996_FORMATS, + .sig_bits = 24, }, .ops = &wm8996_dai_ops, }, @@ -2911,13 +3119,16 @@ static __devinit int wm8996_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct wm8996_priv *wm8996; - int ret; + int ret, i; + unsigned int reg; - wm8996 = kzalloc(sizeof(struct wm8996_priv), GFP_KERNEL); + wm8996 = devm_kzalloc(&i2c->dev, sizeof(struct wm8996_priv), + GFP_KERNEL); if (wm8996 == NULL) return -ENOMEM; i2c_set_clientdata(i2c, wm8996); + wm8996->dev = &i2c->dev; if (dev_get_platdata(&i2c->dev)) memcpy(&wm8996->pdata, dev_get_platdata(&i2c->dev), @@ -2933,19 +3144,86 @@ static __devinit int wm8996_i2c_probe(struct i2c_client *i2c, } } + for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) + wm8996->supplies[i].supply = wm8996_supply_names[i]; + + ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8996->supplies), + wm8996->supplies); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); + goto err_gpio; + } + + ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies), + wm8996->supplies); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); + goto err_gpio; + } + + if (wm8996->pdata.ldo_ena > 0) { + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1); + msleep(5); + } + + wm8996->regmap = regmap_init_i2c(i2c, &wm8996_regmap); + if (IS_ERR(wm8996->regmap)) { + ret = PTR_ERR(wm8996->regmap); + dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); + goto err_enable; + } + + ret = regmap_read(wm8996->regmap, WM8996_SOFTWARE_RESET, ®); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret); + goto err_regmap; + } + if (reg != 0x8915) { + dev_err(&i2c->dev, "Device is not a WM8996, ID %x\n", reg); + ret = -EINVAL; + goto err_regmap; + } + + ret = regmap_read(wm8996->regmap, WM8996_CHIP_REVISION, ®); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read device revision: %d\n", + ret); + goto err_regmap; + } + + dev_info(&i2c->dev, "revision %c\n", + (reg & WM8996_CHIP_REV_MASK) + 'A'); + + regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); + + ret = wm8996_reset(wm8996); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to issue reset\n"); + goto err_regmap; + } + + wm8996_init_gpio(wm8996); + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8996, wm8996_dai, ARRAY_SIZE(wm8996_dai)); if (ret < 0) - goto err_gpio; + goto err_gpiolib; return ret; +err_gpiolib: + wm8996_free_gpio(wm8996); +err_regmap: + regmap_exit(wm8996->regmap); +err_enable: + if (wm8996->pdata.ldo_ena > 0) + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); + regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); err_gpio: if (wm8996->pdata.ldo_ena > 0) gpio_free(wm8996->pdata.ldo_ena); err: - kfree(wm8996); return ret; } @@ -2955,9 +3233,12 @@ static __devexit int wm8996_i2c_remove(struct i2c_client *client) struct wm8996_priv *wm8996 = i2c_get_clientdata(client); snd_soc_unregister_codec(&client->dev); - if (wm8996->pdata.ldo_ena > 0) + wm8996_free_gpio(wm8996); + regmap_exit(wm8996->regmap); + if (wm8996->pdata.ldo_ena > 0) { + gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); gpio_free(wm8996->pdata.ldo_ena); - kfree(i2c_get_clientdata(client)); + } return 0; } @@ -2977,25 +3258,7 @@ static struct i2c_driver wm8996_i2c_driver = { .id_table = wm8996_i2c_id, }; -static int __init wm8996_modinit(void) -{ - int ret; - - ret = i2c_add_driver(&wm8996_i2c_driver); - if (ret != 0) { - printk(KERN_ERR "Failed to register WM8996 I2C driver: %d\n", - ret); - } - - return ret; -} -module_init(wm8996_modinit); - -static void __exit wm8996_exit(void) -{ - i2c_del_driver(&wm8996_i2c_driver); -} -module_exit(wm8996_exit); +module_i2c_driver(wm8996_i2c_driver); MODULE_DESCRIPTION("ASoC WM8996 driver"); MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); |