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On LDK there is no .kl file refered for keyboard.
In code_tab_102us array corrected the Virtual code for Escape Key.
From linux/input.h key 1 is KEY_ESC and not KEY_BACK
Verified on LDK with firefox.
Bug 684439
Change-Id: If52980f8c405ab96036778e9c3615ca76626c451
Reviewed-on: http://git-master/r/1914
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Turn on CONFIG_HIGHMEM and dependencies CONFIG_BOUNCE=y
After that the system could show right memory size.
Bug 684903
Change-Id: Ifcc39523baf21beef6a29e6992db1ad058fa40d2
Reviewed-on: http://git-master/r/1691
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Wei Ni <wni@nvidia.com>
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It is require to use the hw based CS to meet the timing requirement as:
- Minimum CS setup time i.e. time from CS active to first clock.
- Maximum CS hold time i.e. CS should be active after last clock.
SW based CS can support the above 1 but not 2 because it dpeneds on os
load and system performance. To meet the above requirements, it is
require to enable the hw based CS.
As spi controller support for the hw based CS for the smaller number
of packet, enabling this feature.
Driver use the sw based CS by default. If client want to use the hw
based CS, then it need to enable this through nvodm query
NvOdmQuerySpiDeviceInfo table for different CS.
For this, client need to set device info as
CanUseHwBasedCs = TRUE,
CsSetupTimeInClock = xx
CsHoldTimeInClock = xx
Tested on whistler.
Change-Id: I4ca799178f032a03ef5c462845db26b0db935d02
Reviewed-on: http://git-master/r/1402
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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SDIO-WIFI Behavior -
1) With or without MMC_UNSAFE_RESUME setting -
As "sdio_driver" in mmc stack doesn't have suspend/resume handlers
so even if MMC_UNSAFE_RESUME is set, SDIO-WIFI driver's remove/probe
is called for mmc suspend/resume.
Thus, on suspend (LP1 or LP0) wifi is turned off and is disconnected.
On resume (from LP1 or LP0), wifi is turned on and is reconnected.
2) For all cards including sdio, power to rail is cut.
On suspend for sdio slot NvOdmSdioSuspend() is called.
On resume for sdio slot NvOdmSdioResume() is called.
Change-Id: I52e65b08a884a16f47cf5b1e4fcbb187ea4281e6
Reviewed-on: http://git-master/r/1776
Reviewed-by: Kapil Hali <khali@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Rahul Bansal <rbansal@nvidia.com>
Tested-by: Rahul Bansal <rbansal@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Warnings like:
assignment from incompatible poiner type
initialization from incompatible poiner type
Bug 682070
Change-Id: Ia79b13a5a46ca884d333a971cff167da8cd89c40
Reviewed-on: http://git-master/r/1903
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Supports CBC & ECB encryption/decryption, AnsiX9.31 RNG, SSK/SBK/User Key,
fine-grain uid/gid access control and ability for privileged user to reset
the engine. A device driver (/dev/nvaes) is provided to enable access from
user-land.
Change-Id: I7b8db8872bd71a777e3ad4600fb2f4a10c9d6b03
Reviewed-on: http://git-master/r/1687
Reviewed-by: Gary King <gking@nvidia.com>
Reviewed-by: Phillip Smith <psmith@nvidia.com>
Reviewed-by: David Le Tacon <dletacon@nvidia.com>
Tested-by: David Le Tacon <dletacon@nvidia.com>
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The users can config hw sample rate setting via sysfs
with command: echo frequency=VALUE>tegra_acclerometer.
The driver is currently not implement yet NvOdmAccelSetSampleRate
and NvOdmAccelGetSampleRate, updating these two routines
to able to change hw sample rate via sysfs.
The interrupt method is not reliable and polling method
is recommended for sending the orientation changes, so
updating driver to use polling method. The sw polling time
is indicated how fast sw get samples and it can be optimized
depends on client application. It is calculated
based on hw sample rate as below:
PollingTime = (1000ms * POLLING_FACTOR)/frequency.
POLLING_FACTOR is currently set to 225.
Change-Id: Id715971f8f139a960128e65a6bc84519dd1b05a9
Reviewed-on: http://git-master/r/1349
Tested-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Bug 631330
Bug 690351
Bug 690993
Tested on Ap20/Harmony.
Change-Id: Id29c5fc8f5078ad4cb3aa1e43d0440c21ddd1a96
Reviewed-on: http://git-master/r/1725
Reviewed-by: Janne Hellsten <jhellsten@nvidia.com>
Tested-by: Janne Hellsten <jhellsten@nvidia.com>
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Reverting the multi touch config changes as this is breaking
the music app.
Change-Id: I643c119012e8a9f11a09b991802563145887dcb9
Reviewed-on: http://git-master/r/1868
Tested-by: Jitendra Aditya Lanka <jlanka@nvidia.com>
Reviewed-by: Janne Hellsten <jhellsten@nvidia.com>
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In the multplexed pinmux option, it is require to unconfigure the
current configured pinmux and need to move the pingroup to safe option.
The function NvRmPinMuxConfigSelect() was not handling properly the
request for selecting the multiplexed pinmux option.
It is fixed now.
Tested on harmony.
Change-Id: If8f2585f4a499b89f72fd13c735ce8eb67e657c4
Reviewed-on: http://git-master/r/1717
Reviewed-by: Youngjin Kim <nkim@nvidia.com>
Tested-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Expanded CPU power off (LP2 state) policies as follows:
(a) "Enter in Low Corner" - LP2 is entered and DVFS tick interrupt is
masked only when DVFS is in low corner.
(b) "Mask in Low Corner" - LP2 is entered independently of DVFS, but DVFS
tick interrupt is masked only when low corner is hit
(c) "Ignore Low Corner" - LP2 is entered and DVFS tick interrupt is masked
independently of DVFS low corner.
Set default policy to (a), which is the same as current kernel behavior.
Thus, no immediate changes in power or performance numbers is expected.
Added sysfs node to change and evaluate new policies.
Change-Id: I7c52e87daa5128976337220422d79924a16e442e
Reviewed-on: http://git-master/r/1660
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Adding the gpio based keyboard driver support for the E1206 based platform.
The gpio-key driver will get the platform data from odm. The odm will return
gpio pin group information for E1206 based platfrom otherwise return NULL.
The gpio pin information is converted to platform data which will be used by
the gpio key driver.
Tested on harmony and E1206 based board. The keys are working fine in E1206
based platform.
Change-Id: I5d8d0949a45155c56f10afbe258d5b329a0fb1ce
Reviewed-on: http://git-master/r/1536
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Jitendra Aditya Lanka <jlanka@nvidia.com>
Tested-by: Jitendra Aditya Lanka <jlanka@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Enabled accelerometer configuration in harmony config file.
Enabled accelerometer driver for E1206 platform.
On Harmony, accelerometer driver open will return failure.
Tested on: Harmony and E1206
Change-Id: Icd9676e684daae7e2c4dad475e171d5e1957f133
Reviewed-on: http://git-master/r/1483
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Added support for wake event delay, and CPU power off time controls.
Exposed the respective settings as ODM PMU properties (bug 690326).
Change-Id: I8a544546e8d65f3006bae2dfa4cebe8858610dd3
Reviewed-on: http://git-master/r/1568
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Bug 682070
Change-Id: Ieff4ca65dc7034786ddfe0657585d66957bc7f3d
Reviewed-on: http://git-master/r/1577
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Flushing the memory write buffer to the physical memory before
starting the dma. This will make sure that dma will read the
desired from memory after memory gets written otherwise there
may be race condition between dma read from memory and actual
data write into memory.
Tested on whistler.
bug 685253
Change-Id: I5387588f4ed15fe9c62bfff2cc236e91ba092b5d
Reviewed-on: http://git-master/r/1590
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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The USB device connected to USB1(OTG) port was not getting detected at
boot time. Reason being that on phy power down (host mode), there was
some delay in VBUS getting disabled. Because of this the OTG state was
getting set to "peripheral" instead of "host".
Fixed this by waiting for VBUS to be disabled in phy power down with a
max wait time of phy hardware time out (1 sec).
Change-Id: I66c82fe33228734dddba325a203ed54347993b1d
Bug: 682618
Reviewed-on: http://git-master/r/1541
Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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This reverts partially the commit 46d2a32 "nvmap: tighten handle validation
before pinning".
It appears that we still need to allow pinning handles without local
context (bug 691715). This can be reverted when the root cause gets fixed.
Change-Id: I44cbd97f096d1319c6ea82c0d40030506547fd6c
Reviewed-on: http://git-master/r/1632
Reviewed-by: Patrick Shehane <pshehane@nvidia.com>
Tested-by: Patrick Shehane <pshehane@nvidia.com>
Reviewed-by: Antti Hatala <ahatala@nvidia.com>
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into merge-9.12.11
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Replaced final LP2 entry procedure: "Power gate CPU, then sit in WFI
loop" with the new one: "Wait-for-WFE, then power gate CPU". The latter
guarantees clean (no DRAM access) CPU power down. Fix for bug 682246.
Change-Id: I1cf5e0e2b4cea0c20d942c3f642e23ba743fc35a
Reviewed-on: http://git-master/r/1619
Tested-by: Amit Kamath <akamath@nvidia.com>
Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Change-Id: I554aeb9d555f411b94f18c0c1c6e574a90a0ab23
Reviewed-on: http://git-master/r/1491
Reviewed-by: Stephen Holmes <sholmes@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Manjula Gupta <magupta@nvidia.com>
Reviewed-by: Jeff Weintraub <jweintraub@nvidia.com>
Tested-by: Stephen Holmes <sholmes@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Adding apis for following function to hooking up tegra serial driver with
bluesleep power management:
- Clock off.
- Clock on.
- Setting flow control to desired state.
- Checking for tx fifo status.
Following 4 state machine is developed to achieve this:
UART_CLOSED, UART_OPENED, UART_SUSPEND, UART_CLOCK_OFF.
The transitions of state machines are as follows:
UART_CLOSED: the init state on which resource is allocated but not
opened by client or device is closed.
UART_OPENED: Able to do data transfer.
CLOSED to OPENED by opening the port.
CLOCK_OFF to OPENED by calling function tegra_uart_request_clock_on().
SUSPEND to OPENED by calling resume().
UART_CLOCK_OFF: The controller clock is disabled and so no data transfer
can happen. At this state, controller is not ready for deep power down.
OPENED to CLOCK_OFF by calling tegra_uart_request_clock_off().
Can not go to this state from CLOSED and SUSPEND.
UART_SUSPEND: The controller is in suspended state and ready for deep power down.
UART_CLOCK_OFF to SUSPEND:
OPENED to SUSPEND.
Tested in whistler.
Change-Id: I24461ac6f20f61e44b49332cdc6b93a01f605fc9
Reviewed-on: http://git-master/r/1377
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Enable the config level changes required for multi touch to work
on tegra-E1206.
Update the odm touch driver to enable multi touch events.
Change-Id: I9d8a664d251992a864bd3da8777ce50eb37baab0
Reviewed-on: http://git-master/r/1532
Tested-by: Jitendra Aditya Lanka <jlanka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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The E1206 based platform does not support the EC keyboard and EC mouse.
Returning fail in the initialization of the EC keyboard and mouse driver init.
Tested that it worked properly on Harmony and do not get enabled in E1206 based
platform.
Change-Id: Ib487715cda3d82d8c1fff8d5b34a572e0d81fbe7
Reviewed-on: http://git-master/r/1479
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Jitendra Aditya Lanka <jlanka@nvidia.com>
Tested-by: Jitendra Aditya Lanka <jlanka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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DSI one shot support requires register access in the tegra framebuffer to
poke the frame trigger bit (with both the trigger bit and the tearing effect
signal are high, a frame of pixels will be sent to the panel). The boot args
must also be expanded to have a "use tearing effect" flag.
Change-Id: Id0c3960cac5b59dd23fd6547f1b7dae4d422ac32
Reviewed-on: http://git-master/r/1460
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Arthur Spence <aspence@nvidia.com>
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Adding the support for the SPI4 as the apb dma requestor.
Tested on whistler with spi unit testcase, on harmony with playback.
Change-Id: Ib16dcb8f9eaec47d7b27026e2c2e576373df7e6a
Reviewed-on: http://git-master/r/1374
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Change-Id: I453606faa4edb4668a351dea8303ba83910923d1
Reviewed-on: http://git-master/r/1465
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: Ic018767fff54472f97ab74ab71988ab3cdf5b981
Reviewed-on: http://git-master/r/1426
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Daehyoung Ko <dko@nvidia.com>
Tested-by: Daehyoung Ko <dko@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Rainbow 570 modem requires power on pulse more than a second. This change
increases the power on plus time and correct the DAP connection table for
Rainbow 570. The Rainbow1 modem also works after the pulse time change.
Bug 640843
Change-Id: I194c9d84a9a10bbb3bc3e14eea53f18a9a54ed6a
Reviewed-on: http://git-master/r/1431
Tested-by: Szming Lin <stlin@nvidia.com>
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Do not allow pinning handles without local context anymore (this was a
special case and is not needed anymore). Also, added check for handle poison
before pinning. This prevents kernel panic (BUG_ON in
_nvmap_handle_pin_locked) when trying to pin already freed handle.
Change-Id: Iabf408c182aa0907596957233169568abedbbb1f
Reviewed-on: http://git-master/r/1449
Reviewed-by: Antti Rasmus <arasmus@nvidia.com>
Tested-by: Anssi Kalliolahti <akalliolahti@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Bug 679959
Change-Id: Id541c2f51fe2e0cb2c4cbb08aafbcb53da251218
Reviewed-on: http://git-master/r/1468
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Bug 679959
Change-Id: Id541c2f51fe2e0cb2c4cbb08aafbcb53da251218
Reviewed-on: http://git-master/r/1468
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Bug 679959
Change-Id: I71324cc89b4e3031ecc94ee5c05ba6193bab6533
Reviewed-on: http://git-master/r/1463
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Enable Clock Over On bit for all three controllers during phy resume and disable
during the suspend. Added timeout for the phy clock wait loops.
Bug 679959
Tested on Ap20/Harmony.
Change-Id: I3219946e6351c8ddf5e036dfc3a3f2b3693e99a6
Reviewed-on: http://git-master/r/1455
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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_nvmap_handle_unpin needs to acquire the mru_vma_lock before decrementing
the pin count, to ensure that a decrement to zero and insertion on the
MRU VMA list appears atomic with respect to a second client calling
_nvmap_handle_pin on the same handle; otherwise, the two clients race
and the pin operation may trigger a BUG because the handle has a valid
IOVMM area but is not located on any MRU VMA list.
also, clean up some additional allocation-inside-spinlock issues;
release the MRU VMA lock before calling tegra_iovmm_create_vm, and
reacquire the lock after returning.
Change-Id: If3a32e493a9222eac56a0980c10c0d4281389e7e
Reviewed-on: http://git-master/r/1448
Tested-by: Antti Hatala <ahatala@nvidia.com>
Reviewed-by: Antti Hatala <ahatala@nvidia.com>
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Bug 687750
Fixed version mismatch error between prebuilt kernel modules
and locally built zImage files.
Change-Id: Ia7d2f08270eab00d94359e085e807d15cb43b86a
Reviewed-on: http://git-master/r/1446
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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UTMIP pads were turned off before the UTMI phy is set in to the suspend mode.
This is corrected by turning off the UTMIP power control pads after phy is
suspended.
Added workaround for ULPI to bring out of suspend by setting USB2_CLK_OVR_ON
bit in CLK_RST_CONTROLLER register.
Bug 679959
Tested on Ap20/Harmony with Lp0 suspend/resume tests.
Change-Id: I6519568f20c4cd859c198d82c2a3007305a61317
Reviewed-on: http://git-master/r/1413
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Occasionally, ungating the TD partition when exiting
LP0 causes the entire system to crash. This WAR
avoids this issue by keeping the TD partition always on.
Change-Id: I20e09b3014feb011f922e654e2fb6d28a956d693
Reviewed-on: http://git-master/r/1435
Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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the assignment to hDdkUsbPhy->IsHostMode was intentional; rewrite the
code to make this clearer
Change-Id: Ifc881397c240049b7c0a4300ae3267be397bfda5
Reviewed-on: http://git-master/r/1420
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Bug 679959
Change-Id: I71324cc89b4e3031ecc94ee5c05ba6193bab6533
Reviewed-on: http://git-master/r/1463
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Enable Clock Over On bit for all three controllers during phy resume and disable
during the suspend. Added timeout for the phy clock wait loops.
Bug 679959
Tested on Ap20/Harmony.
Change-Id: I3219946e6351c8ddf5e036dfc3a3f2b3693e99a6
Reviewed-on: http://git-master/r/1455
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Sometimes during the cache shutdown process,
USB interrupts causing cache maintainance ops are leading to
system crash. To avoid this, we disable interrupts before
cache shutdown and enable them afterwards.
Bug 673802 - Warm boot stress test failed on Harmony
Tested on: Harmony
Change-Id: Ieb9d9e92bbdd441b875844d8fa659b0795a09455
Reviewed-on: http://git-master/r/1438
Tested-by: Jitendra Aditya Lanka <jlanka@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Made sure that jiffies update duty is not stuck with off-line CPU: if this
situation is detected, re-assign the tick ownership respectively (should
fix bug 683277).
Replaced spin-locks in timer access code with local interrupt control:
local timers are "local", and do not need interprocessor protection.
Change-Id: Ib0d690d8558724f7da384aba8b5cdf3d5ea8fdbb
Reviewed-on: http://git-master/r/1415
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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_nvmap_handle_unpin needs to acquire the mru_vma_lock before decrementing
the pin count, to ensure that a decrement to zero and insertion on the
MRU VMA list appears atomic with respect to a second client calling
_nvmap_handle_pin on the same handle; otherwise, the two clients race
and the pin operation may trigger a BUG because the handle has a valid
IOVMM area but is not located on any MRU VMA list.
also, clean up some additional allocation-inside-spinlock issues;
release the MRU VMA lock before calling tegra_iovmm_create_vm, and
reacquire the lock after returning.
Change-Id: If3a32e493a9222eac56a0980c10c0d4281389e7e
Reviewed-on: http://git-master/r/1448
Tested-by: Antti Hatala <ahatala@nvidia.com>
Reviewed-by: Antti Hatala <ahatala@nvidia.com>
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Bug 687750
Fixed version mismatch error between prebuilt kernel modules
and locally built zImage files.
Change-Id: Ia7d2f08270eab00d94359e085e807d15cb43b86a
Reviewed-on: http://git-master/r/1446
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Adding support for USB-IF High Speed electrical test mode for device mode.
Support added for electrical test modes:
1. TEST_J
2. TEST_K
3. TEST_SE0_NAK
4. TEST_PACKET
5. TEST_FORCE_ENABLE
Bug 675483
Bug 649012
Tested on AP20/Whistler and AP20/Harmony with USB HS electrical test tool.
Change-Id: Iabb91e8a7fdda5eb4e95141390f4e9785a5a8a99
Reviewed-on: http://git-master/r/1345
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Tested-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Setting MMC_CAP_HIGHSPEED in host capabilites to detect
high speed eMMC cards, set high speed mode and configure
maximum supported clock frequency(52MHz).
Bug 687587: eMMC device is not detected as a high speed device.
Tested on: AP20 Android with boot from eMMC.
Change-Id: I664659aa9edad34518a0a74dee01534309de4af9
Reviewed-on: http://git-master/r/1421
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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UTMIP pads were turned off before the UTMI phy is set in to the suspend mode.
This is corrected by turning off the UTMIP power control pads after phy is
suspended.
Added workaround for ULPI to bring out of suspend by setting USB2_CLK_OVR_ON
bit in CLK_RST_CONTROLLER register.
Bug 679959
Tested on Ap20/Harmony with Lp0 suspend/resume tests.
Change-Id: I6519568f20c4cd859c198d82c2a3007305a61317
Reviewed-on: http://git-master/r/1413
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Change-Id: I3866ba5a1f13b50051b2c3a4424d80ccd39ce1ca
Reviewed-on: http://git-master/r/1440
Reviewed-by: Janne Hellsten <jhellsten@nvidia.com>
Tested-by: Janne Hellsten <jhellsten@nvidia.com>
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Occasionally, ungating the TD partition when exiting
LP0 causes the entire system to crash. This WAR
avoids this issue by keeping the TD partition always on.
Change-Id: I20e09b3014feb011f922e654e2fb6d28a956d693
Reviewed-on: http://git-master/r/1435
Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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