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In order to prepare to per-arch implementations of preempt_count move
the required bits into an asm-generic header and use this for all
archs.
(cherry picked from commit a787870924dbd6f321661e06d4ec1c7a408c9ccf)
Conflicts:
arch/c6x/include/asm/Kbuild
arch/cris/include/asm/Kbuild
arch/h8300/include/asm/Kbuild
arch/ia64/include/asm/Kbuild
arch/mips/include/asm/Kbuild
arch/openrisc/include/asm/Kbuild
arch/powerpc/include/asm/Kbuild
arch/score/include/asm/Kbuild
include/linux/preempt.h
Change-Id: I544914d3c23cc50da658296a34f9f2796854e259
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/n/tip-h5j0c1r3e3fk015m30h8f1zx@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
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Under arm64 elf_hwcap is a 32 bit quantity, but it is stored in
a 64 bit auxiliary ELF field and glibc reads hwcap as 64 bit.
This patch widens elf_hwcap to be 64 bit.
(cherry picked from commit 25804e6a96681d5d2142058948e218999e4f547c)
Change-Id: I4fd594b82ab12da3733a95a4882761320aa596d2
Signed-off-by: Steve Capper <steve.capper@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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This function is only called from arch/arm64/mm/fault.c.
(cherry picked from commit 59f67e16e6b79697241c3fd030e3da300377893e)
Change-Id: I7f139f99952934b68f7a7ecb878cdd3d5c0c7fa9
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Unlike global OOM handling, memory cgroup code will invoke the OOM killer
in any OOM situation because it has no way of telling faults occuring in
kernel context - which could be handled more gracefully - from
user-triggered faults.
Pass a flag that identifies faults originating in user space from the
architecture-specific fault handlers to generic code so that memcg OOM
handling can be improved.
(cherry picked from commit 759496ba6407c6994d6a5ce3a5e74937d7816208)
Conflicts:
arch/arc/mm/fault.c
Change-Id: I6ddf37c0feae69fcda0c2db76d2b10ca2a11c619
Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: azurIt <azurit@pobox.sk>
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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TCR.TBI0 can be used to cause hardware address translation to ignore the
top byte of userspace virtual addresses. Whilst not especially useful in
standard C programs, this can be used by JITs to `tag' pointers with
various pieces of metadata.
This patch enables this bit for AArch64 Linux, and adds a new file to
Documentation/arm64/ which describes some potential caveats when using
tagged virtual addresses.
(cherry picked from commit d50240a5f6ceaf690a77b0fccb17be51cfa151c2)
Conflicts:
Documentation/arm64/tagged-pointers.txt
Change-Id: I4366318cc1b049e8e9f642fc502e8d0b04e2ed24
Signed-off-by: Will Deacon <will.deacon@arm.com>
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(cherry picked from commit 909e3ee4119f87b85c6e1b8534b2287ed1ea3ca2)
Change-Id: I8c7d92a8b0a09fa187daf7d1b4878b92d68e3746
Signed-off-by: Dan Aloni <alonid@stratoscale.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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We always use a timer-backed delay loop for arm64, so don't bother
reporting a bogomips value which appears to confuse some people.
(cherry picked from commit 326b16db9f69fd0d279be873c6c00f88c0a4aad5)
Change-Id: I21b18f10bf43d32527cb96f6caf8c6a4c46960a6
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Most architectures use the same implementation. Collapse the common ones
into a single weak function that can be overridden.
(cherry picked from commit a1727da599ad030ccaf4073473fd235c8ee28219)
Change-Id: I5cfcac67b98407f8e4c4dcb89829f2a8e0d1b88b
Signed-off-by: Grant Likely <grant.likely@linaro.org>
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The map_mem() function limits the current memblock limit to PGDIR_SIZE
(the initial swapper_pg_dir mapping) to avoid create_mapping()
allocating memory from unmapped areas. However, if the first block is
within PGDIR_SIZE and not ending on a PMD_SIZE boundary, when 4K page
configuration is enabled, create_mapping() will try to allocate a pte
page. Such page may be returned by memblock_alloc() from the end of such
bank (or any subsequent bank within PGDIR_SIZE) which is not mapped yet.
The patch limits the current memblock limit to the aligned end of the
first bank and gradually increases it as more memory is mapped. It also
ensures that the start of the first bank is aligned to PMD_SIZE to avoid
pte page allocation for this mapping.
(cherry picked from commit e25208f77c2dad5a9f2ab3d3df61252a90b71afa)
Conflicts:
arch/arm64/mm/mmu.c
Change-Id: I11d3d87e0b529bc9fab26f56670a64e6f7d35d60
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: "Leizhen (ThunderTown, Euler)" <thunder.leizhen@huawei.com>
Tested-by: "Leizhen (ThunderTown, Euler)" <thunder.leizhen@huawei.com>
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The current vmlinux.lds.S places the notes sections between the
end of rw data and start of bss. This means that _edata doesn't
really point to the end of data. Since notes are read-only, this
patch moves them to the read-only segment so that _edata does
point to the end of initialized rw data.
(cherry picked from commit c80b7ee8520606f77fbc8ced870c96659053269e)
Conflicts:
arch/arm64/kernel/vmlinux.lds.S
Change-Id: Id4cbef5210ca2fd9c4dee910b1be8d5a5537d77d
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
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do_undefinstr() has to be called with interrupts disabled since it may
read the instruction from the user address space which could lead to a
data abort and subsequent might_sleep() warning in do_page_fault().
(cherry picked from commit 2600e130b3c90c8d6c13229d3d3a14dcb898a87b)
Change-Id: Iafc0a7659b6b9c91eabd94b8d127506159860a49
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Expand the arm64 image header to allow for co-existance with
PE/COFF header required by the EFI stub. The PE/COFF format
requires the "MZ" header to be at offset 0, and the offset
to the PE/COFF header to be at offset 0x3c. The image
header is expanded to allow 2 instructions at the beginning
to accommodate a benign intruction at offset 0 that includes
the "MZ" header, a magic number, and the offset to the PE/COFF
header.
(cherry picked from commit 4370eec05a887b0cd4392cd5dc5b2713174745c0)
Change-Id: If4f180805b305af50f612ef10b37b58c27dfba4d
Signed-off-by: Roy Franz <roy.franz@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Add <asm/neon.h> containing kernel_neon_begin/kernel_neon_end function
declarations and corresponding definitions in fpsimd.c
These are needed to wrap uses of NEON in kernel mode. The names are
identical to the ones used in arm/ so code using intrinsics or
vectorized by GCC can be shared between arm and arm64.
(cherry picked from commit 4cfb36136480c029a29dbf63a623506e6ed7282b)
Conflicts:
arch/arm64/Kconfig
Change-Id: I4693396492e755b31ad5663b5ede6d765b41a619
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
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We're going to introduce support to read and write the memory
mapped timer registers in the next patch, so push the cp15
read/write functions one level deeper. This simplifies the next
patch and makes it clearer what's going on.
(cherry picked from commit 60faddf6eb3aba16068032bdcf35e18ace4bfb21)
Change-Id: I8b7a55ba7d9919fc0ec512f64fe1ed7ac9dd227d
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
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Using an enum for the register we wish to access allows newer
compilers to determine if we've forgotten a case in our switch
statement. This allows us to remove the BUILD_BUG() instances in
the arm64 port, avoiding problems where optimizations may not
happen.
To try and force better code generation we're currently marking
the accessor functions as inline, but newer compilers can ignore
the inline keyword unless it's marked __always_inline. Luckily on
arm and arm64 inline is __always_inline, but let's make
everything __always_inline to be explicit.
(cherry picked from commit e09f3cc0184d6b5c3816f921b7ffb67623e5e834)
Change-Id: I8e8e8bcd3d1c05001553ebfebc7dfd8a561c40e4
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
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On some PAE architectures, the entire range of physical memory could reside
outside the 32-bit limit. These systems need the ability to specify the
initrd location using 64-bit numbers.
This patch globally modifies the early_init_dt_setup_initrd_arch() function to
use 64-bit numbers instead of the current unsigned long.
There has been quite a bit of debate about whether to use u64 or phys_addr_t.
It was concluded to stick to u64 to be consistent with rest of the device
tree code. As summarized by Geert, "The address to load the initrd is decided
by the bootloader/user and set at that point later in time. The dtb should not
be tied to the kernel you are booting"
More details on the discussion can be found here:
https://lkml.org/lkml/2013/6/20/690
https://lkml.org/lkml/2012/9/13/544
(cherry picked from commit 374d5c9964c10373ba39bbe934f4262eb87d7114)
Change-Id: Iab36378e1de4e6c2cb07a3b88aeb5ff4afbe535b
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
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If 'COMPAT' not defined, aarch32_break_handler() cannot pass compiling,
and it can work independent with 'COMPAT', so remove dummy definition.
The related error:
arch/arm64/kernel/debug-monitors.c:249:5: error: redefinition of ‘aarch32_break_handler’
In file included from arch/arm64/kernel/debug-monitors.c:29:0:
/root/linux-next/arch/arm64/include/asm/debug-monitors.h:89:12: note: previous definition of ‘aarch32_break_handler’ was here
Change-Id: I4934c850f0b4e75b400b7ea40485758e6ace068c
(cherry picked from commit c783c2815e13bbb0c0b99997cc240bd7e91b6bb8)
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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To resolve emc scaling latency due to sudden increase in cpu load
reverting the commit 426603c79c99049b6df03698fcdcde6d9dd8e571.
Bug 1408292
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/365365
(cherry picked from commit bc07275505f93cbf3d4e2ece403d4ef21be88bdf)
Change-Id: Iadbb796aa7eb2469ba1ed6becd4ae739bd49438b
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/402032
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Tested-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
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This reverts commit 193e70e3a74bb167e4a443329dc0bd3cf0fcd7a0.
VDE partition has to be left on before entering LP0, otherwise
secure content playback may be corrupted after resuming from LP0.
So we unpowergate vde in the dependent change. This change turn
off vde partition specifically for LP1 case to save power.
Bug 1502013
Bug 1507043
Change-Id: Ibf1dcb40a33cb52f9366e250452a54ae43fcb67a
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/401253
(cherry picked from commit f8b07f13193c1bdd2c76c6dc2520ee66c12b8790)
Reviewed-on: http://git-master/r/401983
Tested-by: Praveen Kumar Reddy M.V. <pkreddy@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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If vde partition is powergated before suspend, access to BSEV registers
that happens immediately after lp0 exit will go wrong. This WAR unpowergate
vde partition in suspend callback and powergate it again in the first place
of resume callback so that we won't keep vde powergate always on. Resume of
vde if needed will be taken care of afterwards.
Bug 1502013
Bug 1507043
Change-Id: Iaf4c36ac377c64e8d09d56f79e6e946ec47c686b
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/401252
(cherry picked from commit a2b4b1f96d6c4b7b4b244b1d36b279fcdcc3199d)
Reviewed-on: http://git-master/r/401982
Tested-by: Praveen Kumar Reddy M.V. <pkreddy@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Moving CDP charger detection to early phase and
also setting charger current to Non-standard
before QC2.0 charger detection to fix delay in
charging icon in UI.
Bug 1424733
Bug 1458999
(cherry picked from commit 4f0e5756869074d27d808eab2225459c6daec5fb)
(cherry picked from commit 57b2e6af46175c3f8992bc29e7ec1a778f9002f1)
Change-Id: I0db19bf633b0d76d687d64e5599ccf41ef469876
Reviewed-on: http://git-master/r/384598
Reviewed-on: http://git-master/r/396042
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/401889
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
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Add CDP charger detection code and reset
the charger before doing QC2.0 charger detection
to handle misc cases.
Bug 1424733
Bug 1458999
Change-Id: Ibf07d1f9416f8cfefe808129babef2e590bd8150
Reviewed-on: http://git-master/r/384597
Reviewed-on: http://git-master/r/396041
(cherry picked from commit 35be4ca44e5c4e16619e2b7a6b186d2bb2b94b78)
(cherry picked from commit 0c4b2de8640ebb0a8bf5d2477afc6aab043cce24)
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/401888
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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TN8 board can only support 1.2A charging current
for QC2 on 9V voltage output from charger.
Changed default charging to 2A from 1.8A from reviw.
h/w will only deliver 1.8 but charger needs to set to 2A.
Bug 1424733
Bug 1458999
(cherry picked from commit 708790edc747b8e180b44a2940ec834ed738579a)
(cherry picked from commit 58a61894a1edc498938ca57657f0466f5db94440)
Change-Id: I237a7e220e2a83cc4d0b3d700773497f50c26afc
Reviewed-on: http://git-master/r/384596
Reviewed-on: http://git-master/r/396040
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/401887
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Define CDP charger detection api.
Bug 1424733
Bug 1458999
(cherry picked from commit babf4cfea59f4c005e8c8d68b7562e11e5555b95)
(cherry picked from commit 2509057c9ac8f06e8d10cd5d6721199fd00db400)
Change-Id: I615bd79b5535db2c70e4e3a7dcf3f27692ee982a
Reviewed-on: http://git-master/r/384595
Reviewed-on: http://git-master/r/396039
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/401886
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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tegra_ep_disable will set ep->desc to be NULL. So in tegra_ep_dequeue,
ep->desc needs to be checked before calling ep_index or kernel panic
may happen due to NULL pointer.
Bug 1506083
Change-Id: I24390d863d3e31cb02a8e53015e1d0137f18487a
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/400828
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
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compiler can optimize out asm instructions if
volatile is not used. That could cause some
intermittent failures on jit codes.
Bug 1504845
Bug 1506516
Change-Id: I3192452bb3a9d26a88b7ea706efdd9d470ca8f88
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/401816
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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mask all interrupt and disable parent interrupt before shutdown to avoid
any interrupt during the power off sequence.
bug 1487336
Change-Id: If5829e325bef37201c3a0ebbeadb3aff4e7acd4f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/387157
(cherry picked from commit 9173cd770a4bfc57e4000f2f7d923a586a3a9ad5)
Reviewed-on: http://git-master/r/400147
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
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Fix Coverity issue of possible memory leak
Coverity id : 25731
Bug 1416640
Change-Id: I3aed6d423bfb048c35470048a90b55883f39f482
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/398109
(cherry picked from commit 276a412e807192d35e7a0da7b0c7453a441aec1c)
Reviewed-on: http://git-master/r/400094
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
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Bug 1501400
Change-Id: I50d43d6d042b40475a0594e90495baee63c19c7c
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/399786
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
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compress offload does not support calls from a 32bit userspace in a
64 bit kernel. This patch adds support for ioctls from a 32bit
userspace in a 64bit kernel
Change-Id: I145f8414d27fbdda534375b607295edde18072f8
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/399784
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Chandrakanth Gorantla <cgorantla@nvidia.com>
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Do not enable HCE priv mode.
Bug 1501689
Change-Id: I3da0ed7c7c1d59ef3e2a8bc727ca531eb22bab11
Reviewed-on: http://git-master/r/398102
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/398106
Reviewed-by: Automatic_Commit_Validation_User
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Allow to pass the invalid irq as -ve or zero from platform.
For this change irq type on platform data as the integer type and
handle in driver to treat -ve or zero irq as invalid irq.
bug 1502787
Change-Id: I09f77dd6ef82f7668c940d31d620a588e9f35e7c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/401200
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>
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Update CPU and GPU EDP limits for various T132 platforms.
Bug 1434482
Change-Id: Ie2faa7d42ab127e7f8d6512c24da5c341f14e7bd
Reviewed-on: http://git-master/r/399958
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/400011
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update EMC DVFS table and add temperature
derated DVFS table for E1971
Bug 1434354
Change-Id: I0091d99944ffb8e42b5595d0801e1bee17c2cab9
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/399981
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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While updating defconfig using ksetup and ksaveconfig, non-comms
changes are seen. Clean up defconigs using ksetup and immediate
ksavedefconfig.
Bug 1430977
Change-Id: I2a360623490565f0e1b77e38efc94678a5305217
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/398715
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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- adjust to cover video VBLANK command type
- set DSI to LP mode after sending suspend cmd
Bug 1444255
Change-Id: I2659155c0a91dde7c8ebbb6eaba89c26530205a1
Signed-off-by: Allen Chang <allchang@nvidia.com>
Reviewed-on: http://git-master/r/393896
(cherry picked from commit d2dd31ee0c411d1ee8f41a09b1faec153578fe2d)
Reviewed-on: http://git-master/r/398080
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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rel-21
http://mdas/deliveries/2959/patch
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
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Initial created dts file for vcm30t124 Android.
A serial port for all ardbeg devices is uartc and it's
enumerated on ttyTHS2.
But it's uartd on vcm30t124 and uartd is enumerated on ttyTHS3.
So changed the ordering so that uartd can be enumerated on ttyTHS2.
bug 1440706
Change-Id: I6e226812402bc75991ece96c335b492f949f7976
Signed-off-by: Phoenix Jung <pjung@nvidia.com>
Reviewed-on: http://git-master/r/395661
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
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The build system need tegra124-loki.dtb for building the prebuilt
binary. This file has been removed as this does not refelct any top
level file.
Added tegra124-loki.dts to make build system happy.
bug 1504108
Change-Id: I7b619982cbf8dfff324ff2110cce8dec0aeb959e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/399359
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Fix Coverity issue of possible memory leak
Coverity id : 25731
Bug 1416640
Change-Id: I3aed6d423bfb048c35470048a90b55883f39f482
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/398109
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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commit 779ca908b414cc0adfa2ebcb5e754f1c42645703 accidentally
removed the CONFIG_USB_RTL8152 causing the driver to not load.
Enable it again.
Bug 1404932
Change-Id: Idbe8235ca329d7c22d0e240b6301d985799ac46a
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390302
(cherry picked from commit 0e22f4817db37ee718e3cde2fa600028bfa79aeb)
Reviewed-on: http://git-master/r/396905
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Add IOCTL which could be used by PG tool.
Change-Id: Iafbe78e42441afeda36f91e5c1f8c2ad91cbf9a4
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390301
(cherry picked from commit 75054cd9e838444a3534827604f365b9ca826c5c)
Reviewed-on: http://git-master/r/396904
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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There are known issues for switching the drivers between ECM mode and
vendor mode. The interrup transfer may become abnormal. The hardware
may have the opportunity to die if you change the configuration without
unloading the current driver first, because all the control transfers
of the current driver would fail after the command of switching the
configuration.
Although to use the ecm driver and vendor driver independently is fine,
it may have problems to change the driver from one to the other by
switching the configuration. Additionally, now the vendor mode driver
is more powerful than the ECM driver. Thus, disable the ECM mode driver,
and let r8152 to set the configuration to vendor mode and reset the
device automatically.
Change-Id: I2ba697b2afe83ca6e220007af0ceaa6b83e281f4
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390288
(cherry picked from commit f212e29aefa37cbad3e851733410cc8accb1f65c)
Reviewed-on: http://git-master/r/396903
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Add dumping the tally counter by ethtool.
Change-Id: I302202fe31e01b2857c76f98637e9ad5c1edb412
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390300
(cherry picked from commit 0816ece0a6581f465489ca5a01b2d95cef5f5af2)
Reviewed-on: http://git-master/r/396902
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Call skb_cow_head() before editing the tx packet header. The header
would be reallocated if it is shared.
Change-Id: I6b3aef7acf215692eec02da679f356be614a9585
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390299
(cherry picked from commit a51ef337214b4d1a848d5c3279aec4718f1be36a)
Reviewed-on: http://git-master/r/396901
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Support hw IPv6 checksum for TCP and UDP packets.
Note that the hw has the limitation of the range of the transport
offset. Besides, the TCP Pseudo Header of the IPv6 TSO of the hw
bases on the Microsoft document which excludes the packet length.
Change-Id: I12aba3407f1894e2a161779fc19c075040ce5a6e
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390298
(cherry picked from commit 4e218fd34b612339ad636db2182291fd347c146d)
Reviewed-on: http://git-master/r/396900
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Support scatter gather and TSO.
Adjust the tx checksum function and set the max gso size to fix the
size of the tx aggregation buffer.
Change-Id: Iff3dde25a2329fb47de6a5b6bfce92f260276992
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390297
(cherry picked from commit 5af199861e22e25c0454676b992298ddfe4d6111)
Reviewed-on: http://git-master/r/396899
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Support hw rx checksum for TCP and UDP packets.
Change-Id: I3bb3cefe4d9dbd98996fa975256545f35f393eae
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390296
(cherry picked from commit 930a7af20283f78e3f5e5e4c70615c84c1ee29f6)
Reviewed-on: http://git-master/r/396898
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Continue dealing with the remain rx packets, even though the allocation
of the skb fail. This could calculate the correct dropped packets.
Change-Id: Ic7fbe722e41b379f0bcf892356c9b00eacae82dc
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390295
(cherry picked from commit 36eb4f48ca9366207524859b84e439c8fb0ed6f2)
Reviewed-on: http://git-master/r/396897
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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move the tx_bottom() from delayed_work to tasklet. It makes the rx
and tx balanced. If the device is in runtime suspend when getting
the tx packet, wakeup the device before trasmitting.
Change-Id: Ib200ea8e98de1425d2e95185e75766b763619623
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390294
(cherry picked from commit 46737054c934399d0e7f1ea9723620e250f74e9a)
Reviewed-on: http://git-master/r/396896
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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