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Set correct VIC value for 1080p/30Hz mode in AVI infoframe.
Bug 969243
Change-Id: I6da9236124dbad7e4d74f3cf6dad7e273bd7778b
Signed-off-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-on: http://git-master/r/100553
(cherry picked from commit 41858f2fd99face9dc0c47bd2870045291a6c0b6)
Reviewed-on: http://git-master/r/102378
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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To avoid border color making limited range test of MHL
certification failed.
Bug 966615
Bug 969243
Signed-off-by: Vick Yu <vyu@nvidia.com>
Change-Id: I5c9659358a1c8dac9c6a5194bbc6f59b8230f116
Reviewed-on: http://git-master/r/100552
(cherry picked from commit 20774a3db055630ba0e59669e2e7cbd412f03178)
Reviewed-on: http://git-master/r/102377
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Youngjin Kim <nkim@nvidia.com>
Tested-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Merges of dma changes from mainline reported conflict and
it was not got resolved properly.
Fix the resolution issue.
Change-Id: I7edc5effc0b9a61363e77e6cc39eb62e315396d0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102590
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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If two threads need to wait for CDMA to become quiet at the same
time, the second one will cause a BUG(). Replace the BUG() with a
code to yield and try again.
Change-Id: I7925ad0cc0e8292919e54d0fa45f7837f453358d
Reviewed-on: http://git-master/r/102437
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Bug 946110
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Change-Id: I0d4c716c4ab7a60011018d6c13be4265cc9f7290
Reviewed-on: http://git-master/r/87061
(cherry picked from commit a7dad880dcea36fcb8223cf0b34cc1091d725a9f)
Reviewed-on: http://git-master/r/102360
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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nvhost attempts to purge all buffers from timed out contexts. This is
very error prone, and not necessary. Change behavior so that only the
hung job, and the immediately following jobs from same context are
purged. This simplifies code, and corrects bug where the push buffer
modifications caused panics.
Bug 982946
Change-Id: Ifb26484cf02ef40f8d5b20338eebc0a731f453cf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/102234
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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This driver supports ivoltage regulator driver for MAX8973
voltage regulator chip. The MAX8973 high-efficiency, three-phase,
DC-DC step-down switching regulator delivers up to 9A of
output current.
bug 981355
Change-Id: I6e4ff62139face4e47e2be269554a64c2654e74b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102148
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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nvhost panics if hardware does not respond within 30 seconds. Remove
this behavior, as it causes problems in emulation and simulation.
Panic should be used only to prevent corruption.
Submits are now given a default timeout of 30 seconds. The clients
can still override with their own timeout value.
MPE doesn't provide the number of slots for context save/restore.
This information is needed to be able to use the submit timeout for
MPE.
Bug 982946
Change-Id: I0f54d639df0fb726cc3163b317bf9c90bf56798b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/100246
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Integrate Marvell SD8797 M2614311-GPL driver release
Package Ver: T3T-14.69.11.p122-M2614311_A0B0-MGPL
Bug 954218
Change-Id: Ic4c110cc06f45cf3f612df323e68c75edeb46e11
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/100052
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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set vdd_pnl as 'boot_on' to avoid dropping panel VDD.
Bug 965398 959819
Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/95398
(cherry picked from commit 9f423c83e391fa8581de2c088b4dea8248da8ae1)
Change-Id: I513e004f7ec1a46c155825af9e6278c46ca444c5
Reviewed-on: http://git-master/r/96643
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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To reduce delay between CORE_PWR_REQ and VDD_CORE, changed SD1 power up
period from 1 to 0.
Bug 930883
Change-Id: I50ea110d0cb72402b5d03c3e260e6ab340d87fbe
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/92704
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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- nvhost_master holds a reference to all the channels for
a chip architecture
- however, nvhost_master is a private data of host1x hardware
device. so it should contain only members needed by host1x
hardware device
- add chip specific apis to allocate and free channels
- this will also help to remove the static binding between
nvhost_device and a channel per SoC in future
Bug 871237
Change-Id: I2148db57b995b4cb60954ebb6e670f588552eca4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/91687
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Make tegra_apb_readl() , tegra_apb_writel()
T20 only
Bug 950116
Change-Id: I75601bebaee14ed2e217a16c0e46fb2910c421c8
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/102712
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Clipping PM QoS requests to combined old policy limits that include
both PM QoS and user policy requests creates a circular dependency.
As a result new PM QoS maximum limit is rejected if it is above
previous PM QoS minimum limit even though the new PM QoS minimum
limit has been already lowered below new PM QoS maximum limit.
Instead clip PM QoS request to the old user policy limits only.
Change-Id: Ice0a53a699e0798f07f0e32d6b8a28586fe5db0c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/102386
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Vikas Ramesh Kedigehalli <vikasr@nvidia.com>
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On Tegra3, if PM QoS hotplug request is received when auto-hotplug
is disabled, do not enable auto-hotplug as side effect of the
request.
Change-Id: I8928d9ecd22e2d2df5fe60274fed30da0c565b47
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/102118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Move WinB's format limitations to a list of preferred formats.
Bug 985197
Change-Id: Ife37c79441b2737592ace51e94ab0c80af4af917
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/102629
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
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- Platform data is treated as const and not modified in driver.
- Driver specific data is stored and used from a new structure.
- Remove support for older firmware version of XMM modem (<1130).
- Shortening of names for compliance and to fit in 80 characters.
- Organize irq function to reduce indentation.
Change-Id: I269401aa0a2efc685d7a630b4952cb31cbca6a4f
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/101587
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>
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Automotive platforms are broken down further into 5 Asic skus from
3 ASIC SKUs, updated kernel to reflect these changes.
Bug 983555
Change-Id: I75925c5853d4ec2a5c72e430f4c2380e58aae774
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/101903
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Add MODULE_LICENSE to modules that do not advertise a license,
and therefore taint the kernel.
Bug 979176
Change-Id: I1abbfa9ca1535b39e70d8bf7aa975e2663a6e45d
Signed-off-by: Eric Brower <ebrower@nvidia.com>
Reviewed-on: http://git-master/r/100214
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Makes function pointer type for mode_filter match the function in hdmi.c
Change-Id: Id61f319a4ddef003b79782391e9e7f2f8cb32dda
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/102630
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
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Use static for functions that are not called externally.
Change-Id: Iacccb83e31e860d10f92897041421298231e45b1
Reviewed-on: http://git-master/r/102623
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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Enable TPS6238X0 voltage regulator chip.
Bug 981330
Change-Id: I0d4207543cd2d2c1b2977536ea7299b5b65fc600
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/102588
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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bug 980184
Change-Id: I376a62ada8f7e825693a4cdd87942edaa92b8fc4
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/102309
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Fix section mismatch warnings derived from
tegra_uart_platform_driver.
Bug 984436
Change-Id: Iec737f28b0a7ce3ae521ad788e6ca5a101675c52
Signed-off-by: Pradeep Kumar <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/102237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Bug 955184
Change-Id: I7ac0a290c2b6acd454de05d094bd676b88f4b476
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/101546
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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-Move _tegra_dc_enable to before irq_request and remove
disable_dc_irq.
-It will remove warning of "IRQ when DC not powered!".
Bug 955184
Change-Id: If9b039f3f1635d92f10bfc54af08101972fc3d57
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/101498
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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disable the compilation of minidsp specific code,
we are disabling the minidsp in codec because the driver is
not stable and different customers are using different process flows
for mini dsp
Change-Id: I08f8f485f1a379773f2f1f7ae2fd1b3a89c45d07
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101232
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The regulator module consists of 1 DCDC. The output voltage
is configurable and is meant for supply power to the core
voltage of Soc.
Change-Id: Ic62d100a588f7b6f1b30c11fd44a925c97393069
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100653
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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WAR comprises of soft reset dsi controller followed by
explicitly clearing host trigger.
Bug 982919
Change-Id: Ia8c497dd496435e429cd5b5ee8aaf1b7d78dc797
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/102204
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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check if requested state and current BT power state is same,
if yes, do not toggle BT power GPIO's.
if not, set requested power state.
Bug 982600
Bug 928604
Change-Id: I82c65fd6d43940c86cc3de440295ba179a4ade33
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/102190
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Some of our driver generate the section mismatch warning but
details of the error is not displayed.
Enable config variable to display all such warning during
compilation.
Change-Id: Ie0a6dc10cc20304b74a7712717adb44a86474247
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102183
Reviewed-by: Automatic_Commit_Validation_User
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RTC_WKALM_SET ioctl should do two things:
1. Set alarm value
2. Enable alarm irq
In the current implementation for RTC_WKALM_SET ioctl we are only setting
the alarm value but not enabling the alarm irq and hence the system
is not waking from lp0 state once the set alarm value expiries.
For RTC_WKALM_SET ioctl, alarm->enabled will be set to one from userspace.
So based on this condition we can differentiate between RTC_WKALM_SET &
RTC_ALM_SET and accordingly enable alarm irq.
Bug 978205
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: Ia35192e691ca116b13093f52873020f67c5c2f8d
Reviewed-on: http://git-master/r/101447
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Adding a new config option and enabling background ops in driver.
Correcting the EXT_CSD byte that needs to be written in order to
trigger background ops in the MMC firmware.
Bug 847037.
Change-Id: Ibc517540cab43fa5070b142a416f6b67f2f7e7be
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/99117
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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tegra_ehci_suspend_noirq/tegra_ehci_resume_noirq breaks
the modem suspend call as it does a regulator_disable()/regulator_enable
call which in turn requires the irqs to be enabled.
Hence maintain a normal suspend call i.e with irqs enabled but
split the resume to normal resume and noirq resume.
Spliting the resume in this way takes care of the below erros in
lp0/lp1
"tegra-ehci tegra-ehci.2:fatal error"
"tegra-ehci tegra-ehci.2: HC died; cleaning up"
Originally resume_noirq & suspend_noirq were added to avoid the above
errors but since it breaks the modem suspend call splitting the suspend
and resume in this way
Bug 954564
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: I630b3dbe2ca66d194857dc71ababa3e5955785b1
Reviewed-on: http://git-master/r/99100
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Allow setting bias level to turn off clock extern1 when codec
is idle for enterprise board. (Maxim 98088 codec)
Bug 984678
Change-Id: Ib01be71362ab0c5525f570693b41db73777875e6
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Reviewed-on: http://git-master/r/102240
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Associated with I2S there is a playback ref count, when
we open the I2S for plyabck it is incremented and during
voice call we check if its not zero then enable the tX.
This logic fails if the start-trigger is not called for the prior
playback stream. Hence we unconditionally enable the tx,
which is harmless
Bug: 981806
Change-Id: I66aafda596e2b2b03745e93f3e851dedc3b8ef5d
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101996
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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To meet the LP0 exit power on sequence, it is require to wake system
for tegra gpio in place of PMIC for E1291-A04.
Also it is observed that if GPIO key is used to wakeup then there is
possibility of loosing the key event and hence adding the gpio
GPIO_PV0 as the key with code of RESERVED so that it can only
wakeup system but will not able to send the key event through
gpio keys.
bug 981320
Change-Id: I8610adca4b5ed8ae79f8fcca9a1d4b5548158c60
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/101784
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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A new trace event is added for tracing cpu suspend start and end
Change-Id: I2506e3aed0692c44fb4325e9d381cea53228b0c3
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/101748
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Allow setting bias level to turn off clock extern1 on enterprise
when codec is idle. Added a dummy widget to make the
target_bias_level to BIAS_OFF as per required by the new ALSA
kernel.
Bug 984678
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I29de405c26286eee0a49e655f1d4236f6093ce8a
Reviewed-on: http://git-master/r/100287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
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Allow setting bias level to turn off clock extern1 when codec
is idle for Enterprise (Maxim 98088 codec).
Bug 984678
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I09538dafe6c6f01547ff989de3c23933c9745db0
Reviewed-on: http://git-master/r/100286
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
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Add Tegra camera driver to support video
capture through H/W interfaces VIP, CSI.
Bug 978086
Change-Id: I0dc51e47928388ed2073a99f8ca80b5a5a77d166
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/101590
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add clock minimum to debugfs.
Bug 917644
Change-Id: Ie088809829af2bdc81a969a034bf00847459f0ce
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/101555
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Limit eMMC, SD and SDIO DDR mode clock to 41MHz.
Bug 967719
Change-Id: Iaccc5b771b81b15226f87684b547ad1fb7dd38d3
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/101173
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adding tegra3 sdmmc4 EMC shared user in the tegra3
clock table.
Bug 967719
Change-Id: I934dcaebf664f8b1db9ea07eef07eb6f266822aa
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100582
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Set the eMMC ddr mode clock dynamically based on emc
clock rate. If ddr clock limit is specified and the emc
clock is less than max emc freq, then limit emmc ddr
clk. If not, set the max eMMC ddr clock.
Bug 967719
Change-Id: I9f70077c4ac4bb1f3e6d894fcb8420b1aba284dd
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100579
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Added a new variable in sdhci platform data
which will limit the ddr50 mode clock.
Bug 967719
Change-Id: I3f55b55651362447845c2e1d5000939e3e028df6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100569
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Move initialization for HOST1X sync point irq to nvhost driver.
Bug 871237
Change-Id: I0d31e03b43999c609194665cdcbd2f0e498d848f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/100250
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Corrected safe option for LPW0 and LPW2
Bug 920686
Change-Id: I14e1a22de3338ba569d3b381508e123d12aad059
Reviewed-on: http://git-master/r/101973
Tested-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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bug 921322
Change-Id: If7f05c632816abac54852293ebd3834b5b3984d8
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/99508
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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add ov5640 yuv sensor support - initial.
bug 921322
Change-Id: I813afa8963e39afe475f9fdd43152cfaf1a16ae1
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/99506
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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