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rework the device-tree include structure to faciliate several device-tree's
depending on HW version.
Add a device tree imx6q-apalis-eval_v1_0.dtb for V1.0 HW,
imx6q-apalis-eval.dtb working with V1.1 and newer HW.
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Set the eMMC reset pin as GPIO input with 22k pullup. Do no longer rely on
the pinmuxing from U-Boot.
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The key used for wakeup from suspend was named 'Power' and configured to
send the KEY_POWER code. Currently this is misleading, would one add
functionality to the kernel to actually turn off the system when KEY_POWER
is received then this would lead to the wakeup event also generating a
power down event later.
Rename the key to 'Wakeup' and send the KEY_WAKEUP code to the input
subsystem.
If one really would use the key
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These display can not directly be connected anyway.
For MIPI CSI at least one display is needed.
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The CPU on the modules does not have the EPDC IP anyway.
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- use UARTs in DTE mode (Pinout change from V1.1 HW)
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As stated by the eMMC 5.0 specification, a chip should not be rejected
only because of the revision stated in the EXT_CSD_REV field of the
EXT_CSD register.
Remove the control on this value, the control of the CSD_STRUCTURE field
should be sufficient to reject future incompatible changes.
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 03a59437ef6b6ad7fb0165cb9b96c08d6bf057fc)
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With the new eMMC5.1 spec, there is a new EXT_CSD register with
the revision number(EXT_CSD_REV) 7. This patch updates the check
for ext-csd.rev number as 7.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit 6636bad839d9936e73e48c4841eda83a58fcdb53)
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The Apalis iMX6 V1.1 HW allows the control of RESET_MOCI.
This is now used to reset PCIe endpoint devices until after the PCIe switch
has come out of reset.
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With the following dtb node one can define a gpio to reset
downstream endpoints.
reset-ep-gpio = <...>;
Currently the logic is 1 for reset asserted
and 0 for reset deasserted.
Some pcie switches require their downstream endpoints to be kept in reset
for an additonal millisecond after their reset has been deasserted.
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The Freescale provided files imx6qdl.dtsi, imx6q.dtsi provide among
other things pinmux definitions.
We added missing definitions to these files, however that could
become a merging nightmare in the future.
Move our additions into apalis/colibri files and use names which
likely do not collide with future upstream additions.
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Use the RTS(CTS) output to control a RS485 transmitter.
The UART obviously needs RTS/CTS enabled for this to work, e.g.
fsl,uart-has-rtscts must be present in the device tree.
Enable RS485 by either using ioctrl TIOCSRS485 or enable it in
the device tree by setting linux,rs485-enabled-at-boot-time.
e.g.
&uart2 {
status = "okay";
linux,rs485-enabled-at-boot-time;
};
Largely taken from Bobby Wu's patch
https://community.freescale.com/message/354499#354499
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This enables the buffers which bring the WE# signal to SODIMM-93/99
and tri-states the CPU pins directly connected to SODIMM-93/99.
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All pins not assigned to other functionality are muxed to be
gpio. This allows for later sysfs access to these pins.
Some USB OTG control signals are among the list as the driver for
these is not yet ready.
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UART A was lacking DCD/DSR/DTR muxing,
UART C pinmuxing was set for DCE.
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MIC_GND is controlled with a FET. With a pullup set in the dtb MIC_GND
is active by default.
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On the evaluation board is a pull down on this line, thus
low active makes more sense.
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Enable the external memory bus, aka weim.
Define a sram at CS0 and one at CS1, each in non multiplexed mode.
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Evaluate the ranges property of the weim node to setup the chip select
memory map in IOMUXC_GPR1.
Note that the implementation assumes the ranges property to be sorted from CS0
to the last CS used.
e.g. for CS0, CS1, CS2 used, each having a range of 32MB:
ranges = <0 0 0x08000000 0x02000000
1 0 0x0a000000 0x02000000
2 0 0x0c000000 0x02000000>;
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Fix the mapping of PWM<A> to SOC pwmX mapping and
set the second SOC pin to input on PWM<A>, PWM<D>.
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Make the CMA size half the RAM size or 256MB whatever is less.
Thus on a Colibri iMX6S (with 256MB RAM) CMA will be 128MB,
on a Colibri iMX6DL (with 512MB RAM) CMA will be 256MB.
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pixeldata is sampled on the positve pixelclk edge.
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Colibri/Apalis Txx and Colibri VFxx have this configuration
also not set. Be consistent.
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Introduced with c87ddbb1325a448d56a920513206592f03bca117
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Move wl_surface_commit to work thread.
Fix memory leak in wl_egl_window_resize.
Date: Jul 10, 2014
Signed-off-by Yong Gan <yong.gan@freescale.com>
Acked-by: Jason Liu
(cherry picked from commit c114ec8a4c74fc2a2d0f64c60031c66d2225ff83)
(cherry picked from commit dac46dcf913585956a0e7a838e6f4b7465f00f57)
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Vivante patch name:
fix_fsl_2d_base_on_p13.v2.rls.diff
-Updated the outstanding request limit to 12.
-Refined the 2D chip feature check.
-Refine the 2D cache flush operation
(avoid FE and PE access memory through the same port).
-Enable cache flush for filterblt.
-Dynamic enabling SPLIT_RECT by checking chip feature(disable for us)
-Use brush stretch blt for clear operation.
-Enable SplitFilterBlit to workaround the 2d hang issue in filterblit case.
-Refine 2d line operation.
Date: May 05, 2014
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Shawn Guo
(cherry picked from commit 479b9125caefc45451aa1c4a1b7f2704b57831fa)
(cherry picked from commit ba5139e1daa3f5834b061a099bcec8e85575a2c0)
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Fix PCIe operation by disabling RC/EP test mode which according to the
following community forum post is only used on the PCIe EP/RC
validation system and otherwise prevent PCIe from working properly:
https://community.freescale.com/thread/328257
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read the chips temperature in millikelvin
while at it sort the #include directives in alphabetical order.
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imx6qdl-apalis.dtsi: enable stmpe-adc in device tree
defconfig: add stmpe-adc to minimal defconfig
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