Age | Commit message (Collapse) | Author |
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The macro FIXED_REGS_COMMON used in only one place and it
is no more common across A02 and A04 and hence removing
this. Also remove unnecessary back slash.
Change-Id: If56512a3f957d06406e9baf369dd409feb82b55b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/121132
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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The gpio mode of pin is configured when setting
direction and hence this call is no more required.
Change-Id: I38dac94bd0eb753c779db61f71c1e01295faa89e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120848
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
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We need to validate the buffer size before we
copy buffers from/to user space.
Bug 1027334
Change-Id: I0717e9ff1d2e5eb3e8a863555457f4bcfdbb2cb9
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/120185
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Patrick Shehane <pshehane@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Tegra 3 version: TF_TEGRA3_AB01.14.36781
1)Kernel boot addr in TF boot args, branch prediction activated early,
fix in system driver mapping.
2)Several improvments in boot and L2CC operations
3)Fix to support Neon
Signed-off-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Change-Id: I16ed5d46d196875dece1f0006a0b04dbfdb58d42
Reviewed-on: http://git-master/r/119790
Reviewed-by: James Zhao <jamesz@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Tested-by: Hyung Taek Ryoo <hryoo@nvidia.com>
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For the CONFIG_TRUSTED_FOUNDATION code paths, differentiate L2
enable vs. reenable, which are different SMCs (won't trigger an
invalidate in the case of a reenable).
On an L2 disable SMC, optionally pass a 0 for the L2 ways arg,
which skips the full clean/invalidate (and simply just disabled
the L2).
In order to safely skip flushing the L2 on the disable, we have
to be careful what we dirty from the type we flush the L1 and
disable the L2.
Bug 939415
Signed-off-by: Chris Johnson<cwj@nvidia.com>
Change-Id: I756d2ceda83d5d8d6bc5670218e9d874d5e5f62a
Reviewed-on: http://git-master/r/119786
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enable device tree support for tegra2/tegra3 based android
platforms.
Bug 1001225
Change-Id: I5caf6302b88d30cca66bfdb957c5b4f1a575a634
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/110204
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enable device tree support for whistler by adding board
compatible table.
Bug 1001225
Change-Id: Ic945d70894fe2deb5039106e794b7fa51c5604bb
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/116609
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enable device tree support for enterprise by adding board
compatible table.
Bug 1001225
Change-Id: I64038ce47771148f7cf2f1d53503d11729ac56b8
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/116608
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enable device tree support for ventana by adding board
compatible table.
Bug 1001225
Change-Id: I3f20c1a7966aff1a8a5fbfc1a7ccf2790419be70
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/110203
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Use the existing boardfile for everything, just match using DT.
Change-Id: Ie12cad6ab0bfcb94538cd158dd9fc9ca85b91c98
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/95478
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This config option only builds on PPC platforms.
Change-Id: Ibe7ebdc2dd5b9aa46e8f887570481a11a373c417
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/95475
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
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Update Makefile.boot to compile *.dts when the appropriate Tegra SoC
support is enabled, rather than requiring Kconfig to list each board
individually. Remove CONFIG_MACH_VENTANA now that it has no use.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit 9132b0ed57320996b16eafbf651a04e02ad29092)
Conflicts:
arch/arm/mach-tegra/Makefile.boot
Change-Id: I730271346eff20005ad289dedc54c9c6681e0384
Reviewed-on: http://git-master/r/116607
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This
change modifies the Tegra board files to be named the same way for
consistency.
Once a related change is made in U-Boot, this will cause both U-Boot and
the kernel to use the same names for the .dts files and SoC identifiers,
thus allowing U-Boot's recently added "soc" and "board" environment
variables to be used to construct the name of Tegra .dtb files, and hence
allow board-generic U-Boot bootcmd scripts to be written.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit 702b0e4f2f2782962aab7d9a0a40ad68770bb1f6)
Conflicts:
arch/arm/boot/dts/tegra20-paz00.dts
arch/arm/boot/dts/tegra20-trimslice.dts
arch/arm/mach-tegra/Makefile.boot
Change-Id: I4ec7605331c996d3aff84fc2fc37bcf06f0aba0b
Reviewed-on: http://git-master/r/110202
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add dts file to enable device tree support on whistler platform.
This currently adds only compatible info to dt.
Bug 1001225
Change-Id: I3023639e817529e6bb18ed5fa92b8c35c12d45b8
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/116606
GVS: Gerrit_Virtual_Submit
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Add dts file to enable device tree support on enterprise platform.
This currently adds only compatible info to dt.
Bug 1001225
Change-Id: I4cc4093062d39baef9871b423840f5f2d01f25e9
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/116605
GVS: Gerrit_Virtual_Submit
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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We will gradually enhance this file as our internal support improves.
Change-Id: I9343a14a89942226b1e3eb8aa0afa8c186c46a9e
Signed-off-by: Chinmay Kamat <ckamat@nvidia.com>
Reviewed-on: http://git-master/r/110201
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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We really just want the /chosen and compatible info for now, and use the
existing board files for the rest of the support. We can gradually
enhance this file as our internal support improves.
Change-Id: If50378c128afb31d0d014c78d9f8f03c86b8d568
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/95477
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
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Read board_info data from device tree instead of ATAGs,
if we're booting with device tree.
Bug 1001225
Change-Id: I2d659252a6a91f723bf4bb6c74918774650b87e2
Original-Author: Dan Willemsen <dwillemsen@nvidia.com>
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/116604
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 973078
Change-Id: I2860402c887db414717ce313101dc09e8b327f99
Signed-off-by: Chinmay Kamat <ckamat@nvidia.com>
Reviewed-on: http://git-master/r/108699
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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The rule to copy this file doesn't have to be forced. However
lib1funcs.[So] have to be listed amongst the targets.
This prevents zImage from being recreated needlessly.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chinmay Kamat <ckamat@nvidia.com>
Change-Id: I0ad0d4564835837abf15f0c590e8452bfef1c3a7
Original: 63d15148b6058ab0037343390e8918503ed81968
Reviewed-on: http://git-master/r/108698
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Some old bootloaders can't be updated to a device tree capable one,
yet they provide ATAGs with memory configuration, the ramdisk address,
the kernel cmdline string, etc. To allow a device tree enabled
kernel to be used with such bootloaders, it is necessary to convert those
ATAGs into FDT properties and fold them into the DTB appended to zImage.
Currently the following ATAGs are converted:
ATAG_CMDLINE
ATAG_MEM
ATAG_INITRD2
If the corresponding information already exists in the appended DTB, it
is replaced, otherwise the required node is created to hold it.
The code looks for ATAGs at the location pointed by the value of r2 upon
entry into the zImage code. If no ATAGs are found there, an attempt at
finding ATAGs at the typical 0x100 offset from start of RAM is made.
Otherwise the DTB is left unchanged.
Thisstarted from an older patch from John Bonesio <bones@secretlab.ca>,
with contributions from David Brown <davidb@codeaurora.org>.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chinmay Kamat <ckamat@nvidia.com>
Change-Id: Ifb96adf6976da0f518c9c2cdad6be85f94c8ad1c
Original: b90b9a38251e9c89c34179eccde57411ceb5f1aa
Reviewed-on: http://git-master/r/107423
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This is a small subset of string functions needed by commits to come.
Except for memcpy() which is unchanged from its original location, their
implementation is meant to be small, and -Os is enforced to prevent gcc
from doing pointless loop unrolling.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chinmay Kamat <ckamat@nvidia.com>
Change-Id: Ib6fd21beb8ee8804e472fb4ff5eb1cbea2b8e877
Original: df4879fa2603fbf0804a80f9f146ef9023dd621f
Reviewed-on: http://git-master/r/107424
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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The appended DTB gets relocated with the decompressor code to get out
of the way of the decompressed kernel. However the kernel's .bss section
may be larger than the relocated code and data, and then the DTB gets
overwritten. Let's make sure the relocation takes care of moving zImage
far enough so no such conflict with .bss occurs.
Thanks to Tony Lindgren <tony@atomide.com> for figuring out this issue.
While at it, let's clean up the code a bit so that the wont_overwrite
symbol is used while determining if a conflict exists, making the above
change more precise as well as eliminating some ARM/THUMB alternates.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chinmay Kamat <ckamat@nvidia.com>
Change-Id: I1590dcbb9789f20d4c56a1e1f7c40177acaa8a2d
Original: 5ffb04f6690d71fab241b3562ebf52b893ac4ff1
Reviewed-on: http://git-master/r/107767
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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This patch provides the ability to boot using a device tree that is appended
to the raw binary zImage (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
Signed-off-by: John Bonesio <bones@secretlab.ca>
[nico: ported to latest zImage changes plus additional cleanups/improvements]
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chinmay Kamat <ckamat@nvidia.com>
Change-Id: I93c54694a59b357eb550587b94c986dcb19ab954
Original: e2a6a3aafa9862c4a4b59f2a59b8f923d64a680e
Reviewed-on: http://git-master/r/107422
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This is needed for proper alignment when the DTB appending feature
is used.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chinmay Kamat <ckamat@nvidia.com>
Change-Id: I18dd4220a40984ab2551ca17a16db37193ffe80c
Original: 72bf0bce411d9df0935eb77256604212de8f89cc
Reviewed-on: http://git-master/r/108696
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Fill the desc.supply_name for each rail with corresponding
input pinname as per datasheet.
Change-Id: I6dda1a95255549cce1773e271d6529d0f4d10392
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120891
Reviewed-by: Automatic_Commit_Validation_User
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The DCDC regulators can support of control through extrenal
signal. Add support of this feature.
Change-Id: I9564d09cbab4d8903e8ea2fddc6739bbeb1573e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120890
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The LDO1 and LDO2 are always-on regulator from device.
Add support for these rails.
Change-Id: I9636029a1ba293b4a48f596a8e6a91112f2d2299
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120889
Reviewed-by: Automatic_Commit_Validation_User
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Add support of providing the supply name through
regualtor descriptor. This help to fill the supply name
in device based on datasheet.
This patch help to develop driver which is align with
mainline.
This change is small set of change in mainline
---------------
commit 69511a452e6dc6b74fe4f3671a51b1b44b9c57e3
Author: Rajendra Nayak <rnayak@ti.com>
regulator: map consumer regulator based on device tree
---------------
Change-Id: Ia3112f29efe4f0e0c9e98f2b7943255b2eae4c49
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120883
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The gpio mode of pin is configured when setting
direction and hence this call is no more required.
Change-Id: I7107ea81a69d035b966c6fb8cebe4944edad6098
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120850
Reviewed-by: Automatic_Commit_Validation_User
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The gpio mode of pin is configured when setting
direction and hence this call is no more required.
Change-Id: Id1730f48d43134c67eb1e6edf70884e3e5f582d2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120849
Reviewed-by: Automatic_Commit_Validation_User
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Prints error message when memory alloc failed for easing
debugging.
Change-Id: I6a8ae68702b01ec975f0130ee78aae3c9ac89c1b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120845
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The structure tps65090 have member as "client", "lock", "id"
which is no more required.
Removing this member from structure.
Change-Id: I18e64c77caeaa0e9c4a23bbb3cd1a6b3419e36d4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120844
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Fix compilation warning of -Wmaybe-uninitialized
Change-Id: Iad929f87205723cc906d2520630c2e1f20df4cf6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120843
Reviewed-by: Automatic_Commit_Validation_User
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Fix compilation warning of -Wmaybe-uninitialized
Change-Id: I4e6cbe9f5768407b5212d7c3dcfa842560d62748
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120842
Reviewed-by: Automatic_Commit_Validation_User
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Move the register access function to header and make
all register access apis to inline.
Change-Id: I78d23b73edd634145c6f9bee2f0ad08af2e51271
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120841
Reviewed-by: Automatic_Commit_Validation_User
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TPS65090 add mfd sub device of "tps65090-pmic" and
"tps65090-regualtor" which is same.
Remove one of them.
Change-Id: Id02a432cbd240bd9deec9dce6865491afcec6303
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120840
Reviewed-by: Automatic_Commit_Validation_User
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The tps65090 have platform data for subdevs which is
not used any more. Removing this from platform data.
Change-Id: I913b3d5d560f32f6f82ac1b9d933828061339b6d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120839
Reviewed-by: Automatic_Commit_Validation_User
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The regulator of tps65090 is registered as mfd sub device
and hence all regulator should be register in one call
of tps65090 regulator probe.
Fixing this by providing the list of regulator platform data
and registering the regulators in single probe call.
Change-Id: I06600d0bf4dfd62238bed77713ee8abf2afe2371
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120838
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In regulator platform data for tps65090, convert the regulator
init data to a pointer type to have easy support in DT.
Change-Id: I00a88e9f12ce5c55880e5c5084357d495bc99b56
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120837
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Currently the regulator info is stored in the data structure of
device. This avoid to have multiple instance of this driver
as it can corrupt the other instance driver.
Separating driver specific data with device information.
Change-Id: I359f05e07c2d2f4ade216e84a1a37c6dd8d5cb34
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120836
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Renaming regulator enums from TPS65090_ID_* to
TPS65090_REGULATOR_* for better readability.
Change-Id: I402de2069045b97000686e8010897c4a0821a48d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/120835
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
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BUG 1026050
Change-Id: Ide19fd183ee172c84b0d5d2d0382e8ec944f2a87
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/120580
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Chromeos testing includes verifying the lid switch is functional.
While cardhu's don't have lids, this can be tested via the
lid_switch dip switch on the debug board. Add support for the lid
switch via gpio_keys.
bug 1027716
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I7b2e31798b6cfa0715980ddd93dd6b5292ca20d3
Reviewed-on: http://git-master/r/120445
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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change 8843c49092b6ed903e88eded1f1c9b9a7f432dfe introduced
a compliation error if CONFIG_SWITCH is not enabled.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I4b4c547394f424bd90837726b08d9feccd4207de
Reviewed-on: http://git-master/r/120444
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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change 4b70cc537cadc787b748c7c246d703a240b08985 introduced
a compilation error.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I59e54537d9bb4b30e807478e5b7634db0813a739
Reviewed-on: http://git-master/r/120443
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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This change assists automating system wide
touch driver performance.
Bug 928954
Change-Id: Iea21dfea1c31748ce5835652cecc0856c4f4028d
Signed-off-by: Vikas Jain <vjain@nvidia.com>
Reviewed-on: http://git-master/r/118984
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: David Jung <djung@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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For accurate Dots-per-inch computation we need to report height/width for
all cardhu based panels.
Bug 1003707.
Change-Id: I06c5ee077aa82a9ffd958e1cc7c536b445523da3
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/120350
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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To make AE transition smoother, the group hold enable/disable actions
should be added before and after set gain/frame length/coarse time.
bug 1025995
Change-Id: I578b33167e50f59d0d9a88a0e16fac0c5425b6b6
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/119835
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Abhinav Sinha <absinha@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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DSI clock gating requires a valid value for aggressive suspend.
Change-Id: I6847fb94e2db899ff251e16f045fa76b8ad2e737
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/118733
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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