Age | Commit message (Collapse) | Author |
|
When a Tegra GPIO is used as an IRQ, it should be enabled as a GPIO (so
the pinmux module isn't driving it as an output) and configured as a GPIO
input (so the GPIO module isn't driving it as an output). Set this up
automatically whenever an IRQ is requested, so that users of IRQs don't
need to do this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Change-Id: I5159fe099e483145977ecdba63a2bc4302105932
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/118658
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
|
|
Create all resource require for spi transfer before registering
spi master as the spi communication is possible during the
registration.
bug 1023003
Change-Id: I1f77385866f358effeffb89c6af53a6a2f1c8738
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/118267
|
|
bug 1010916
Change-Id: I6d01e8d19be1583b7454cc731f8f30ec58eec672
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/117338
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
As part of this patch following changes are made:
1. HSIC regulator enable/disable is added
2. HSIC phy close is added.
bug 1010916
Change-Id: I4607a3ac13417a201b62708c6fef5d1117dfdcc5
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/116984
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Remove the ad-hoc scale factor of final latency allowance.
Scale the fifo size to pretend that our FIFO is only as deep
as the lowest fullness we expect to see.
Bug 995270
Change-Id: I78ed2246d2031a2303f81a19fe05c95572a692b0
Signed-off-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-on: http://git-master/r/118816
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Graziano Misuraca <gmisuraca@nvidia.com>
Tested-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
|
|
Bug 1022877
Change-Id: I9200d3345a933ab0ccb31f833184ee4a621228f0
Reviewed-on: http://git-master/r/118774
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
|
|
Creates a miscdev at /dev/tegra-throughput which gl will use to set a
target frame rate. In addition it receives notifications from dc on
flip events. On each notification the percentage ratio of the actual
frame time to the target frame time is calculated. In subsequent
changes this ratio will be reported to other modules as a throughput
hint.
Bug 991589
Change-Id: Ieaa2b2755b63d2d071de31e3ef819d4c3b51a956
Signed-off-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-on: http://git-master/r/116865
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
|
|
1) Enable bsea/vcp clocks for Audio support by ioctl
2) Send kernel event NVE276_OS_INTERRUPT_APP_NOTIFY
to user space
3) Suspend Resume support
bug 964514
Change-Id: I72fb790baa093b4bcd99a128c886dc049fa0fbb6
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/108493
cherry picked from commit 4432c5fa5e9072ff019d994f3bc8239bd34ddad1
Reviewed-on: http://git-master/r/114589
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
page list array size greater than PAGE_SIZE should use vmalloc.
Change-Id: Ic03668ba7ff716bfb3cc08aaef5f86214ee0a9df
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/116875
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit ddacaacd2a9fff10187e026eaa0d898694eeb95f)
Reviewed-on: http://git-master/r/118194
|
|
Any alloc request, with size greater than PAGE_SIZE, to
slab allocator is not guarnateed to succeed, even though
enough memory is available, as memory can get fully fragmented
over the time.
This allows finding the slab allocator requests with size
greater than PAGE_SIZE early and avoid finding issues much late
in product life cyle.
Change-Id: Ibf13e626a671d41569415a56e775ac5e96b90ba3
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/116855
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 604a65f8e3c9472886b48b1a287f78f11235d1ce)
Reviewed-on: http://git-master/r/118193
Reviewed-by: Alex Waterman <alexw@nvidia.com>
|
|
Even though config option is enabled, the fault injection is not
enabled by default. It need to be enabled through debugfs interface
during test.
Change-Id: Iaba52d27a97bc4ecdc04e79e29ab25e03438bbc0
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/116851
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 892f0239562de8cd5a6a93deeaec826e45b368b0)
Reviewed-on: http://git-master/r/118192
|
|
Read the RUN bit and update it properly.
Remove unused variable.
Change-Id: I1df5dc99ce40e2ca15f0ade28d156a7262467519
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/117958
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
CONFIG_TEGRA_CBUS_CLOCK_DIVIDER=1
* Disabled CONFIG_TEGRA_SE_ON_CBUS
So that se clock can be derived from clocks
other than which are driving cbus.
* Changed CONFIG_TEGRA_CBUS_CLOCK_DIVIDER=1
So that pllc can run at same frequency as
cbus is running at.
Bug 978870
Change-Id: I66898e3f16adad3625efb1a484b438c168419a68
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/117995
(cherry picked from commit b5d42b0432119ddebcc38f6f40761e3dea3d9f6d)
Reviewed-on: http://git-master/r/117312
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Tegra 3 version: TF_TEGRA3_AB01.11.35578, TF_TEGRA3_AB01.11p1.35578
TF_TEGRA3_AB01.11p2.36386, TF_TEGRA3_AB01.11p3.36518
TF_TEGRA3_AB01.11p4.36577, TF_TEGRA3_AB01.11p5.36677
1)Add memory profiling tool to debug secure services's stack and heap
2)Add support to enable dynamic clock gating feature in PL310 register
3)TEE client API at kernel level
4)Stable FIQ debugging (SDK ver 1.09)
5)clrex stability change
6)GIC controller stability settings
7)Fix LP1
8)Fix floating pt support
Bug 1021831
Change-Id: I5c2a693a27dc591b62863aa0fe4ff65163e67aba
Signed-off-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-on: http://git-master/r/117515
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-by: Marvin Zhang <mzhang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
When EHCI host controller driver examines qh/qtd descriptors, driver
might see stale data in cache on some ARM CPU. This patch introduces
two helper functions, ehci_sync_qh() and ehci_sync_qtd(), to
invalidate cached descriptors so that driver can always read
up-to-date descriptors from memory.
Bug 1005403
Change-Id: I2345bda7dfe29c5fe7f9550066b518cd6624d263
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/116406
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: ChihMin Cheng <ccheng@nvidia.com>
Reviewed-by: Joy Wang <joyw@nvidia.com>
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
|
|
CTS test fails if there are write permissions for user.
Hence reduce permissions for test_pattern.
bug 1001925
Change-Id: I769ff501671182965a8b699d7bbd580400ccd1c1
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118871
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Add master/slave configurability support interface for
all codecs. Currently, complete slave mode functionality
is added only for MAX98088 and WM8903 codec only. By
default, board parameters will set i2s master mode for
all codecs.
asoc: tegra: utils: add support for i2s master/slave mode.
Support for i2s in master or slave mode is made generic by
obtaining information from platform data.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: Ided0fcefb6cdb124b78aab423bfd8c7dccd4bf6e
Reviewed-on: http://git-master/r/111553
(cherry picked from commit bb1ad7222f9c75424a45976d16de418bc927dc04)
asoc: tegra: wm8903 machine: add support for i2s in slave mode.
Add support for i2s as slave for playback and capture use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I1f6b73a0a1b690ecd311b0ff4107aadbb1f037d8
Reviewed-on: http://git-master/r/111472
(cherry picked from commit 0434f8ba74adefe60597d95d30a455b9b2ece9b8)
asoc: tegra: wm8753 machine: add support for i2s in slave mode.
Add support for i2s as slave for playback and capture use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: Ib0596955cd0c6ac5ec57b0f3c6ecc9e4ed41268c
Reviewed-on: http://git-master/r/113208
(cherry picked from commit 0fc6b5e3a98d9f8866f73d7914b0c590334ce862)
asoc: tegra: aic326x machine: add support for i2s in slave mode.
Support for i2s in slave mode is added for playabck and capture
use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I41f6459765f075703ad7f5f8dc9d4628dd853820
Reviewed-on: http://git-master/r/112874
(cherry picked from commit 9a89ede36a1dca6f53250444e819443fb6f28d09)
asoc: tegra: rt5640 machine: add support for i2s in slave mode.
Add support for i2s as slave for playback and capture use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I850ec62149b8a8d244445b70658b632dbce06558
Reviewed-on: http://git-master/r/112878
(cherry picked from commit 1d51561c8edf47d8557a825450a48ee8743a185b)
asoc: tegra: max98088 machine: add support for codec i2s as slave.
Add support for codec i2s as slave during voice Call.
(Bug 998682)
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I8fc54d367e9acd5417d270869cb5a9398b3b527f
Reviewed-on: http://git-master/r/110559
(cherry picked from commit 78a490867e131b1cc892094ddd844c2b892cafb6)
asoc: tegra: max98095 machine: add support for i2s in slave mode.
Add support for i2s as slave for playback and capture use cases.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: I80944d403be94c55ad2ce31aea921d80ea7c088a
Reviewed-on: http://git-master/r/112875
Reviewed-on: http://git-master/r/118080
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
|
|
Add configurability support for i2s parameters accross all board.
ARM: tegra: board: add i2s params
Add configurability support for i2s parameters accross all board
files.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: If58788b5126280b7e1dc8c66e9c96d0e71229b5e
Reviewed-on: http://git-master/r/111476
(cherry-picked from commit cac52867b0a0cad3b3c5bf46f08b0b94d0be2e02)
ARM: tegra: include: add configurability support for i2s params.
Add several variables for i2s configuration in platform data
structure.
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Change-Id: Iea3930f308954471f170513234c2c02a8559ef98
Reviewed-on: http://git-master/r/111473
(cherry picked from commit 35e749770f6046fc82860f1152db2f5f579b9508)
Reviewed-on: http://git-master/r/118071
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
|
|
SW WAR implementation for h/w issue observed on all tegra platforms
Adding a dTD to a Primed Endpoint May Not Get Recognized
TD freeing will be delayed until next TD is completed
Bug 1002166
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/109562
(cherry picked from commit 8603480606af20444ed91e3010a22cc02edacb78)
Change-Id: I875d06eb2db78a18858590645df631478f3201bb
Reviewed-on: http://git-master/r/116972
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Using printk before CPU online can make hang or kernel panic.
Bug 1017539
Bug 1019700
Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/117924
(cherry picked from commit 9d7426fdc7e8c70079d37f529517932370355ac6)
Change-Id: Ib55ee06dcaf92af63f8d72ee74939c72dda4296c
Reviewed-on: http://git-master/r/118141
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
|
|
During early suspend, LCD_RESET output needs to be
turned low. 3mW power savings during display Off and
1mW on lp0.
Bug 969716
Bug 990845
Change-Id: Ia773f0411452fad3eddccb5f293d7f32c4a46a56
signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
(cherry picked from commit 87322ed7e125ae1ac8d05b623c66f6ab7ea40881)
Reviewed-on: http://git-master/r/114057
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
The notifiers now properly fire on every cluster switch
Change-Id: I381301cf62f25b49532326cc7759696c7f6797b7
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/118376
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
|
|
There is race between acm_suspend and acm_read_bulk_callback. Host may
receive bulk transfer right before suspend. The packet will be discarded
if this urb is killed in acm_suspend. This patch checks the actual length
of urb and processes it in this case.
Bug 996268
Signed-off-by: Steve Lin <stlin@nvidia.com>
Change-Id: Ief2b42708160b67903f976ec60da825d46c4720b
Reviewed-on: http://git-master/r/117135
(cherry picked from commit af3e96c987fbae8a135d1ff18872b9c32e09b67f)
Reviewed-on: http://git-master/r/118105
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
|
|
Power improvement for OS IDLE DISPLAY OFF, audio use cases.
Governor is changed to conservative governor when panel is
suspended. Default governor (interactive governor) is restored
when the panel resumes (when user presses the power button).
Seeing a power improvement of 22mW (42mW/64mW) for os idle
display off and 30mW (57mW/87mW) for audio playback use cases
Bug 1002294
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
Change-Id: I06d2bca654bc8ff96fdf18d81a98c6e4ec838235
(cherry picked from commit 7002c3fe264163b6be38cf9e24bdf137f44ed69f)
Reviewed-on: http://git-master/r/118196
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
This is a copy of p1852 defconfig with usb support disabled
Bug 989824
Change-Id: I40089049a35c18782b2e211b63d20fafe8fb9ee8
Reviewed-on: http://git-master/r/114138
Tested-by: Sanjay Sancheti <sasancheti@nvidia.com>
Reviewed-by: Amlan Kundu <akundu@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
(cherry picked from commit a147ad51d486d4aea9a73a11d4c14a13ad2121bb)
Reviewed-on: http://git-master/r/118011
Reviewed-by: Automatic_Commit_Validation_User
|
|
1. Initialize PCIe on every resume whether device
is dock/undocked.
2. Poweroff PCIe if Poweron failed at any stage.
3. Make PCIe initialization robust so that it is
successful anytime dock is connected i.e while
in LP0 or after it's exit or else.
Bug 1020949
Change-Id: I79cd75f2bf7164a9b5c8906a370364dba5183ac8
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/117532
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
This CL handles the following:
1. Prevents setting of wrong date in tps6591x_rtc_set_time().
For example the following case was not handled in rtc driver:
if hwclock command wanted to set 31/Dec/1999 then our RTC driver was
setting the date to 31/Dec/2099 and later on when hwclock read the
date back it was getting a invalid date.
Also, the hwclock command can only handle date upto the year 2038.
2. Sets STOP_RTC bit to one when the driver is initialized
Bug 1012914
Bug 1017647
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: If8abfebe3ee6da05498deb38d7247ab265729c0c
Reviewed-on: http://git-master/r/117298
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
-enable warnings as errors compilation flag
bug 949219
Change-Id: I47e2df835985f341ebccdad95f53b4e6f7763e39
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118017
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
|
|
Flash version modem need to do reset with gpio
and start enumeration on falling edge of ap wake.
Remove unused variable enum_delay_ms.
Bug 1003141
Change-Id: Ie43c693c3fead5c89b30c1b97cf1f3e4c05e5588
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/116886
Reviewed-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Chang <kenc@nvidia.com>
Tested-by: Ken Chang <kenc@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
|
|
Fixed bug using Tj temp to update thermal zone,
It should use EDP temp to update it.
bug 1007726
Change-Id: Ibcf2520a4bad7dc977add0b5c855681d2667a7c2
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/117250
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Tested-by: Joshua Primero <jprimero@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
|
|
Unlike SDSC and SDHC, for SDXC cards CMD20 needs to be
issued to meet the class performance for speed class
recording. Adding mmc_speed_class_control() which should
be used by an AV recording app/utility before starting
recording on an SDXC card.
Bug 969360
Reviewed-on: http://git-master/r/39394
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/115685
(cherry picked from commit 04b8d1287a95e1882d956cdf7997015350408a3c)
Change-Id: Id567effb476ee580de3d49b70201ebae5a13360a
Reviewed-on: http://git-master/r/118038
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
host1x clock limit is already imposed by tegra3_dvfs.c and need not
to be explicitly set for p1852 SKU. Hence, removing the clock limit
duplication.
Bug 925358
Change-Id: I5e936f46ad64b0335561e321d61c4e8b13d7f765
Reviewed-on: http://git-master/r/106637
(cherry picked from commit ccaa3515121b637ce3870bf73f2402846670b63c)
Signed-off-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-on: http://git-master/r/118130
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
|
|
Added:
/sys/kernel/tegra_cap/cbus_cap_level
/sys/kernel/tegra_cap/cbus_cap_state
Change-Id: I06a32ea4001f1f644da4f230870f39523f9b6df3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/116874
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
|
|
Change-Id: I4d15ef7a9089bf3519155d9ccf5192bf3dcf0bd6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/116873
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
|
|
Added generic busy/free notifiers that the driver can invoke to let the
governor know that it cannot process further core online/offline
requests (invoked in our case whenever we switch to the LP cluster).
Change-Id: I5e3f7f28f38806a7f87050e8d0c8d2f2cf7521aa
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/114807
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
|
|
NVMAP_CONVERT_CARVEOUT_TO_IOVMM is only available for IOMMU less SoCs.
This was introduced by:
commit b8b0b4c42fc77d94b8deadaa46f795784f3bbb5e
video: tegra: nvmap: Make IOMMU/IOVMM selectable in Kconfig
Bug 1017112
Change-Id: I2a6f101b15085ece600f77690bc77adc042eb29f
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/117976
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Meghana Kankarej <mkankarej@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
|
|
The one shot thread will clock gate the modules periodically. This will ensure
relevant paths in dc driver have an active dc clock and dsi host.
Bug 1013172
Change-Id: Ibb505e35044f31405c06cb9fa0d6fdf78aafd4a6
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
|
|
1) Returning in irq after remote wakeup resume handled
in ehci irq function.
2) Removed the unused variables.
Bug 889618
Change-Id: I9a1fd25c753a53462bf7742065fa618caae501ab
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/111192
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
In ULPI phy first SOF after Reset may be corrupt. Fixing this issue.
Bug 1012500
Change-Id: I45ee1b4c8e0a29298c94813030d22291b79e417b
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/117635
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Update Tegra3 AP37 dvfs table entries.
Bug 841336
Reviewed-on: http://git-master/r/115509
(cherry picked from commit fda92ca92eb421b554fcb50117c92ec59b4b515a)
Change-Id: Ib15ba4731f0770a8af2272c51a90c7dc0fd8f6b9
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117926
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
|
|
Current max USB bus current limit is 1.5A, add up to 2.25A support based
on TPS8003x register documentation.
BUG 1014876
Change-Id: Iae23e2473d9a7b52dac2d92029af03729e1e8a11
Reviewed-on: http://git-master/r/114801
(cherry picked from commit 04638c07f0b5a4ecea405ed914e144004b60877d)
Reviewed-on: http://git-master/r/116115
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
- host1x_save_context() explicitly updated the ref count on context
- with the re-factoring of nvhost_job code, nvhost_job_alloc()
takes a ref count on context
- this caused the explicit ref count in host1x_save_context()
redundant and lead to memory leak. hence remove it
Bug 1015924
Change-Id: Id18c74412e8659b60288700972690d1b895de4c1
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/116409
(cherry picked from commit c98d0cfbbdacdda8e540b5d9e0d513e279b3b2f5)
Reviewed-on: http://git-master/r/117326
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Disable built in host support on OTG port
for Whistler and Enterprise boards.
Bug 1012273
Bug 947300
Change-Id: I88574c37795ee204e0cc67ed71f424443950494f
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/117307
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Tegra 2 requires regulator to be on during lp0
Bug 1012273
Change-Id: I750892fd391be327e617c70b7da4c984019a32fa
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/116743
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Modify the kernel logger to record the UID associated with
the log entries. Always allow the same UID which generated a
log message to read the log message.
Allow anyone in the logs group, or anyone with CAP_SYSLOG, to
read all log entries.
In addition, allow the client to upgrade log formats, so they
can get additional information from the kernel.
(cherry picked from android common tree commit
d993be54c164ea473816f04745ae4f0504dbccfb)
NV Bug 1019928
Change-Id: Ie48fb614b43c9302a07ad2673b78dd8749b492b6
Signed-off-by: Nick Kralevich <nnk@google.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/117175
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Set SCLK floor to 80MHz for Tegra3 CPU mode switch.
Bug 933984
Change-Id: Ibbb0a24cd763c11b3cead60efe26096bae3e6ddd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/106035
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Tested-by: Jay Cheng <jacheng@nvidia.com>
(cherry picked from commit 842f7ddb7a188e36a2ff153dc0d8ed38b5e28319)
Reviewed-on: http://git-master/r/113981
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
|
|
Enable regualtor REGULATOR_TPS51632 which is used
for cpu regulator.
Change-Id: I5ba78608e6c5480e8b0d8d54ee59c9bba0b58428
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117602
Reviewed-by: Automatic_Commit_Validation_User
|
|
Bug 987713
Change-Id: I4e6fb47007e337ec992d5ee58510c664957b448d
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/117592
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
This was accidently reverted to be set to max with commit 9774bbe31a.
With 2d clock at max, there is a hit on video power numbers.
Change-Id: Iaf73c6f7800d56229d35fb6a2b00f61d460e986d
Reviewed-on: http://git-master/r/117589
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
|
|
This driver supports voltage regulator driver for TI TPS51632
voltage regulator chip. The TPS52632 is 3-2-1 Phase D-Cap+ Step
Down Driverless Controller with Serial VID control and DVFS.
This device has only one voltage output.
bug 978821
Change-Id: I73f3fd696bab5267e76e788fb4b5bf8d9f10b5b5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117381
|