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2014-05-12gpu: nvgpu: Register as subdomain of host1xTerje Bergstrom
Add gk20a as a sub power domain of host1x. This enforces keeping host1x on when using gk20a. Bug 200003112 Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407543 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-05-12video: tegra: host: Export subdomain registrationArto Merilainen
This far the subdomain registration has been allowed for drivers that use nvhost_acm framework. However, gk20a handles its own power domain bu it needs to register it as a subdomain of host1x. This patch exports necessary functionality in public header. Bug 200003112 Change-Id: Ie3457345c101329cadac4ef8aa71e448629a419b Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407542 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2014-05-12video: tegra: isolate tegra_fb windowMichael Frydrych
tegra_fb has been using dc windows directly instead of keeping its own copy, just like dcext does. That resulted in flips from dcext driver owerwriting tegra_fb window attributes. bug 1356757 bug 1495342 Change-Id: I9f3a162e9f0864e31f987977c7d7f1ad1a7d48ee Signed-off-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-on: http://git-master/r/403698 (cherry picked from commit e3060e27c0185d9e2401758bb4c4264dd38c81df) Reviewed-on: http://git-master/r/407487 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-05-12video: backlight: add tegra-dsi-backlight driverRoger Hsieh
Some DSI panels require changing backlight intensity through DSI command. Create a backlight driver hook to Tegra DSI to achieve these panels. Bug 1453606 Change-Id: I1c7466c01cde101e8e8346cb27371d35ff48ed58 Reviewed-on: http://git-master/r/380396 (cherry picked from commit 8c5027c7a3c9b6f3d94e85b22cec0351439c03ad) Signed-off-by: Roger Hsieh <rhsieh@nvidia.com> Reviewed-on: http://git-master/r/407436 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-05-12mmc: sdhci: set_ios: delayed clock gate flushBitan Biswas
Before sdhci set_ios call we need to flush outstanding delayed clock gate work. Else, it could cause unintended clock gate resulting in hard hang. - unconditionally cancel delayed clock gate work since sometimes mmc->card->type is uninitialized. bug 200000303 Change-Id: I208a8a15dfd4f8d8ae1614d0fadee6deb5a55bb0 Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-on: http://git-master/r/407407 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2014-05-12PM / tools: new tool for suspend/resume performance optimizationTodd E Brandt
This tool is designed to assist kernel and OS developers in optimizing their linux stack's suspend/resume time. Using a kernel image built with a few extra options enabled, the tool will execute a suspend and will capture dmesg and ftrace data until resume is complete. This data is transformed into a device timeline and a callgraph to give a quick and detailed view of which devices and callbacks are taking the most time in suspend/resume. The output is a single html file which can be viewed in firefox or chrome. References: https://01.org/suspendresume Signed-off-by: Todd Brandt <todd.e.brandt@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> (cherry picked from commit ee8b09cd60bfe45d856e7c3bef8742835686bf4e) Change-Id: Ie4bf1a39cb854be70dbe52991ea0bfcf15ae2339 Reviewed-on: http://git-master/r/406861 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2014-05-12Arm: Tegra: vcm30t124: DT support for SD/MMC devicesRaveesh Kote
- Add support for tegra_sdhci devices in tegra124-soc.dtsi with status disable - Add SWGID for SDMMC controllers as nvidia,memory-clients property - Enable sdhci devices in tegra124-vcm30t124.dts and add platform data - Remove the pdata from vcm30_t124-sdhci.c - Add AUXDATA support in board file Bug 1500533 Bug 200002029 Change-Id: I555934c4824cef55130b236148c9c1e190fda9bf Signed-off-by: Raveesh Kote <rkote@nvidia.com> Reviewed-on: http://git-master/r/398713 (cherry picked from commit e025e0d9850183fc267c9f2f472f688542211c8e) Signed-off-by: Phoenix Jung <pjung@nvidia.com> Reviewed-on: http://git-master/r/406240 GVS: Gerrit_Virtual_Submit Reviewed-by: Sandeep Trasi <strasi@nvidia.com> Reviewed-by: Vijaya Bhaskar <vbhaskar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2014-05-12arm: tegra: vcm30t124: Update DT for android kernelPhoenix Jung
Add DT entries for SATA and sdhci Bug 1500533 Bug 1440706 Change-Id: I6def2df9db16b454a33e9e236d3005dddc19057c Signed-off-by: Phoenix Jung <pjung@nvidia.com> Reviewed-on: http://git-master/r/403980 (cherry picked from commit e4c5d49dace7a6e36d8dda3e3f633df9fa374e85) Reviewed-on: http://git-master/r/405770 GVS: Gerrit_Virtual_Submit Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com> Reviewed-by: Sandeep Trasi <strasi@nvidia.com> Reviewed-by: Raveesh Kote <rkote@nvidia.com> Reviewed-by: Vijaya Bhaskar <vbhaskar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2014-05-12video: tegra: gk20a: Disable gfx before save zbcSantosh Katvate
This change disables gr engine before calling into pmu for saving zbc and re-enables once it is finished. Looks like NV_PPWR_PMU_BAR0_FECS_ERROR_CODE_PRI_TIMEOUT error during access of NV_PLTCG_LTCS_LTSS_DSTG_ZBC_COLOR_CLEAR_VALUE happens because of active concurrent memory traffic. Bug 1489850 Change-Id: I60eacd718480a296f5a46438e18a519c7457f58a Signed-off-by: Santosh Katvate <skatvate@nvidia.com> Reviewed-on: http://git-master/r/398398 GVS: Gerrit_Virtual_Submit (cherry picked from commit 42931088a3a1944359be61ebe39c646b41f73ee6) Reviewed-on: http://git-master/r/402779 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com>
2014-05-12video: tegra: host: Fix race in sync dumpArto Merilainen
The code assumed that the sync framework will not call nvhost specific functions until the pointer has been returned to the caller. In most cases this is a fair assumption, however, if the sync dump was in progress at the same time we created a new fence, we may try to print out fence specific data before it has been created. This function adds necessary check to nvhost_sync_pt_value_str() which is the only function suffering from this issue. Bug 200001909 Change-Id: Ieaf8352eb48aedbb984e05caec241aca3e593810 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/407592 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2014-05-12video: tegra: dsi: improve VBLANK command latencyAllen Chang
club short packet VBLANK commands into single transmission Bug 1488678 Change-Id: Ia4d7a8808aff36cb6d07e36cb261ccd57224e95b Signed-off-by: Allen Chang <allchang@nvidia.com> Reviewed-on: http://git-master/r/388149 (cherry picked from commit fc8a63d72f68305a8c5b0229d214744e03be6add) Reviewed-on: http://git-master/r/407401 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-05-12iio: adc: palmas: get proper device dataLaxman Dewangan
Get proper device data from device pointer on different platform driver callbacks. bug 1493891 Change-Id: I4402e60590d4edf26d67360c97e2f8d163bdd4c8 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/392295 Reviewed-on: http://git-master/r/406900 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
2014-05-12usb: gadget: tegra:cancel non-standard charger workRakesh Bodla
When there is series of gadget_connect and gadget_disconnect calls, non standard charger detection work is getting sheduled. This is being executed due to there is no time window observed to see setup packet.Fixing this by canceling the work appropriately. Bug 1477692 Change-Id: I3460675c0ccbd251e3c3be217792d5a2fd44f85d Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/406351 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-05-12input: cfboost: Explicitly turn on the GPUArto Merilainen
Currently we inform the QoS that the GPU should be powered, however, we need to also restore the state of the GPU. This patch adds explicit pm_runtime_get/put_autosuspend() calls to ensure that the GPU is really initialised immediately. Bug 1506585 Change-Id: I1f08ca072f4a7ef038bb4e8e12323846480c6a12 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/403770 (cherry-picked from commit 22665ef35d4d70dda8763d83ad866bc4b145fd11) Reviewed-on: http://git-master/r/405231 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2014-05-12arm: tegra: sysedp: Update TN8 A03 battery dataSteve Rogers
Bug 1435950 Change-Id: Ie9265daf910f43a8d43aa41e426c86d8cf43428a Signed-off-by: Steve Rogers <srogers@nvidia.com> Reviewed-on: http://git-master/r/406000 (cherry-picked from commit 8f7922b1d4ef873af289899cc81e55fa64981e93) Reviewed-on: http://git-master/r/407081 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Timo Alho <talho@nvidia.com> GVS: Gerrit_Virtual_Submit
2014-05-12power: bq2419x: read fault status register two timesLaxman Dewangan
The fault status register should be read two times to get correct status of fault and clearing it. So read this register two times and ORed the status to get correct fault status on current interrupt cycle. Change-Id: I2c392d9473952a126ffe5d739a54ebf200e3181f Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/404995 Reviewed-on: http://git-master/r/406973 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-05-12ARM: tegra: register PMIC WDT for TN8 platformsLaxman Dewangan
Enable PMIC WDT for TN8 platforms. Set WDT period as 64 seconds. bug 1486603 Change-Id: I1080d227f4ae4d57e48e0e4d75a6b22721a380a3 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/387191 Reviewed-on: http://git-master/r/406972 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
2014-05-12ARM: tegra: enable Palmas Watchdog driver.Laxman Dewangan
bug 1486603 Change-Id: Ib593ab86da253168d838bed014646351d456f01e Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/387190 Reviewed-on: http://git-master/r/406971 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
2014-05-12watchdog: palmas: add support for DTLaxman Dewangan
Add DT supports for the palmas watchdog. bug 1486603 Change-Id: I1f22b3f1eccab87c28f3f0726dcda19af6f584d1 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/387189 Reviewed-on: http://git-master/r/406970 GVS: Gerrit_Virtual_Submit
2014-05-12arm: tegra: tn8-ffd: Seamless display transitionHarry Lin
Keep LCD regulator ON and leave the LCD reset pin as is during boot. Set default backlight = 60% (follow the same as TN7) to have better battery balance. bug 1454698 Change-Id: I10db786e1374403d7417b822b71600ef9454372f Signed-off-by: Harry Lin <harlin@nvidia.com> Reviewed-on: http://git-master/r/386974 (cherry picked from commit e37c685d8c19e0475c8a15413775a836d85d20f2) Reviewed-on: http://git-master/r/406385 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Robert Shih <rshih@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2014-05-12security: tlk_driver: Allow affinity changingArto Merilainen
Currently the driver assumes that smc requests come from a thread that already has possibility to set cpu affinity, however, kernel threads by default do not have this possibility. Turning on devices is sometimes done in kernel threads and in GPU case we may need to change i.e. the VPR parameters. Therefore, ensure that the thread can change affinity. Bug 1506585 Change-Id: Ie879f6b2f7d8cb3bc324b5d7a391dd6e8cf9b3cf Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/405915 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2014-05-12video: tegra: dsi: call usleep_range in DSI_DLY_MSRoger Hsieh
DSI_DLY_MS calling mdelay holds cpu for ms level then causes noticeable latency. Replaced by usleep_range for better task scheduling and responsiveness. Bug 200001850 Change-Id: Ib3dcb99fefcfd997f71deadf000029bf63362dd2 Signed-off-by: Roger Hsieh <rhsieh@nvidia.com> Reviewed-on: http://git-master/r/404996 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> GVS: Gerrit_Virtual_Submit
2014-05-09Merge commit 'refs/changes/86/405286/2' of ssh://git-master:12001/linux-3.10 ↵Mandar padmawar
into promotion_build
2014-05-09media: tegra: nvavp: Handle init race conditionJitendra Kumar
Call to nvavp_init from tegra_nvavp_open and tegra_nvavp_runtime_resume leads to race condition. This change is to handle it properly. Bug 1487327 Signed-off-by: Jitendra Kumar <jitendrak@nvidia.com> Change-Id: I5b9981149e6d84e02951d9c9b7f08b1ff44d82fd Reviewed-on: http://git-master/r/404304 (cherry picked from commit 476f2f2b863365979cc3429f369c072720b8c41f) Reviewed-on: http://git-master/r/406909 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-05-09gpu: nvgpu: Allow sysfs write only to rootTerje Bergstrom
Allow write access only to root to gk20a sysfs files. Bug 200001241 Change-Id: Ibafb84ed703dd32743b520e01a57ffc82f8b4ac4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/405028 (cherry picked from commit dc0f977fe8fcacd260bf61ab658c166b004c1fcd) Reviewed-on: http://git-master/r/406898 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-05-09ARM: tegra: TN8: Fix front sensor facing infoFrank Chen
Setting correct direction information for TN8 ov5693 front sensor. Bug 1507283 Change-Id: Ib64e8ae1e174dcd921a096e4852a6c90511a2c64 Signed-off-by: Frank Chen <frankc@nvidia.com> Reviewed-on: http://git-master/r/403056 (cherry picked from commit d2b0a0aed5e431b5b705019d801bacbc6acf436e) Reviewed-on: http://git-master/r/406691 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-05-09media: tegra: nvavp:Close avp properly for secure playbackPraveen Kumar Reddy M V
1.For secure content playback clock_disable_work() is cancelled in nvavp_force_clock_stay_on_ioctl() call when clock.state is true and clock_disable_work() is not getting scheduled again after the playback is completed. 2.Because of this nvavp->clk_enabled is true even after playback is completed and now if we allow system to enter LP0 state, system will not enter LP0 state due to nvavp device suspend failure. 3.To fix the issue, clock_disable_work() is scheduled again in nvavp_force_clock_stay_on_ioctl() call when clientctx->clk_reqs becomes zero. Bug 1505948 Bug 1500665 Bug 1503852 Change-Id: I5c6d1a4a7cac3cf369424dde884558e86c4b8e05 Signed-off-by: Praveen Kumar Reddy M.V. <pkreddy@nvidia.com> Reviewed-on: http://git-master/r/403575 (cherry picked from commit 96fe09b2abd786a2e7c442f373559bcc2651acec) Reviewed-on: http://git-master/r/405695 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-05-08ARM: DT: TN8 A03: update power on/off scriptsCharlie Huang
the actual gpios used in the power sequences should be 219 & 222. bug 2000002437 Change-Id: Ife9cda5798db2f6dd5c6e54264a7b0caaa2f0f8c Signed-off-by: Charlie Huang <chahuang@nvidia.com> Reviewed-on: http://git-master/r/405965 (cherry picked from commit 305447da5a3278bfeab184ad4c6f3477a19e1485) Reviewed-on: http://git-master/r/406515 GVS: Gerrit_Virtual_Submit Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2014-05-08arm: tegra: sysedp: Update AP+DRAM table for T132Timo Alho
Bug 1469388 Change-Id: I54cf4e56b0ee7041697a5bf373e9012bff789dc1 Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-on: http://git-master/r/404025 (cherry picked from commit 54ff9f73e27a7d61f01a92bd8d887b9c4fc43ebe) Reviewed-on: http://git-master/r/406403 GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2014-05-08sysedp: tn8: enable SW feedback for battery OC throttlingTimo Alho
* Enable battery OC hardware throttling on E1971 platform * Enable SW feedback loop on battery OC throttling on all TN8 platforms Bug 1511092 Change-Id: Iedf95e6b139661d5577519728a0fa781b525a341 Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-on: http://git-master/r/406349 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-05-08arm64: mm: remove swtch to ASID0 in context swtchRohit Khanna
Removing switch to ASID0 [1] in kernel thread switch as in aarch64 this is not required since the TTBR and ASID are updated together. Bug 1506465 Change-Id: I7989dd74e79eb2305c962891ca63afef4fbeb853 Signed-off-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-on: http://git-master/r/401699 Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: Nickolas Fortino <nfortino@nvidia.com>
2014-05-08ARM: tegra: disable active discharge for cpu/core/gpu rail for T132 platformsLaxman Dewangan
Disable active discharge on idle for cpu, core and gpu rail for Palmas based T132 platforms. The active discharge will be enable on suspend and shutdown. On resume, it get disabled again. bug 1454238 Change-Id: I66626de978418eff046fd5d39eff054c4cbd4dd2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/406341 GVS: Gerrit_Virtual_Submit
2014-05-08regulator: palams: implement active discharge configuration for idleLaxman Dewangan
Add support for disable active discharge configuration on idle state from platfrom configuration. The active disachrge will be active on suspend and shutdown. bug 1454238 Change-Id: Id22c446ef2ba4ac7db0daf5973bb56cad5e9c94c Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/406340 GVS: Gerrit_Virtual_Submit
2014-05-07arm: tegra: thermal: clean up fuse check apisDiwakar Tundlam
Allow fuse check api to be called only to check the fuse revision. Bug 1429685 Change-Id: I0370f237c4562814af0f41a162bccff2b3db5371 Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-on: http://git-master/r/405474 Reviewed-on: http://git-master/r/405990 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-05-07ARM: tegra: configure battery parameters for Yoku5200 for T132 platformsLaxman Dewangan
T132 platforms Bowmore and P1761 uses the Yoku 5200mA battery. Add thermal profiling as: T <= 0: Charging disabled by charger. 0 < T <= 10: 1040mA/4352mV 10 < T <= 15: 1040mA/4352mV 15 < T <= 25: 2600mA/4352mV 25 < T <= 45: 5200mA/4352mV 45 < T <= 60: 2600mA/4200mV 60 < T : Charging disabled by charger. Change-Id: Ic41e66c2a28e79cb7cd89e86767bd99e598a3e76 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/405880 GVS: Gerrit_Virtual_Submit
2014-05-07arm: tegra: tn8: Set default brightness to 75%Robert Shih
Set default brightness to 75% to align with bootloader and Android setting. bug 1454698 Change-Id: I296ebd7f5332ae212904739d4020fb1332b15af5 Signed-off-by: Robert Shih <rshih@nvidia.com> Reviewed-on: http://git-master/r/398152 (cherry picked from commit 65b93eb0e00342c45a29997daed8272c556a8082) Reviewed-on: http://git-master/r/405676 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-05-07arm64: fix !CONFIG_COMPAT build failuresMark Salter
Recent arm64 builds using CONFIG_ARM64_64K_PAGES are failing with: arch/arm64/kernel/perf_regs.c: In function ‘perf_reg_abi’: arch/arm64/kernel/perf_regs.c:41:2: error: implicit declaration of function ‘is_compat_thread’ arch/arm64/kernel/perf_event.c:1398:2: error: unknown type name ‘compat_uptr_t’ This is due to some recent arm64 perf commits with compat support: commit 23c7d70d55c6d9: ARM64: perf: add support for frame pointer unwinding in compat mode commit 2ee0d7fd36a3f8: ARM64: perf: add support for perf registers API Those patches make the arm64 kernel unbuildable if CONFIG_COMPAT is not defined and CONFIG_ARM64_64K_PAGES depends on !CONFIG_COMPAT. This patch allows the arm64 kernel to build with and without CONFIG_COMPAT. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Change-Id: Id10c0578d070f8bc17db2f3edeccdced6c536db5 Reviewed-on: http://git-master/r/403035 (cherry picked from commit 5469a5f15943b373459c91a43112533abd930dc8) Signed-off-by: Ryan V. Bissell <rbissell@nvidia.com> Reviewed-on: http://git-master/r/405387 GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2014-05-07ARM64: perf: support dwarf unwinding in compat modeJean Pihet
Add support for unwinding using the dwarf information in compat mode. Using the correct user stack pointer allows perf to record the frames correctly in the native and compat modes. Note that although the dwarf frame unwinding works ok using libunwind in native mode (on ARMv7 & ARMv8), some changes are required to the libunwind code for the compat mode. Those changes are posted separately on the libunwind mailing list. Tested on ARMv8 platform with v8 and compat v7 binaries, the latter are statically built. Change-Id: I10be6930346f998ed1facb70c54b2ff39e59d559 Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Reviewed-on: http://git-master/r/379164 (cherry picked from commit afce542b95862fcc2a0584e1654d391ab24c9835) Signed-off-by: Ryan V. Bissell <rbissell@nvidia.com> Reviewed-on: http://git-master/r/405386 GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2014-05-07ARM64: perf: add support for frame pointerJean Pihet
When profiling a 32-bit application, user space callchain unwinding using the frame pointer is performed in compat mode. The code is taken over from the AARCH32 code and adapted to work on AARCH64. Change-Id: I79043ef59eed58ab2035615a006b70b01d99e9a5 Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Reviewed-on: http://git-master/r/379163 (cherry picked from commit 0511acbcb2af8f22ea69f92204689646c0e4e1c6) Signed-off-by: Ryan V. Bissell <rbissell@nvidia.com> Reviewed-on: http://git-master/r/405385 GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2014-05-07ARM64: perf: add support for perf registers APIJean Pihet
This patch implements the functions required for the perf registers API, allowing the perf tool to interface kernel register dumps with libunwind in order to provide userspace backtracing. Compat mode is also supported. Only the general purpose user space registers are exported, i.e.: PERF_REG_ARM_X0, ... PERF_REG_ARM_X28, PERF_REG_ARM_FP, PERF_REG_ARM_LR, PERF_REG_ARM_SP, PERF_REG_ARM_PC and not the PERF_REG_ARM_V* registers. Change-Id: I908803077a4d7192820628bc1e5d53a5a24feb47 Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Reviewed-on: http://git-master/r/379162 (cherry picked from commit 67d8803f42f1646a98b714928b14ae9a3faf2ed6) Signed-off-by: Ryan V. Bissell <rbissell@nvidia.com> Reviewed-on: http://git-master/r/405384 GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2014-05-07arm: tegra: tn8-ffd: disable ULPM for dumb panelRobert Shih
Disable ULPM mode for dumb panel as ULPM mode is for smart panels. bug 1488110 Change-Id: I1f5c60d107137d0df7b90a93f5b2ee39a91eb30c Signed-off-by: Robert Shih <rshih@nvidia.com> Reviewed-on: http://git-master/r/398792 (cherry picked from commit 6ebc6f3e45a02f8989c8af28ee6db6d5fb2c0c02) Reviewed-on: http://git-master/r/404278 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-05-07arm64: mm: file info for user faultsAlex Van Brunt
To make it easier to track down userspace faults, print the file that the PC and LR map to in the faulting task. Change-Id: I54247d9b7093d52b570513e71719fea1fe6b907a Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com> Reviewed-on: http://git-master/r/381006 Reviewed-on: http://git-master/r/403742 GVS: Gerrit_Virtual_Submit Reviewed-by: Sujeet Baranwal <sbaranwal@nvidia.com> Tested-by: Sujeet Baranwal <sbaranwal@nvidia.com>
2014-05-07Arm: tegra13: Enable TBoard and TDiode for T132Jiukai Ma
Enables TBoard and TDiode for T132 platforms bug 1507124 Change-Id: I8490b9ce2cb44e672853560e364f607702bdc415 Signed-off-by: Jiukai Ma <jiukaim@nvidia.com> Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com> Reviewed-on: http://git-master/r/403372 GVS: Gerrit_Virtual_Submit Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2014-05-07ARM: tegra12: dtb: add entry for as3722 bb chargingBibek Basu
Add backup battery charging info in device tree for Jetson-TK1. Bug 1508216 Change-Id: I3018d87db540a0fd49694715c22daa08a09d6e00 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/403345 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2014-05-07mfd: as3722: initialize backup battery charging stateBibek Basu
Initialize the backup battery charging state based on device tree or platform provided data Bug 1508216 Change-Id: I2bc7c0778b466bb61cd984bfeece97cd9c0059e4 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/403344 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2014-05-07video: tegra: host: Fix vi/isp isomgr error printsSudhir Vyas
Fixes the error/warning prints seen in boot logs while releasing isomgr BW in vi/isp drivers. Bug 1494179 Change-Id: Id27fd3bce8332b09a7d5c21dcf868a357b0fa993 Signed-off-by: Sudhir Vyas <svyas@nvidia.com> Reviewed-on: http://git-master/r/403017 (cherry picked from commit 266ef4c61b1ec256d83e302b3f878916a6b285e9) Reviewed-on: http://git-master/r/405844 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> GVS: Gerrit_Virtual_Submit
2014-05-07power: bq2419x: correctly check for thermal profile dataLaxman Dewangan
The number of entry for temp range on DT node is counted using of calls. If there is no entry then it returns -ve error. Taking care of -ve returns on the entry count. This will avoid the wrong error message as: bq2419x 1-006b: voltage thermal profile is not correct Change-Id: I573d392123c15241c521c3c3d80f988b8b1f25f7 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/401497 Reviewed-on: http://git-master/r/405641 GVS: Gerrit_Virtual_Submit
2014-05-07power: bq2419x: reconfigure BQ on the safety timer expireLaxman Dewangan
When safety timer expire, it need to reconfigure all BQ parameter as safety timer expiry reset all values to default. bug 1503606 Change-Id: I17f5a51be99ab7bde28acb18944dec110eee684a Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/398769 Reviewed-on: http://git-master/r/405640 GVS: Gerrit_Virtual_Submit
2014-05-07power: bq2419x: toggle CE bit when safety timer expireLaxman Dewangan
When safety timer expire then it is required to toggle the CE bit from 1 to 0 and then 0 to 1 to restart the timer again. Just setting 0 to 1 will not rstart the timer. bug 1503606 Change-Id: Ic842da3cdaaaea0cfc99f9441b6aa31ef2110e67 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/398768 Reviewed-on: http://git-master/r/405639 GVS: Gerrit_Virtual_Submit
2014-05-07power: bq2419x: rewrite suspend callback as per flow diagramLaxman Dewangan
Rewrite suspend callback to easily map with flow diagram and understand the code path. This rewrite removes the complexity from codes. Change-Id: Ia8747f2f40aec9e5515849a904f08ef018f04b97 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/395810 Reviewed-on: http://git-master/r/405638 GVS: Gerrit_Virtual_Submit
generated by cgit v1.2.3 (git 2.0.4) at 2024-10-01 10:58:20 +0000