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2018-08-24MLK-16075-2 gpu: imx: dpu: prv: Cleanup definitions for YUV conversion mode bitsLiu Ying
This patch cleans up definitions for the YUV conversion mode register field. Two macros are introduced for users to program the field easily. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2018-08-24MLK-16075-1 gpu: imx: dpu: fetchdecode: Update funcs to enable/disable src bufLiu Ying
The bit to enable/disable source buffer is embedded in the register LAYERPORPERTY0. However, the other bits of the register may have other functionalities. So, using fetchdecode_layerproperty() to enable/disable source buffer isn't appropriate. This patch uses new functions to enable/disable fetchdecode source buffer so that the function names could be a bit specific about what they are doing. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2018-08-24MLK-16086 tty: serial: lpuart: add port.lock to protect registers accessing ↵Fugang Duan
in suspend Add port.lock to protect register accessing in suspend/resume function. Disable RIE and ILIE before DMA chan is ternminated in suspend function. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-16085 net: fsl: kconfig: add NET_VENDOR_FREESCALE dependency with ARM64Fugang Duan
Add NET_VENDOR_FREESCALE dependency with ARCH_MXC_ARM64 for i.MX8x platforms. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Pete Zhang <pete.zhang@nxp.com>
2018-08-24MLK-13473: imx_sim: fix module device table nameJulien Olivain
This fixes the build when this driver is built as a module, when CONFIG_MXC_SIM=m Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
2018-08-24MLK-16053 ARM64: defconfig: add pcie support in defconfigRichard Zhu
Add the pcie support in defconfig for 64bit imx socs. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-08-24MLK-16074 PCI: imx: correct some bits configiration of hsioRichard Zhu
- Both APB_RST_0 and APB_RST_1 should be asserted, when PHYX2 is used. Otherwise, PHYX2 can't finish calibration. - Correct the PCIEB(PHYX2_1) TX PLL locked check. - The clear check of the reset should be done after clks are enabled Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-08-24MLK-16067 tty: serial: lpuart: enable wakeup source in .suspend_noirq()Fugang Duan
When use lpuart with DMA mode as wake up source, it still switch to cpu mode in .suspend() that enable cpu interrupts RIE and ILIE as wakkup source. When the wakeup signal coming while rx dma chan is already teminated down, then driver should not call irq handler to submit the new dma descriptor. Enable the wakeup irq bits in .suspend_noirq() and disable the wakeup irq bits in .resume_noirq(). Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-16045: pxp: add lut function in pxp data flow pathGuoniu.Zhou
When do epdc colormap test, the epdc need pxp lut function. But if the data flow through mux0->mux1...or mux0->mux2..., the pxp can not trigger interrupt but mux0->mux3... can. This issue only occures on imx7d, so I set a constant data path when using lut function. Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
2018-08-24MLK-16068 printk: use console_trylock() in console_cpu_notify()Sergey Senozhatsky
There is no need to always call blocking console_lock() in console_cpu_notify(), it's quite possible that console_sem can be locked by other CPU on the system, either already printing or soon to begin printing the messages. console_lock() in this case can simply block CPU hotplug for unknown period of time (console_unlock() is time unbound). Not that hotplug is very fast, but still, with other CPUs being online and doing printk() console_cpu_notify() can stuck. Use console_trylock() instead and opt-out if console_sem is already acquired from another CPU, since that CPU will do the printing for us. Link: http://lkml.kernel.org/r/20170121104729.8585-1-sergey.senozhatsky@gmail.com Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Ingo Molnar <mingo@kernel.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Signed-off-by: Petr Mladek <pmladek@suse.com> This patch also fixes a deadlock that happens if while holding the console lock someone issues a call that eventually takes the cpu hotplug lock, like in the case below, where the following happens: * task Xorg issues an ioctl to the fb layer which takes the console lock and calls the driver's ioctl routine * at the same time, task bat-cpuhotplug issue a hotplug cpu enable operation which takes the cpu hotplug lock and waits for the cpu bringup operation to complete * the fb driver calls dma_alloc_coherent which, on this platform, eventually tries to take the cpu hotplug * task cpuhp/2 tries to flush the console * at this point task Xorg waits after task bat-cpuhotplug to release the cpu hotplug lock which waits after task cpuhp/2 to signal that the CPU is up which waits after the Xorg to release the console lock Linux version 4.9.11-02771-gd85d61b-dirty CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache OF: fdt:Machine model: Freescale i.MX6 Quad SABRE Smart Device Board sysrq: SysRq : Show Blocked State task PC stack pid father cpuhp/2 D 0 18 2 0x00000000 [<80a794ac>] (__schedule) from [<80a79904>] (schedule+0x4c/0xac) [<80a79904>] (schedule) from [<80a7e680>] (schedule_timeout+0x1e8/0x2fc) [<80a7e680>] (schedule_timeout) from [<80a7d208>] (__down+0x64/0x9c) [<80a7d208>] (__down) from [<80174224>] (down+0x44/0x58) [<80174224>] (down) from [<80181a6c>] (console_lock+0x2c/0x74) [<80181a6c>] (console_lock) from [<801849b4>] (console_cpu_notify+0x28/0x34) [<801849b4>] (console_cpu_notify) from [<80150e58>] (notifier_call_chain+0x44/0x84) [<80150e58>] (notifier_call_chain) from [<8012ed34>] (__cpu_notify+0x38/0x50) [<8012ed34>] (__cpu_notify) from [<8012ed64>] (notify_online+0x18/0x20) [<8012ed64>] (notify_online) from [<8012ea4c>] (cpuhp_up_callbacks+0x24/0xd4) [<8012ea4c>] (cpuhp_up_callbacks) from [<8012f4c8>] (cpuhp_thread_fun+0x13c/0x148) [<8012f4c8>] (cpuhp_thread_fun) from [<80153544>] (smpboot_thread_fn+0x17c/0x2dc) [<80153544>] (smpboot_thread_fn) from [<8014f7d8>] (kthread+0xf0/0x108) [<8014f7d8>] (kthread) from [<801077d0>] (ret_from_fork+0x14/0x24) bat-cpuhotplug. D 0 841 718 0x00000000 [<80a794ac>] (__schedule) from [<80a79904>] (schedule+0x4c/0xac) [<80a79904>] (schedule) from [<80a7e680>] (schedule_timeout+0x1e8/0x2fc) [<80a7e680>] (schedule_timeout) from [<80a7a47c>] (wait_for_common+0xb0/0x160) [<80a7a47c>] (wait_for_common) from [<8012f600>] (bringup_cpu+0x50/0xa8) [<8012f600>] (bringup_cpu) from [<8012ea4c>] (cpuhp_up_callbacks+0x24/0xd4) [<8012ea4c>] (cpuhp_up_callbacks) from [<8012ff58>] (_cpu_up+0xa8/0xec) [<8012ff58>] (_cpu_up) from [<80130010>] (do_cpu_up+0x74/0x9c) [<80130010>] (do_cpu_up) from [<80520c88>] (device_online+0x68/0x8c) [<80520c88>] (device_online) from [<80520d14>] (online_store+0x68/0x74) [<80520d14>] (online_store) from [<8029842c>] (kernfs_fop_write+0xf4/0x1f8) [<8029842c>] (kernfs_fop_write) from [<80223da0>] (__vfs_write+0x1c/0x114) [<80223da0>] (__vfs_write) from [<80224c78>] (vfs_write+0xa4/0x168) [<80224c78>] (vfs_write) from [<802259c4>] (SyS_write+0x3c/0x90) [<802259c4>] (SyS_write) from [<80107740>] (ret_fast_syscall+0x0/0x1c) Xorg D 0 860 832 0x00000000 [<80a794ac>] (__schedule) from [<80a79904>] (schedule+0x4c/0xac) [<80a79904>] (schedule) from [<80a79d98>] (schedule_preempt_disabled+0x14/0x20) [<80a79d98>] (schedule_preempt_disabled) from [<80a7ab10>] (mutex_lock_nested+0x1f8/0x4a4) [<80a7ab10>] (mutex_lock_nested) from [<8012ef94>] (get_online_cpus+0x78/0xbc) [<8012ef94>] (get_online_cpus) from [<801e7858>] (lru_add_drain_all+0x48/0x1b4) [<801e7858>] (lru_add_drain_all) from [<8021f65c>] (migrate_prep+0x8/0x10) [<8021f65c>] (migrate_prep) from [<801e1bc8>] (alloc_contig_range+0xd0/0x320) [<801e1bc8>] (alloc_contig_range) from [<80220ec4>] (cma_alloc+0xb8/0x1a8) [<80220ec4>] (cma_alloc) from [<80113b38>] (__alloc_from_contiguous+0x38/0xd8) [<80113b38>] (__alloc_from_contiguous) from [<80113c0c>] (cma_allocator_alloc+0x34/0x3c) [<80113c0c>] (cma_allocator_alloc) from [<80113d88>] (__dma_alloc+0x174/0x338) [<80113d88>] (__dma_alloc) from [<80113fc8>] (arm_dma_alloc+0x40/0x48) [<80113fc8>] (arm_dma_alloc) from [<80478a88>] (mxcfb_set_par+0x8ec/0xd7c) [<80478a88>] (mxcfb_set_par) from [<8045f200>] (fb_set_var+0x1d4/0x358) [<8045f200>] (fb_set_var) from [<8045f9e8>] (do_fb_ioctl+0x4e4/0x704) [<8045f9e8>] (do_fb_ioctl) from [<8023773c>] (do_vfs_ioctl+0xa0/0xa10) [<8023773c>] (do_vfs_ioctl) from [<802380e0>] (SyS_ioctl+0x34/0x5c) [<802380e0>] (SyS_ioctl) from [<80107740>] (ret_fast_syscall+0x0/0x1c) Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
2018-08-24MLK-16055 arm64: dts: freescale: imx8mq: enable power domain supportAnson Huang
Assign i.MX8MQ power domain id to each module to enable power domain control for runtime power management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK16061 imx8qm/imx8qxp: Add support allowing devices to enter into lowRanjani Vaidyanathan
power mode during runtime suspend and idle. On imx8qm/imx8qx, when devices enter into runtime suspend/idle, the resource associated with the device will be enter a low power state (as defined by SCFW). None of the state or clocks will be lost in this mode. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2018-08-24MLK-16064 arm64: dts: imx8qxp: force enet1 use PHY clock delay on lpddr4 ↵Fugang Duan
arm2 board Currently enet1 use MAC clock delay, there have packet error in 100Mbps mode, no packet error in Gbps mode. Still use PHY clock delay instead of MAC that 100Mbps mode has better timing and no frame error. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-16063-2 arm64: dts: add new dts file for imx8qxp mlbGao Pan
add new dts file to support imx8qxp mlb due to pin conflict. Signed-off-by: Gao Pan <pandy.gao@nxp.com>
2018-08-24MLK-16063-1 arm64: dts: disable mlb in default dtsGao Pan
mlb has pin confict with ESAI. So this patch disable mlb in dts. Signed-off-by: Gao Pan <pandy.gao@nxp.com>
2018-08-24MLK-15132-8: Enable Hantro decoder on i.MX8MQZhou Peng-B04994
Implement runtime PM, disable power/clk when vpu is not used Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
2018-08-24MLK-16060: mtd: fsl-quadspi: fix the unalignment issue for qspiHan Xu
ARM64 platforms may access QSPI from non-64-bit-aligned address which causes unalignment fault. Fixed the issue for AHB reading. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-16059-2: ARM64: config: add quadspi to defconfigHan Xu
add quadspi in defconfig Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-16059-1: ARM64: dts: enable quadspi on i.MX8MQHan Xu
enable the quadspi module on i.MX8MQ Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24usb: xhci: fix spinlock recursion for USB2 test modePeter Chen
Both xhci_hub_control and xhci_disable_slot tries to hold spinlock, the spinlock recursion occurs when enters USB2 test mode. Fix it by unlock spinlock before calling xhci_disable_slot. Cc: <stable@vger.kernel.org> Fixes: 0f1d832ed1fb ("usb: xhci: Add port test modes support for usb2") Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-08-24xhci: use correct flags for spin_lock_irqrestore() when setting port powerMathias Nyman
commit a6ff6cbf1fab ("usb: xhci: Add helper function xhci_set_power_on().") created a helper to control port power that needs to be called with xhci->lock held and interrupts disabled. It released the lock with spin_unlock_irqrestore using a new zero flag variable instead of the original flag from spin_lock_irqsave. This regression triggered a static checker warning about bogus flags, and a null pointer dereference on armada-385. Fix it by passing a pointer to the correct flags and using it instead Fixes: a6ff6cbf1fab ("usb: xhci: Add helper function xhci_set_power_on().") Cc: Guoqing Zhang <guoqing.zhang@intel.com> Reported-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Tested-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-08-24usb: xhci: Add port test modes support for usb2.Guoqing Zhang
For usb2 ports, the port test mode Test_J_State, Test_K_State, Test_Packet, Test_SE0_NAK and Test_Force_En can be enabled as described in usb2 spec. USB2 test mode is a required hardware feature for system integrators validating their hardware according to USB spec, regarding signal strength and stuff. It is purely a hardware test feature. Usually you need an oscilloscope and have to enable those test modes on the hardware. This will send some specific test patterns on D+/D-. There is no report available (in Linux itself) as it is purely externally visible. Regular USB usage is not possible at that time. Anyone (well access to e.g. /dev/bus/usb/001/001 provided) can use it by sending appropriate USB_PORT_FEAT_TEST requests to the hub. [Add better commit message by Alexander Stein -Mathias] Signed-off-by: Guoqing Zhang <guoqing.zhang@intel.com> Cc: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-08-24usb: xhci: Expose xhci_start() function.Guoqing Zhang
Change the visability of xhci_start() so that it can be used when enabling test mode. Signed-off-by: Guoqing Zhang <guoqing.zhang@intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-08-24usb: xhci: Add helper function xhci_disable_slot().Guoqing Zhang
Refactoring slot disable related code into a helper function xhci_disable_slot() which can be used when enabling test mode. Signed-off-by: Guoqing Zhang <guoqing.zhang@intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-08-24usb: xhci: Add helper function xhci_set_power_on().Guoqing Zhang
Refactoring port power on/off related code into a helper function xhci_set_power_on() which can be reused when enabling test mode. [set port state to neutral before writing port power -Mathias] Signed-off-by: Guoqing Zhang <guoqing.zhang@intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-08-24MLK-13975 arm64: dts: fsl-imx8qxp: enable AMIXViorel Suman
Enable AMIX in i.MX8 QXP. Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
2018-08-24MLK-13975 arm64: dts: fsl-imx8qxp: enable SAI4 and SAI5Viorel Suman
Enable SAI4 and SAI5. Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
2018-08-24MLK-13975: ASoC: fsl: add AMIX machine driverViorel Suman
Add audio mixer machine driver. Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
2018-08-24MLK-13975: ASoC: fsl: add AMIX device driverViorel Suman
Add audio mixer device driver. Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
2018-08-24MLK-15305-2: dma: imx-sdma: force to load context in sdma_configRobin Gong
Force to load context in sdma_config whatever context loaded or not, since some configuration may change when the upper driver call sdma_config such as bus width. Signed-off-by: Robin Gong <yibin.gong@nxp.com> (cherry picked from commit ee8930b657af0c9ce2cfb1a521530c7d31016675)
2018-08-24MLK-16044 clk: imx: correct i.mx8mq qspi/nand clock nameAnson Huang
i.MX8MQ QSPI and NAND's pre and post div clock use incorrect parent name, correct them. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-16037: ARM64: dts: switch to use DMA.I2C0 instead HDMI.I2C0Shengjiu Wang
Use the DMA.I2C0 instead HDMI.I2C0, they share same hardware pin in imx8qm, then the HDMI power domain will not be enabled when audio codec is working. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
2018-08-24MLK-16036 drm/imx: ldb: Avoid early return when getting aux PHY in dual modeLiu Ying
In dual mode, we return too early from ->bind when we get the auxiliary channel's PHY. This causes we miss the logics to set driver data, get ldb alias id and initialize pixel link(if necessary). This patch fixes the issue here by tweaking the driver logic to do component binding properly. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2018-08-24MLK-15343-3 PCI: imx: enable the DBI_RO_WR_EN of PCIEBRichard Zhu
The DBI_RO_WR_EN of PCIEB should be asserted, otherwise the CLASS_DEVICE can't be configured correctly, then PCIEB RC doesn't work at all. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-08-24MLK-15343-2 clk: imx8qm: correct the PD of PCIEB PHY CLKRichard Zhu
Correct the PD of the PCIEB PHY CLK. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-08-24MLK-15343-1 ARM: imx: enable pcieb on imx8qmRichard Zhu
Based on base board, enable pcieb lane1, enlarge the CFG mapping space. HSIO configuration is 1 lane PCIEA, 1 lane PCIEB and SATA. PHY configurations: PHY_X2_0 <------> PCIEA 1 lane PHY_X2_1 <------> PCIEB 1 lane PHY_X1 <------> SATA Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-08-24MLK-16020 drivers: soc: imx8: fill in machine fieldOctavian Purdila
As for imx6/7, read the 'model' field from device tree and fill in the machine soc field. Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
2018-08-24MLK-16038 ARM: dts: fsl-imx8mq-evk: improve the usdhc I/O drive strengthHaibo Chen
Some normal high-speed SD card may meet some CRC error on imx8mq-evk board, so improve the default usdhc I/O drive strength to fix this. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2018-08-24MLK-15132-7 : Enable Hantro decoder on i.MX8MQZhou Peng-B04994
Refine clk/power operation Adjust print level to reduce some unnecessary print info Removing some redundant codes in bring up stage Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
2018-08-24MLK-16025 ARM64: defconfig: enable xen backend blkdevOctavian Purdila
This provides a kernel dom0 based blkdev backend for domUs (raw disk) and avoids the need to run qemu in dom0 as a backend for blkdev. Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-08-24MLK-16031 arm64: dts: add mlb support for imx8qxpGao Pan
add mlb support for imx8qxp Signed-off-by: Gao Pan <pandy.gao@nxp.com>
2018-08-24MLK-16030-2 soc: imx: gpc: add power domain namesAnson Huang
Add power domain names for i.MX8MQ, currently only 11 power domains support runtime ON/OFF. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-16030-1 arm64: dts: freescale: imx8mq: reduce power domain numberAnson Huang
Reduce i.MX8MQ power domain number because some power domains can NOT support runtime ON/OFF. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-08-24MLK-16006: Revert "ARM: dts: imx6sx-sdb: Change audio PLL frequency for SSI"Daniel Baluta
This reverts commit d7d6f210522188 ("ARM: dts: imx6sx-sdb: Change audio PLL frequency for SSI") because it breaks MQS. MQS uses IMX6SX_CLK_SAI1 as master clock and it requires mclk rate to be 24576000. No other rate is supported. Anyhow, due to change to fix MLK-14865 sai1 clk is changed to 36864000. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2018-08-24MLK-16010: ASoc: fsl: support 32-bit application for hifi4Weiguang Kong
add cases to support 32-bit application for hifi4 when kernel is running on 64-bit cpu mode. Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
2018-08-24MLK-16029 arm64: dts: imx8qm: enable mipi_dsi0 i2c0Gao Pan
add device node to enable mipi_dsi0 i2c0 Signed-off-by: Gao Pan <pandy.gao@nxp.com>
2018-08-24MLK-16028 clk: imx8qm: add clk for dsi0 i2c0Gao Pan
add clk for dsi0 i2c0 Signed-off-by: Gao Pan <pandy.gao@nxp.com>
2018-08-24MLK-16027 arm64: dts: imx8qm: correct mipi0 power domainGao Pan
correct mipi0 power domain Signed-off-by: Gao Pan <pandy.gao@nxp.com>
2018-08-24MLK-16023-05 arm64: dts: imx8qm/qxp: enable enet MAC delayed clocksFugang Duan
Since i.MX8QM/QXP ENET version add new feature that support delayed clock for rxc/txc, then enable the feature on imx8qm/qxp arm2 boards. Only enable i.MX8QM/QXP ARM2 board port0 delayed clock, port1 still use PHY delayed clock. i.MX8QXP MEK board also use PHY delayed clock, once get board then enable the port1 and verify MAC delayed clock in MEK board. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2018-08-24MLK-16023-04 arm64: dts: imx8mq: clean up the enet compatible stringFugang Duan
Since i.MX8MQ ENET is the same as i.MX6SX ENET version and don't support new features added in i.MX8QM/QXP. So remove "fsl,imx8qm-fec" compatible string. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-09-19 21:37:35 +0000