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Add PLLX based table for A01 and
CLDVFS based table for A02
Change-Id: Ibbec5b5d0dc9b43f6e4447791675a7226c732419
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/375803
Reviewed-by: Chao Xu <cxu@nvidia.com>
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This reverts commit 3ed1b1fe808141a2ab08af77a2381d294ff53b1b.
Bug 1440923
Change-Id: Ibd92221abdcc60bbacba9639e3f8e232d7dff49f
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/375802
Reviewed-by: Chao Xu <cxu@nvidia.com>
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Added a check for temperature above max value and return error when
that happens to avoid showing insane temperature values to user. Bogus
temperature readout happens rarely due to the NCT device still being
initialized and unprepared while interrupts happen.
Bug 1454792
Change-Id: I05264a728b8b7bf830d67fc5dd74e1a91c7d6eba
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/376832
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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drivers/video/tegra/nvmap/nvmap_mm.c: In function 'nvmap_flush_cache':
drivers/video/tegra/nvmap/nvmap_mm.c:57:16: warning: unused variable 'base' [-Wunused-variable]
unsigned long base;
^
Change-Id: Ic1beb9e867c88d85a8359e6431c18f66c4acdaba
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/377219
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
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drivers/video/tegra/nvmap/nvmap_heap.c:499:23: warning: 'nvmap_create_dma_devs' defined but not used [-Wunused-function]
static struct device *nvmap_create_dma_devs(const char *name, int num_devs)
^
Change-Id: I3e984e4fc385d8540daff5675657bf75c03aa5a4
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/377218
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
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This fixes a number of size warnings on ARM64 builds. Mostly format
strings, but a couple of size_t arguments too.
Change-Id: Ic07fadd5f4b844e3231219d1933a0a582c412a47
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/377217
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
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DT will initialize the pdev->id as -1 for both vi.0 and vi.1. This
will cause several subtle issues since checking pdev->id is used a
in VI and Tegra V4L2 camera drivers.
Set the pdev->id as the right value during probing for DT case. Then
no change is need for others
Bug 1463966
Change-Id: I8adf124c4d3489e9c06abbecb6d3587437954c50
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/373000
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Added sysfs node that exposes the nr_runnable threshold at which cores
are quiesenced/woken up. To write into this node:
echo 1core# 2core# ... n_core# > nr_run_thresholds
Bug 1427140
Change-Id: I7cabd63692cf92f7fe8d1064437b1d73002d4ba5
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/369017
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Support added to dynamically set/get the tap/trim and clock gating config data.
Usage for setting tap value:
Write 1 to disable clk gating
"echo 1 > /sys/kernel/debug/sdhci-tegra.3/override_data/clk_gate_disabled"
Write tap value
"echo 2 > /sys/kernel/debug/sdhci-tegra.3/override_data/tap_value"
Usage for setting trim value:
Same as above i.e. replace "tap_value" with "trim_value"
Bug 1311104
Change-Id: Ibdf07b0068fda7c71fae647472b7e42436dc7322
Signed-off-by: Srinivas Vummadisingu <srinivasv@nvidia.com>
Reviewed-on: http://git-master/r/376189
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sobby Thakalath <sthakalath@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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Change to hardware recommended settings.
Bug 1431384
Change-Id: I02c75c2698b6eef5f4a806115e76297759fb98f2
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/375923
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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1. Add required dts files.
2. Add SW_TABLET_MODE (type = EV_SW) for stylus in DT.
bug 1457190
bug 1468661
Change-Id: I00e27a2f9cc110921882767e7f8a35b3e852548c
Signed-off-by: leow <leow@nvidia.com>
Reviewed-on: http://git-master/r/374628
Reviewed-by: Robert Shih <rshih@nvidia.com>
Reviewed-by: Wayne Hsu <wahsu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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Bug 1461646
Change-Id: I84e9d3f5a2cc17451f32c682a1fcd10680a7c838
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/369112
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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bug 1382403
Change-Id: If50fb708639804a4579df5d558f6a9d51a8cb1aa
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/373804
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>
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Robustify in GPADC lock issue.
- Check GPADC status to unlock GPADC, if GPADC is in the lock status.
- The palmas_update_bits() updates a register value only if cached value and
new value are different. So use palmas_write() instead palmas_update_bits()
in palmas_disable_auto_conversion() to update AUTO_CTRL register always.
- Remove ADC S/W conversion disable. It is unnecessary and can be cause
of GPADC lock issue.
- Clear AUTO_SELECT register after disable auto conversion.
- Add shutdown callback to disable auto conversion before shutdown.
- Print INT3_LINE_STATE register in palmas_gpadc_irq_auto.
Bug 1398960
Bug 1415280
Change-Id: Ia63e56d6119680fb6c761647718e7467c28bab6d
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
(cherry picked from commit 12ad1be8ed0a739711c03df8bb1ad2f4b464e14d)
Reviewed-on: http://git-master/r/357300
Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com>
Tested-by: Anshul Jain (SW) <anshulj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Support for auto conversion shutdown when auto conversion result is
crossed threshold.
Corrected auto conversion period calculation.
Restore CH3 current source if CH3 is dual current mode.
Added debugfs for auto conversion.
Bug 1398960
Bug 1415280
Change-Id: I148c51ab70dcca756f74a5cb8ab10112de3a9f03
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
(cherry picked from commit 067cbc4f23849b3e5c5108e1d8636d008ad88498)
Reviewed-on: http://git-master/r/357299
Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com>
Tested-by: Anshul Jain (SW) <anshulj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Rename wakeup to auto conversion.
Bug 1398960
Bug 1415280
Change-Id: I37bee5239caaeec73c7fa6d769b7e9b7476eab9c
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
(cherry picked from commit 327d973243e1fc6c24002b317a9aac8be24f7748)
Reviewed-on: http://git-master/r/357298
Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com>
Tested-by: Anshul Jain (SW) <anshulj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Added debugfs nodes for iio_channel_name, tz_name and raw_adc.
Bug 1398960
Bug 1415280
Change-Id: I00c84c1b282aff4e7c5dee7c8e4fdb172584b0ce
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
(cherry picked from commit 0d45f672727644614d721fa465cf70bd95934577)
Reviewed-on: http://git-master/r/361408
Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com>
Tested-by: Anshul Jain (SW) <anshulj@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Month value written to RTCmonth register is not
correct. As a result correct rollover is not
happening when date changes from 31 to 1
Bug 1442350
Change-Id: Ib08b02b9f0245d042e626e7a4e15b3249896c609
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/375281
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Add new dmabuf ops dma_buf_{set,get}_private() for ION.
Currently max 5 importers is supported by default. That's enough ok
from perf POV as well. To support more you need dynamic allocation
with linked list or tree structure. Also this import private is
removed at dmabuf release. For more strict caching you may want to
defer till a buf is actually removed. To implement this, you may want
to export dmabuf for itself(self exporting) just for ref counting.
Bug 1458082
Change-Id: I25f8acb575eda5882a8d9f3e7cd00cfc802683ba
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/376557
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Add device tree support for SATA
Bug 1465729
Change-Id: I718c83f1ed430e93f40f06334c78344d57510bdc
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/377165
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Even though arm_iommu_attach_device() is failed, we don't need
arm_iommu_release_mapping() because we don't need kref_put() to
decrease kref->refcount.
arm_iommu_release_mapping() is needed by arm_iommu_create_mapping().
And, if smmu_clients remain when iommu domain is destroyed,
next smmu_client should be stored in temporary variable before
smmu_iommu_detach_dev(), because current smmu_client->list.next
will be invalid.
So, list_for_each_entry() needs to be replaced
with list_for_each_entry_safe().
Bug 1437038
Change-Id: Id246711b74ad1983b4765415fa4674407f09fbcc
Signed-off-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-on: http://git-master/r/356451
Reviewed-on: http://git-master/r/377057
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
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Fixed checksum calculation in bq27441 initalization
sequence. Also added 1 msec delay before reading
block registers. Unseal fuel gauge first and read the
block registers before deciding whether to update or not.
Bug 1344962
Change-Id: I45765bbdfb38bf01316bed347606501fd42427fb
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: siddardha naraharisetti <siddardhan@nvidia.com>
Reviewed-on: http://git-master/r/374497
(cherry picked from commit 2b463db152c39b79dc26e704aef58285088056ce)
Reviewed-on: http://git-master/r/374335
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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when of_property_read fails, we should skip using the data returned,
and skip the linear mapping functions.
Bug 1325374
Change-Id: Ia6eda7e24a0c0132c136731af096a5d7e8734f49
Signed-off-by: Marvin Zhang <mzhang@nvidia.com>
Reviewed-on: http://git-master/r/376689
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Disable PMU interrupts when tearing down the PMU. This ensures that
the PMU ISR will not get invoked while any PMU software resources
are unavailable.
Bug 1456723
Change-Id: Ia2295aaec66e0033143150d1633f5d0a51bd2719
Signed-off-by: Neil Gabriel <ngabriel@nvidia.com>
Reviewed-on: http://git-master/r/373673
(cherry picked from commit 2c0c42f287b796bfcebe12224f1cefd280c2c615)
Reviewed-on: http://git-master/r/374893
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Implement the necessary sysfs interfaces to expose the mselect timeout
as device attribute with +rw permissions.
Change-Id: I654823603d148cfee5d1f33d9373aebd7bafa474
Signed-off-by: Neil Gabriel <ngabriel@nvidia.com>
Reviewed-on: http://git-master/r/374430
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Marc Delvaux <mdelvaux@nvidia.com>
Reviewed-by: Sobby Thakalath <sthakalath@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Bug 1458082
Change-Id: I56c93736a015aeef6caf61890e669dbbb75a4d9c
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/375847
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
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Fix build error w/o NVMAP
Bug 1445482
Change-Id: Ic745e1d30e076c35e34dc0bdc53b9e6564e73ba5
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/376623
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nvmap_get_dmabuf_param() can be called against the dmabuf which comes
from non nvmap allocation. Need to check and return error if so.
Bug 1458082
Change-Id: If799cd7bc5fb6391a40ddd3b754bec014106b1a6
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/376622
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
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Tegra Profiler: unwinding based on exception-handling tables
Bug 1465331
Change-Id: I9e8bb2eb342c5dadf82af05bb87040c0925cca1b
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/370036
GVS: Gerrit_Virtual_Submit
Tested-by: Maxim Morin <mmorin@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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Change code for nvavp_channel_open to be compliant with
tegra_nvavp_open. This should fix the build break.
Change-Id: I8a95fadcdac87a5a05eb7d4a2d5567bdb5cdc612
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/376962
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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This is SW WAR for unexpected wake-ups from
proximity sensor.
Bug 1458603
Change-Id: I2a4cfd43f5c72e933b82c343fcf52034e0b6368f
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/368524
(cherry picked from commit c6b46cc5f8d5d09deb5ab120b307aa592e632773)
Reviewed-on: http://git-master/r/369751
(cherry picked from commit b5cf7cd0061559ed20f0a581fb3d133952cd5f51)
Reviewed-on: http://git-master/r/374285
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Bug 1458603
Change-Id: I5f3c5cad4408b894d3c2fcbcedf02a0efd88a1c1
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/368523
(cherry picked from commit 54342d0f8c1cd7d2d6c0acef08d48bf1391e0ffe)
Reviewed-on: http://git-master/r/369750
(cherry picked from commit 54cc8c734df49f7df32aa1cbf85c889a722491ec)
Reviewed-on: http://git-master/r/374284
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Once i2c handshake is done, i2c transfer should start with IQS253
sensor within 3 msec. If that window is slipped, the transfer will
fail. Hence, retry to improve success rate.
Bug 1458603
Change-Id: I16eeedbf647e89fa390e1de6defaef8d25cef050
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/367675
(cherry picked from commit 4f46401e41865fbee36e35caa75cb245c1090702)
Reviewed-on: http://git-master/r/369749
(cherry picked from commit 439a7404e1b0f48913ad00c49c2fca818e729279)
Reviewed-on: http://git-master/r/374283
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Bug 1454569
Change-Id: I066a0566138061b22f05523bcc641312bac906d3
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/364917
(cherry picked from commit 39bae308e2e8dad8d94b1a9bf42e3e01d847c776)
Reviewed-on: http://git-master/r/374104
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Enabled the PACKET_MODE_EN bit only during transfer.
This helps MTS to check whether any I2C transaction
is in progress.
Bug 1454386
Change-Id: I62ce2f4ec69bcfd0472e6a01bc5282e74b48f54d
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/374850
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Bug 1414478
Change-Id: Ia4010c95a830fb93d1e0745777467cb581302005
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/337586
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Add new apis for submitting audio pushbuffer to nvavp driver and to
register callback function for avp norification. These apis are needed
for kernel audio driver. When notification callback function is
registered nvavp driver will use this api when it gets event from avp
instead of sending kobject_event to user space.
Also add NVE276_EXECUTE and NVE276_PARAMETER_METHOD() macros as they
are needed by audio driver.
Bug 1399922
Change-Id: Ia6ac52c1f6e3e83bc5d335bb585981184926b429
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/369293
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Export nvavp_enable_audio_clocks and nvavp_disable_audio_clocks apis
so that kernel side audio driver can call these apis directly. Also
change the protorype of this functions to facilitate calling from
audio kernel driver. This is needed to support kernel based audio
offload support.
Bug 1399922
Change-Id: I92f738f244cd47848e73db63544301b02b52c74a
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/369287
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Till now nvavp driver used to expose APIs only through IOCTLs. So
only user space drivers can communicate with nvavp kernel driver.
We need to implement avp audio driver on kernel to implement
kernel based offload audio solution. Kernel side AVP audio driver
needs to be able to directly call nvavp driver for communication
with avp. To facilitate that add new exported apis for nvavp
audio client open/release. To implement this nvavp_info_ctx is stored in
a global static pointer and prototype of nvavp_open is also changed.
Bug 1399922
Change-Id: I6edc1b02caaea3c655cfc5927058b2346a9b552f
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/369266
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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- This is the fix for the IRQ based headset detection
in BIAS OFF state.
- Change the min codec state to BIAS OFF when it is
in idle.
Bug 1439253
Bug 1423334
Bug 1422595
Bug 1422552
Bug 1432969
Change-Id: If97867e5071a0c966eba6feec31836aba88a0c27
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/361326
(cherry picked from commit 9822ab695fb87e5bbe5d264610dded10d9e6504c)
Reviewed-on: http://git-master/r/374087
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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For dual mic support in voice call , codec also
should run at BB sample rate i.e 16k
1) Remove the SRC from UL
2) Add SRC in DL to mix the system sound
Bug 1454569
Bug 1467243
Change-Id: I1710cb0fd3872a98ac32a61612d26e6a1b4f738d
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/364308
(cherry picked from commit fa6206fc1a152fa2d29166ab4a2c61608c99669b)
Reviewed-on: http://git-master/r/374101
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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Functioning of GEN2_I2C requires vdd_snsr to be
powered on.
Bug 1445813
Change-Id: I72aa200003216a2371f5aa0ac65d77f7c22576dc
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/374636
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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If a task sched_yields to itself continuously, force the task to
sleep in sched_yield. This will lower the CPU load of this task
thereby lowering the cpu frequency and improving power.
Added a stat variable to track how many times we sleep due these
consecutive sched_yields. Also added sysctl knobs to control the number
of consecutive sched_yields before which the sleep kicks in and the
duration fo the sleep in us.
Bug 1424617
Change-Id: Ie92412b8b900365816e17237fcbd0aac6e9c94ce
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/358455
Reviewed-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Peter Zu <pzu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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- Completely skipped calibration if calibration delay is zero (used
to only stop calibration timer in this case, but still calibrated on
request)
- When storing calibration results checked Vmin consistency. In theory
high tuning low limit may push calibrated rate higher current thermal
floor; in this case default characterized Fmax@Vmin is always used as a
base for the calibration (instead of previous calibration result).
Change-Id: I2419e0d5b278e97108d94db34014652aad7f8f74
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/376248
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Tegra12 supports changing dividers of disabled clocks.
Change-Id: Ib5b8e3847368803a383f5516809a4cd37ec836bc
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/367526
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Added an optional peripheral clocks property that allows to change
divisor value while clock is disabled. Currently no clock on any Tegra
architecture has this property set.
Change-Id: I3b668f19ed94b95f47ed4a8354e63e6a74b6ebd5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/367525
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Remove support for legacy secure storage protocol now that the rest of TLK
is using new protocol.
Bug 1397251
Change-Id: Idbc99e46a58d77934d6c6dce41d1dcf0d175b8cc
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: http://git-master/r/369107
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chris Johnson <cwj@nvidia.com>
Tested-by: Chris Johnson <cwj@nvidia.com>
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Add and Update nvmap trace events to print stats info for use case
analysis.
Fix dma_buf2 events to get dev name at right time.
Change-Id: Ib79de255714d2d28317b4a4ab1f73dbce051623f
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/375107
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As per guidance from MC ARCH, for Tegra12 use 2 Bpp for YUV420 display
modes.
Bug 1454184
Change-Id: Ic233058e82bef1343ffb282c0b2e792cdb7312ad
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/373861
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
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Now "nvmap_dmabuf_{set,get}_private()" are called in the framework of
dmabuf. No chance other dmabuf from nvmap is called. Remove
unnecessary checks.
Bug 1450489
Change-Id: I4163f7f37355c2f77d0465f683857f356fbad849
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/376556
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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