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* pci/yijing-mps-v1:
drm/radeon: use pcie_get_readrq() and pcie_set_readrq() to simplify code
staging: et131x: Use pci_dev->pcie_mpss and pcie_set_readrq() to simplify code
IB/qib: Drop qib_tune_pcie_caps() and qib_tune_pcie_coalesce() return values
IB/qib: Use pcie_set_mps() and pcie_get_mps() to simplify code
IB/qib: Use pci_is_root_bus() to check whether it is a root bus
tile/PCI: use cached pci_dev->pcie_mpss to simplify code
PCI: Export pcie_set_mps() and pcie_get_mps()
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* pci/host-rcar:
PCI: Add R-Car Gen2 internal PCI support
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* pci/host-imx6:
PCI: imx6: Probe the PCIe in fs_initcall()
PCI: imx6: Remove redundant of_match_ptr
PCI: imx6: Increase link startup timeout
PCI: imx6: Fix imprecise abort handler
PCI: imx6: Remove redundant dev_err() in imx6_pcie_probe()
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* pci/host-exynos:
PCI: exynos: Remove redundant of_match_ptr
PCI: designware: Add irq_create_mapping()
PCI: designware: Make dw_pcie_rd_own_conf(), etc., static
PCI: designware: Add header guards
PCI: exynos: Add missing clk_disable_unprepare() on error path
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* pci/gregkh-driver-core:
PCI: Make pci_bus_attrs, pci_dev_attrs, dev_rescan_attr, dev_remove_attr, vga_attr static
PCI: convert bus code to use dev_groups
PCI: convert bus code to use drv_groups
PCI: convert bus code to use bus_groups
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Probe the PCIe driver in fs_initcall() instead of module_init()
to assure that pci_assign_unassigned_resources() will be called
early. This function is called in dw_pcie_host_init(), which is
in turn called from imx6_add_pcie_port(), which is called from
imx6_pcie_probe(). If this is not called early, we will hit
resource collisions since pcieport driver is then probed way too
late.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Frank Li <lznuaa@gmail.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Yinghai Lu <yinghai@kernel.org>
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This adds internal PCI controller driver for R-Car Gen2 SoC. There are
three PCI controllers available with only a single EHCI/OHCI device
built-in on each PCI bus. This gives us three USB channels. Channel 0 is
shared with the USBHS device, while channel 2 is shared with the USBSS.
The PCI controllers do not support I/O port space mapping, and it is not
needed here.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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imx6_pcie_of_match is always compiled in because PCI_IMX6 depends on
SOC_IMX6Q, which only supports OF build. Hence of_match_ptr is not
required.
[bhelgaas: add changelog details from Shawn]
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sean Cross <xobs@kosagi.com>
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A longer link startup timeout is required when certain PCI switches are
attached to the root complex. This was tested with a Pericom switch
and a PLX switch.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
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This driver is DT only. Hence of_match_ptr is not required.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
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An imprecise abort is triggered when a port behind a switch is accessed
and no device is present. At enumeration, imprecise aborts are not enabled
thus this ends up getting deferred until the kernel has completed init. At
that point we must not adjust PC - the handler must do nothing, but a
handler must exist.
This fixes random crashes that occur right after freeing init.
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
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There is an error message within devm_ioremap_resource()
already, so remove the dev_err() call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
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Without irq_create_mapping(), the correct IRQ number cannot be
provided. In this case, it makes problems such as NULL dereference.
Thus, irq_create_mapping() should be added for MSI.
Suggested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The following variables and functions are used only in pcie-designware.c,
so make them static:
global_io_offset
dw_pcie_rd_own_conf()
dw_pcie_wr_own_conf()
dw_pcie_setup()
dw_pcie_scan_bus()
dw_pcie_map_irq()
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
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Add header guards to prevent redundant inclusion.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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vga_attr static
Local variables used only in this file are made static.
[bhelgaas: also make pci_dev_attrs[] static (from Fengguang)]
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The dev_attrs field of struct bus_type is going away soon, dev_groups
should be used instead. This converts the PCI bus code to use the
correct field.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The drv_attrs field of struct bus_type is going away soon, drv_groups
should be used instead. This converts the PCI bus code to use the
correct field.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The bus_attrs field of struct bus_type is going away soon, dev_groups
should be used instead. This converts the PCI bus code to use the
correct field.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Add the missing clk_disable_unprepare() before return
from exynos_pcie_probe() in the error handling case.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
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Use pcie_get_readrq() and pcie_set_readrq() functions to simplify code.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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The PCI core caches the "PCIe Max Payload Size Supported" in
pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword().
Also use pcie_set_readrq() instead of pcie_capability_clear_and_set_word()
to simplify code.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Mark Einon <mark.einon@gmail.com>
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The callers of qib_tune_pcie_caps() and qib_tune_pcie_coalesce() don't
check the return values, so this patch drops the return values altogether.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
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* pci/misc:
PCI: Remove unused PCI_MSIX_FLAGS_BIRMASK definition
PCI: acpiphp_ibm: Convert to dynamic debug
PCI: acpiphp: Convert to dynamic debug
PCI: Remove Intel Haswell D3 delays
PCI: Pass type, width, and prefetchability for window alignment
PCI: Document reason for using pci_is_root_bus()
PCI: Use pci_is_root_bus() to check for root bus
PCI: Remove unused "is_pcie" from pci_dev structure
PCI: Update pci_find_slot() description in pci.txt
[SCSI] qla2xxx: Use standard PCIe Capability Link register field names
PCI: Fix comment typo, remove unnecessary !! in pci_is_pcie()
PCI: Drop "setting latency timer" messages
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PCI_MSIX_FLAGS_BIRMASK has been replaced by PCI_MSIX_TABLE_BIR for better
readability. Now no one uses it, remove it. No functional change.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/host-tegra:
PCI: tegra: Add missing __iomem annotation
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* pci/host-imx6:
PCI: imx6: Add support for i.MX6 PCIe controller
ARM: imx6q: Add PCIe bits to GPR syscon definition
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Add support for the PCIe port present on the i.MX6 family of controllers.
These use the Synopsis Designware core tied to their own PHY.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
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PCIe requires additional bits be defined for GPR8 and GPR12.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/host-exynos:
PCI: exynos: Turn off power of phy block when link failed
PCI: exynos: Add support for MSI
MAINTAINERS: Add Jingoo Han as Samsung Exynos PCIe driver maintainer
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This patch is to use pr_debug/info/warn/err to replace acpiphp_ibm debug
functions and remove module's debug param.
User interface change: before this patch, boot with the "acpiphp_ibm.debug"
kernel parameter to turn on debug. After this patch, set
CONFIG_DYNAMIC_DEBUG=y and boot with "acpiphp_ibm.dyndebug=+p" instead.
See Documentation/dynamic-debug-howto.txt.
[bhelgaas: changelog]
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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This patch is to use pr_debug/info/warn/err to replace acpiphp debug
functions and remove module's debug param.
User interface change: before this patch, boot with the "acpiphp.debug"
kernel parameter to turn on debug. After this patch, set
CONFIG_DYNAMIC_DEBUG=y and boot with "acpiphp.dyndebug=+p" instead.
See Documentation/dynamic-debug-howto.txt.
[bhelgaas: changelog]
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Added missing __iomem annotation in order to fix the following
sparse warnings:
drivers/pci/host/pci-tegra.c:411:41: warning: incorrect type in return expression (different address spaces)
drivers/pci/host/pci-tegra.c:411:41: expected void [noderef] <asn:2>*
drivers/pci/host/pci-tegra.c:411:41: got void *addr
drivers/pci/host/pci-tegra.c:419:25: warning: incorrect type in return expression (different address spaces)
drivers/pci/host/pci-tegra.c:419:25: expected void [noderef] <asn:2>*
drivers/pci/host/pci-tegra.c:419:25: got void *addr
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thierry Reding <treding@nvidia.com>
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When link failed, there is no need to turn on phy block. Also,
turning on phy block is added, in order to turn on phy block
regardless of the default value of phy registers.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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This patch adds support for Message Signaled Interrupt in the
Exynos PCIe driver using Synopsys designware PCIe core IP.
Signed-off-by: Siva Reddy Kallam <siva.kallam@samsung.com>
Signed-off-by: Srikanth T Shivanand <ts.srikanth@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
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Add myself as maintainer for Samsung Exynos PCIe driver.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The latest Intel Haswell chipsets have a hardware optimization which
allows on-chip PCI devices to ignore the 10ms delay before entering
or exiting D3 suspend.
This patch implements the optimization as a PCI quirk, since we want
tight control over which devices use it. This way we can test each device
individually to be sure there are no issues before we enable the quirk.
The first set of devices are from the Haswell platform, which includes
every PCI device that is on the northbridge and southbridge.
This patch reduces the Haswell suspend time from 93 ms to 47 ms and resume
time from 160 ms to 64 ms.
Signed-off-by: Todd Brandt <todd.e.brandt@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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When calculating window_alignment(), type information like IORESOURCE_MEM
and IORESOURCE_PREFETCH may not be enough. For example, on powernv, we
need to know whether the window is 64-bit or not.
This patch passes the full resource type (res->flags) for window alignment.
[bhelgaas: changelog]
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Gavin Shan <shangw@linux.vnet.ibm.com>
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Some code assumes "bus->self == NULL" means the bus is a root bus. This
adds a comment explaining why this is incorrect ("virtual" buses added for
SR-IOV have "bus->self == NULL" but are not root buses).
No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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In __pci_bus_size_bridges() we check whether a bus is a root bus by testing
bus->self. As indicated by commit 79af72d7 ("PCI: pci_is_root_bus
helper"), bus->self == NULL is not a proper way to check for a root bus.
One issue is that "virtual" buses added for SR-IOV (via virtfn_add_bus())
have bus->self == NULL but are not root buses.
This patch changes it to pci_is_root_bus() to check whether it is a root
bus.
[bhelgaas: changelog]
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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No one uses "is_pcie" now; remove this obsolete member.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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pci_find_slot() has been removed from the kernel. Document its
closest replacement, pci_get_domain_bus_and_slot(), instead.
[bhelgaas: fix indentation, keep mention in "obsolete" section]
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use the standard #defines for PCIe Link Capability register fields
rather than bare numbers. This also uses the new PCI Express Capability
accessor rather than reading the capability directly.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Acked-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
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Use normal kernel-doc "Returns:" instead of "retrun"
Assignment to bool is always 1 or 0 so the !! isn't necessary.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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This message isn't useful any more, so drop it.
Reference: https://bugzilla.kernel.org/show_bug.cgi?id=60636
Reported-by: Oleksil Shevchuk <alxchk@gmail.com>
Reference: http://lkml.kernel.org/r/CALCETrWkr53ZjqdN3t7rTTfr=+ZKZXJoYsuBcwPf0kN_33GfAw@mail.gmail.com
Reported-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Refactor qib_tune_pcie_caps(). Use pcie_get_mps(), pcie_set_mps(),
pcie_get_readrq(), and pcie_set_readrq() to simplify the code. The PCI
core caches the "PCIe Max Payload Size Supported" in pci_dev->pcie_mpss,
so use that instead of pcie_capability_read_word(). Remove the unused
val2fld() and fld2val().
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
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Use pci_is_root_bus() instead of "if (bus->parent)" statement
for better readability.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
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The PCI core caches the "PCIe Max Payload Size Supported" in
pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword().
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Export pcie_get_mps() and pcie_set_mps() functions so drivers can use
them to simplify code.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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* pci/yijing-pci_is_pcie-v2:
powerpc/pci: Use pci_is_pcie() to simplify code
[SCSI] qla2xxx: Use pcie_is_pcie() to simplify code
[SCSI] csiostor: Use pcie_capability_clear_and_set_word() to simplify code
[SCSI] bfa: Use pcie_set()/get_readrq() to simplify code
x86/pci: Use cached pci_dev->pcie_cap to simplify code
PCI: Use pci_is_pcie() to simplify code
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