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the touchscreen chip can't be wake up during resume.
it caused by the irq pin can't pull down while resume.
this is may caused by 6q cpu board HW design.
temp disable suspend function of eGalax touch screen for release.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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change back to 1g/3g address partition, give more vma to user space.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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It will happen to crash on cpu hotplug.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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This reverts commit 187111c874936a35e8d5004db9537d2760f2bae1.
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If the wakeup source irq pending during suspend process, system will
hang, we need to abort suspend, and resume immediately to make system
running normally.
Signed-off-by: Anson Huang <b20788@freescale.com>
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- Add VGA support. The command option to use VGA as primary
display: video=mxcfb0:dev=vga,VGA-XGA,if=GBR24 ard-vga
For VGA, Need to disable Ethernet and short PIN 1-2 of J14
and J16.
- Add LVDS support. The default display is LVDS0. LVDS1 needs
further modification on ldb driver
Signed-off-by: Lily Zhang <r58066@freescale.com>
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1.Need to add condition check after resum, or if we
didn't config L2 cache, build will fail.
2.Need to call the mxc_init_l2x0 instead of l2x0_init.
Signed-off-by: Anson Huang <b20788@freescale.com>
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To save power, we should disable as much as possible
when kernel boot up, only leaving the necessary clocks
on, devices should enable their clock in init.This is
necessary for our MX6q, or the chip will be too hot,
may damage.
After doing this change, we can save more than 150mA@5V.
Signed-off-by: Anson Huang <b20788@freescale.com>
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1. Set MMDC pad ctrl to low-power mode when dormant;
2. DRAM_RESET can't be changed due to hardware design;
3. GPR_CTLDS should be changed to lower the MMDC IO
power to 0mA, but it needs hardware change, will add it
in next hardware version after we figure out how to
change the hardware.
Current MMDC data in dormant is:
IO: 28mA@1.5V;
DDR: 35mA@1.5V.
4. Change the suspend code to run in iRAM;
Signed-off-by: Anson Huang <b20788@freescale.com>
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Add virtual iim driver.
This driver will be used by MM team.
Signed-off-by: Terry Lv <r65388@freescale.com>
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This patch adds platform changes to system files, including:
1. Add viim platform deivce.
2. Add viim menu.
Signed-off-by: Terry Lv <r65388@freescale.com>
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re-init GPIO interrupt to make GPIO interrupt workable after
suspend/resume (dormant mode)
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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system bar can not display if we enable 2d & vg.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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Conflicts:
arch/arm/mach-mx6/board-mx6q_sabreauto.c
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I2c device should not probe successfully when there is no such device
on the bus. This will make i2c access failure later.
Signed-off-by: Lionel Xu <R63889@freescale.com>
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enable 8 bit MMC mode according to mmc stack.
enable eMMC DDR mode according to mmc stack, but change
sdhci a little, since sdhci does not support DDR mode so
far.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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set to 1 if the port on board supports 8 bit MMC card.
else set to 0
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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At armv7 SoC, the dma_alloc_coherent returns non-cachable, but
bufferable region, so the driver needs to drain write buffer by
itself, if the controller needs to visit dma buffer immediately
after cpu writes
There is a discussion for this armv7 change:
http://marc.info/?t=127918539100004&r=1&w=2
For this issue, the next dtd pointer is invalid sometimes, the reason
is the region which is used to store dtd is dma buffer, so the data may
not be written to memory when the controller visit this data.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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- The spin_lock is at interrupt handler, so all code routines
using at interrupt handler are forbidden to hold spin_lock again
- Move the code which needs to be protected by spin_lock to workqueue,
and it will be called when workqueue is scheduled.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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1. Better to write disable and reset together into
SRC_SCR register;
2. Should wait for reset done.
Signed-off-by: Anson Huang <b20788@freescale.com>
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As ipuv3 has changed the interface to support multi ipu instance,
without ipu_device driver updated, we must porting ipu_device driver
to only use first ipu.
For ipu user space lib, just change the include/linux/ipu.h, revert
the mutli ipu instance interface change, copy to linux-lib.git.
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Set fsl arc usb device driver as default usb device driver
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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1. boot_secondary ioremap need unmap, or the
stress test of hot-plug and suspend/resume will
cause the virtual address space leak;
2. Disable secondary CPUs need done by CPU0, move
the SRC_SCR setting to platform_cpu_kill.
Signed-off-by: Anson Huang <b20788@freescale.com>
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gpu multi-core dirver 4.4.2 needs one single gpu device.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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Add cea extend revision 1 and 2 support.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Resolve the touch intr pin request conflict.
Add ipuv3 fb earlysuspend callbacks.
Avoid the cs42888 suspend/resume failed issue when we do not
have the audio extension board (cs42888 on it) connected.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Audio capture not support in 2.6.38 kernel, it is caused
by not setting ssi correctly in clock and sync method.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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New sdma driver in 2.6.38 kernel not map event to channel correctly by
ignore events bigger than 32.
Fix it by remove this restriction
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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add the dma support for imx6q.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the dma device for imx6q.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the arch code for APBH-DMA.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the gpmi driver for imx6q.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add gpmi device for sabreauto platform.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the arch code for GPMI.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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- Fixed bug in how new waveform set is copied into EPDC driver internal
copy of waveform modes.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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request_irq should be after hw init. It can avoid meaningless interrupt.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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request_irq should be after hw init. It can avoid meaningless interrupt.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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make ldb support two ipu in separate mode
cmdline option changed:
"ldb=spl0/1" -- split mode on DI0/1
"ldb=dul0/1" -- dual mode on DI0/1
"ldb=sin0/1" -- single mode on LVDS0/1
"ldb=sep0/1" -- separate mode begin from LVDS0/1
there are two LVDS channels(LVDS0 and LVDS1) which can transfer video
datas, there two channels can be used as split/dual/single/separate mode.
split mode means display data from DI0 or DI1 will send to both channels
LVDS0+LVDS1.
dual mode means display data from DI0 or DI1 will be duplicated on LVDS0
and LVDS1, it said, LVDS0 and LVDS1 has the same content.
single mode means only work for DI0/DI1->LVDS0 or DI0/DI1->LVDS1.
separate mode means you can make DI0/DI1->LVDS0 and DI0/DI1->LVDS1 work
at the same time.
Signed-off-by: Jason Chen <b02280@freescale.com>
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make ldb support two ipu in separate mode.
Signed-off-by: Jason Chen <b02280@freescale.com>
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make ldb support two ipu in separate mode
Signed-off-by: Jason Chen <b02280@freescale.com>
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UART hold the following locks in order of:
imx_set_termios():
--> spin_lock_irqsave(&sport->port.lock, flags)
del_timer_sync(&sport->timer);
--> spin_lock(timer->base->lock);
--> spin_unlock(timer->base->lock);
spin_unlock_irqrestore(&sport->port.lock);
while when imx_timeout() may invoked in following stack:
run_timer_softirq():
--> spin_lock_irqsave(timer->base->lock, flags);
imx_timeout();
--> spin_lock_irqsave(&sport->port.lock, flags);
...;
--> spin_unlock_irqrestore(&sport->port.lock, flags);
spin_unlock_irqrestore(timer->base->lock, flags);
the above two cases hold lock with revert order, may
deadlock in SMP platform.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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This patch uses the load/store exclusive instructions to add SMP futex
support for ARM.
Since the ARM architecture does not provide instructions for
unprivileged exclusive memory accesses, we can only provide SMP futexes
when CPU domain support is disabled.
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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commit 522d7dec(futex: Remove redundant pagefault_disable in
futex_atomic_cmpxchg_inatomic()) added a bogus comment.
/* Note that preemption is disabled by futex_atomic_cmpxchg_inatomic
* call sites. */
Bogus in two aspects:
1) pagefault_disable != preempt_disable even if the mechanism we use
is the same
2) we have a call site which deliberately does not disable pagefaults
as it wants the possible fault to be handled - though that has been
changed for consistency reasons now.
Sigh. I really should have seen that when committing the above. :(
Catched-by-and-rightfully-ranted-at-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
LKML-Reference: <alpine.LFD.2.00.1103141126590.2787@localhost6.localdomain6>
Cc: Michel Lespinasse <walken@google.com>
Cc: Darren Hart <darren@dvhart.com>
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Change futex_atomic_op_inuser and futex_atomic_cmpxchg_inatomic
prototypes to use u32 types for the futex as this is the data type the
futex core code uses all over the place.
Signed-off-by: Michel Lespinasse <walken@google.com>
Cc: Darren Hart <darren@dvhart.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: David Howells <dhowells@redhat.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <20110311025058.GD26122@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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