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2012-04-13ENGR00179574: MX6- Add bus frequency scaling supportRanjani Vaidyanathan
Add support for scaling the bus frequency (both DDR and ahb_clk). The DDR and AHB_CLK are dropped to 24MHz when all devices that need high AHB frequency are disabled and the CORE frequency is at the lowest setpoint. The DDR is dropped to 400MHz for the video playback usecase. In this mode the GPU, FEC, SATA etc are disabled. To scale the bus frequency, its necessary that all cores except the core that is executing the DDR frequency change are in WFE. This is achieved by generating interrupts on un-used interrupts (Int no 139, 144, 145 and 146). Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2012-04-13net: wireless: bcmdhd: Allow 80211_HT capabilityDmitry Shmidt
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
2012-04-13ENGR00179582 MX6: Bypass PLL1 during WAITRanjani Vaidyanathan
When system is going to enter WAIT mode, set PLL1 to 24MHz so that ARM is running at 24MHz. This is a SW workaround for the WAIT mode issue. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2012-04-13ENGR00179513-3 V4L2: Add VDOA tiled format supportWayne Zou
Support for VDOA tiled format IPU_PIX_FMT_TILED_NV12 up to 1080p progressive streams, and IPU_PIX_FMT_TILED_NV12F tiled format up to xga interlaced streams currently. Signed-off-by: Wayne Zou <b36644@freescale.com>
2012-04-13ENGR00179513-2 IPU: Add TILED_NV12_FRAME_SIZE macro for consistencyWayne Zou
VPU needs 4K align buffer address for tiled format data output. Use this macro for IPU/V4L2/Apps to calculate the frame/field size. Signed-off-by: Wayne Zou <b36644@freescale.com>
2012-04-13ENGR00179513-1 VDOA: update software state before start vdoaWayne Zou
Fix a bug when vdoa interrupt happens before software state updated. Signed-off-by: Wayne Zou <b36644@freescale.com>
2012-04-13ENGR00179631 MX6 SabreSD: Add MIPI DSI Display supportWayne Zou
Add MIPI DSI Display support on mx6 SabreSD board. MIPI DSI needs pll3_pfd_540M clock source for 540MHz. if using ldb, the pll3_pfd_540M clock will be changed to 454Mhz. So add command line option disable_ldb when using MIPI DSI display. Signed-off-by: Wayne Zou <b36644@freescale.com>
2012-04-13ENGR00179628-2 MX6: add ssi info in sdmaGary Zhang
add ssi dual-fifo info in sdma structure Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-04-13ENGR00179628-1 SSI: enable dual-fifo feature as defaultGary Zhang
enable SSI dual-fifo feature as default setting Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-04-13ENGR00179621 MX6 PCIE: bring up PCIE on i.MX6 SD boardRichard Zhu
* Bring up the PCIE on i.MX6 SD board * Add the PCIE PHY access routines * Wrapper the board related codes by register one platform driver and data Signed-off-by: Richard Zhu <r65037@freescale.com>
2012-04-13ENGR00179498-2 SDMA: fix p2p sdma script errorChen Liangjun
Update p2p script firmware address in plat-imx-dma.c for MX6Q. Signed-off-by: Chen Liangjun <b36089@freescale.com>
2012-04-13ENGR00179498-1 SDMA: fix p2p sdma script errorChen Liangjun
The p2p script in SDMA binary file is invalid. The ESAI call ASRC can't work properly with this firmware. Update the firmware and script address. Signed-off-by: Chen Liangjun <b36089@freescale.com>
2012-04-13ENGR00179594 mx6dl sabresd: register second framebuffer deviceimx-android-r13.2.1Xinyu Chen
Though mx6dl only has one IPU, it can still support two DIs. So two LVDS or LVDS+HDMI should be supported. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2012-04-13ENGR00179485 fix CTS hang up issueRichard Liu
fix random hang up issue especially run CTS provided by Viv Signed-off-by: Richard Liu <r66033@freescale.com> Acked-by: Lily Zhang
2012-04-12ENGR00179485 fix android CTS hang up issueRichard Liu
fix android CTS hang up issue provided by Viv Signed-off-by: Richard Liu <r66033@freescale.com> Acked-by: Lily Zhang
2012-04-12ENGR00179510 ipu capture: fix system hang when running captureYuxi Sun
Add _ipu_get() and _ipu_put() when calling ipu_csi_get_sensor_protocol function. Signed-off-by: Yuxi Sun <b36102@freescale.com>
2012-04-12ENGR00179510 ipu capture: fix system hang when running captureYuxi Sun
Add _ipu_get() and _ipu_put() when calling ipu_csi_get_sensor_protocol function. Signed-off-by: Yuxi Sun <b36102@freescale.com>
2012-04-12ENGR00179284-4 support ONFI NAND device on mx6q_arm2_pop boardAllen Xu
if the NAND chip supports ONFI feature and the board supports ONFI DDR transfer mode, users could enable ONFI DDR transfer by add command line parameter "onfi_support" Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-12ENGR00179284-3 support ONFI NAND device on mx6q_arm2_pop boardAllen Xu
Add bch and gpmi register define for ONFI ddr feature Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-12ENGR00179284-2 support ONFI NAND device on mx6q_arm2_pop boardAllen Xu
enable ONFI NAND feature by command line parameter "onfi_support" Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-12ENGR00179284-1 support ONFI NAND device on mx6q_arm2_pop boardAllen Xu
Add a platform data to indicate whether the board support ONFI nand Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-12ENGR00179497-2 MX6Q SabreSD: fix SPI nor flash pin configRobin Gong
Default SPI nor flash pin config is wrong, correct it for SabreSD RevB Signed-off-by: Robin Gong <B38343@freescale.com>
2012-04-12ENGR00179497-1 ECSPI: disable ecspi clock after probe and spi transferRobin Gong
before, it enable spi clock after probe, never been disable unless driver removed. To reduce power, disable clock after probe, and enable it before every spi transfer and disable it after spi transfer Signed-off-by: Robin Gong <B38343@freescale.com>
2012-04-12ENGR00179367: cs42888 record fix damp routing settingsAdrian Alonso
* Fix cs42888 record DAMP routing settings for ADCx Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-04-12ENGR00179226: imx-esai remove tx personal reset during recordAdrian Alonso
* Remove transmitter personal reset during stream record this could potencially block concurrent play/record support. * Remove receiver personal reset calls, rx is always operational. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-04-11ENGR00179408 MX6DL:Increasing CPU voltage for 800MHz/400MHz/200MHz work pointsLin Fuzhen
It need add 25mV to 800MHz/400MHz/200MHz work points for MX6DL, otherwise system will crash when cpu freq switch to these work points Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
2012-04-11ENGR00177241-4 mx6 close APBH DMA clock when no I/O operationAllen Xu
Select APBH DMA automatically when enable GPMI NAND module. Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-11ENGR00177241-3 mx6 close APBH DMA clock when no I/O operationAllen Xu
When there is no NAND I/O operation, close all the reference clock, include GPMI,BCH and APBH clock. Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-11ENGR00177241-2 mx6 close APBH DMA clock when no I/O operationAllen Xu
When there is no NAND I/O operation, close all the reference clock, include GPMI,BCH and APBH clock. Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-11ENGR00177241-1 mx6 close APBH DMA clock when no I/O operationAllen Xu
When there is no NAND I/O operation, close all the reference clock, include GPMI,BCH and APBH clock. Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-10net: wireless: bcmdhd: Fix improper band handlingDmitry Shmidt
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
2012-04-10ENGR00179230: imx-esai add record support for S24_LE formatAdrian Alonso
* Add record support for S24_LE and S20_3LE bit format. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-04-10ENGR00179122 Fix SRCR configuration on SSI interfaceAlejandro Sierra
SRCR was bad configured on the DAI format configuration function on the imx-ssi.c file. When SSI was configured as master. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
2012-04-10ENGR00179123 AMFM I2C module to ARD platform for IMX6Q and IMX6DLAlejandro Sierra
Basic I2C module integration of AMFM module to ARD platform IMX6Q and IMX6DL rev A and rev B boards. Supported for kernel 3.0.15. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
2012-04-10ENGR00179129 Board support for I2C AMFM module for IMX6Q and IMX6DLAlejandro Sierra
Modifications in ARD board file to support the Audio for AMFM module for IMX6Q and IMX6DL (REV A and REV B) Supported for kernel 3.0.15. Also it contains the I2C configuration for the AMFM module. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
2012-04-10futex: Do not leak robust list to unprivileged processKees Cook
It was possible to extract the robust list head address from a setuid process if it had used set_robust_list(), allowing an ASLR info leak. This changes the permission checks to be the same as those used for similar info that comes out of /proc. Running a setuid program that uses robust futexes would have had: cred->euid != pcred->euid cred->euid == pcred->uid so the old permissions check would allow it. I'm not aware of any setuid programs that use robust futexes, so this is just a preventative measure. (This patch is based on changes from grsecurity.) Signed-off-by: Kees Cook <keescook@chromium.org> Cc: Darren Hart <dvhart@linux.intel.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Eric W. Biederman <ebiederm@xmission.com> Cc: David Howells <dhowells@redhat.com> Cc: Serge E. Hallyn <serge.hallyn@canonical.com> Cc: kernel-hardening@lists.openwall.com Cc: spender@grsecurity.net Link: http://lkml.kernel.org/r/20120319231253.GA20893@www.outflux.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-04-10futex: Simplify return logicThomas Gleixner
No need to assign ret in each case and break. Simply return the result of the handler function directly. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Darren Hart <dvhart@linux.intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-04-10futex: Cover all PI opcodes with cmpxchg enabled checkThomas Gleixner
Some of the newer futex PI opcodes do not check the cmpxchg enabled variable and call unconditionally into the handling functions. Cover all PI opcodes in a separate check. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org Cc: Peter Zijlstra <peterz@infradead.org> Cc: Darren Hart <dvhart@linux.intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-04-10ENGR00179243-2 Revert "ARM_CLK to PLL2_400MHz when ARM freq is below 400MHz."Xinyu Chen
This reverts commit 88d3af87222b37e454acd6a8de3b0cf18180da32. Signed-off-by: Xinyu CHen <xinyu.chen@freescale.com>
2012-04-10ENGR00179243-1: Revert "MX6-Fix TO1.0 boot-fail issue"Xinyu Chen
This reverts commit 599b1c5fb9275920b3f612e28b7d9c45a9688719. Signed-off-by: Xinyu CHen <xinyu.chen@freescale.com>
2012-04-09cpufreq: interactive: don't drop speed if recently at higher loadTodd Poynor
Apply min_sample_time to the last time the current target speed was originally requested or re-validated as appropriate for the current load, not to the time since the current speed was originally set. Avoids periodic dips in speed during bursty loads. Change-Id: I250bda657985de60373f9897cc41f480664d51a1 Signed-off-by: Todd Poynor <toddpoynor@google.com>
2012-04-09cpufreq: interactive: set at least hispeed when above hispeed loadTodd Poynor
If load is above go_hispeed_load, always go to at least hispeed_freq, even when reducing speed from a higher speed, not just when jumping up from minimum speed. Avoids running at a lower than intended speed after a burst of even higher load. Change-Id: I5b9d2a15ba25ce609b21bac7c724265cf6838dee Signed-off-by: Todd Poynor <toddpoynor@google.com>
2012-04-09cpufreq: interactive: apply intermediate load to max speed not currentTodd Poynor
Evaluate spikes in load (below go_hispeed_load) against the maximum speed supported by the device, not the current speed (which tends to make it too difficult to raise speed to intermediate levels until very busy). Change-Id: Ib937006abf8bedb60891a739acd733e89b732ae0 Signed-off-by: Todd Poynor <toddpoynor@google.com>
2012-04-09net: wireless: bcmdhd: Update to version 5.90.195.53Dmitry Shmidt
- Add retry to wl_cfg80211_mgmt_tx() for P2P - Change singal pending return value from -512 to -110 - Minor cleaning Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
2012-04-09ENGR00177317 - EPDC fb: Add clean-up for new EPDC buffer allocation schemeDanny Nold
- Added clean-up for new PxP output buffer allocation scheme. Clean-up covers cases where probe fails and where module is removed. Signed-off-by: Danny Nold <dannynold@freescale.com>
2012-04-09ENGR00175572 add NAND write verify supportAllen Xu
Add NAND write verify support in NAND code Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-04-09ENGR00179178 [RTC]Enable both wakealarm and common power wakeupAnson Huang
For RTC driver, as not all RTCs support alarm and wakeup, so the framework only support alarm or wakeup, not both of them, as our rtc can support alarm and wakeup function, to simplify the unit test interface for power off and wakeup, we add both wakealarm and common power wakeup sysfs interface to our RTC driver. Signed-off-by: Anson Huang <b20788@freescale.com>
2012-04-09ENGR00179155 mx6q sabresd: take volume down key as power keyXinyu Chen
Temporary workaround for real power key not functional. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2012-04-09Merge remote branch 'fsl-linux-sdk/imx_3.0.15' into imx_3.0.15_androidXinyu Chen
2012-04-09ENGR00179135: workaroud for hung in flush_cache_user_range()Huang Shijie
This patch is from Russell King's email. It's just a workaroud for a known but not fixed issue, please read the following email: http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/073083.html The root cause of this bug is : "We cant be holding the mmap_sem while calling flush_cache_user_range because the flush can fault. If we fault on a user address, the page fault handler will try to take mmap_sem again. Since both places acquire the read lock, most of the time it succeeds. However, if another thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in between the call to flush_cache_user_range and the fault, the down_read in do_page_fault will deadlock." Please read the email: http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/071708.html It seems from arm-v6, the cache flush can cause a page fault. Signed-off-by: Huang Shijie <b32955@freescale.com>
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