Age | Commit message (Collapse) | Author |
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OpenVG cannot go to the GPU MMU virtual mapping code,
This is regression from MGS-896 fix with the coding flaw,
The fix is to keep OpenVG check path as original code.
Date: Aug 09, 2015
Signed-off-by: Xianzhong <b07117@freescale.com>
(cherry picked from commit 112eb89c301d35fdfecb245e86f07b3fa6fec8fa)
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Moving the builtin EPDC firmware to linux-firmware-imx repository.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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Volume 255 corresponding to register value 0, the value 0 is default
value. In regcache_sync(), when the cache value is equal to default
value, this register will be skipped. So volume 255 isn't set to
register successfully.
The correct fix is to add software reset in runtime_resume, but cs42xx8
has no software reset, the hardware reset gpio pin is used by all the
perpherial device in ARD base board. So need to use another method.
In order to fix it, need to cherry-pick two patch from master branch.
Which will sync all the registers include the register which cache value
equal the default value, And remove regcache_mark_dirty().
Add update value of one register to make the cache_dirty if user press
the hardware reset pin on the board, then need to regcache_sync.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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Existing regmap users call regcache_mark_dirty() as part of the
suspend/resume sequence, to tell regcache that non-default values need to
be resynced post-resume. Add an internal "no_sync_defaults" regmap flag
to remember this state, so that regcache_sync() can differentiate between
these two cases:
1) HW was reset, so any cache values that match map->reg_defaults can be
safely skipped. On some chips there are a lot of registers in the
reg_defaults list, so this optimization speeds things up quite a bit.
2) HW was not reset (maybe it was just clock-gated), so if we cached
any writes, they should be sent to the hardware regardless of whether
they match the HW default. Currently this will write out all values in
the regcache, since we don't maintain per-register dirty bits.
Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Kevin Cernekee <cernekee@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 1c79771a7270278e6ff486edf4dfeb8c4fc01ee0)
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We're going to add another "does this register need syncing?" check, so
rather than repeating it in three places, we'll separate all of the
relevant logic into a helper function.
Signed-off-by: Kevin Cernekee <cernekee@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 3969fa080661dcdf20d04392b900189086e04c2c)
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After enable dynamic mmu mapping, all the address should be mapped
dynamically including the address located in static mapping region.
Since the static mapping is linear, the upper function can use the
mapped address as the physical address. However dynamic mapping break
this rule and cause some issues.
To keep the rule still work, limit dynamic mapping happens over the mmu
dynamic start address.
Date July 27, 2015
Signed-off-by: Shawn Xiao <b49994@freescale.com>
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In the original GPU driver, there is no way to map the virtual memory
dynamically. All the MMU table is built on beginning. However, there is
a chance that the system alloc the memory whoes address is beyond the
original MMU table region. When such kind of virtual address is passed
to GPU, there will be MMU excetion because of lacking necessary mapping.
This patch adds the case of gcvFEATURE_MMU in the hardware feature check
function. So that the virtual memory can be mapped dynamically.
Date July 14, 2015
Signed-off-by: Shawn Xiao <b49994@freescale.com>
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In low busfreq mode, set the MMDC0_MAARCR bit25~26 to
2b'01(Disable MMDC reorder), set to 2b'10 (Bypass MMDC ADOPT)
in high busfreq mode.
Signed-off-by: Bai Ping <b51503@freescale.com>
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At some situations, the ehci_bus_suspend may not set PORT_SUSPEND
due to port is not enabled, so add flag ehci->bus_suspended to
check if ehci_bus_suspend set PORT_SUSPEND or not.
We see "ci_hdrc ci_hdrc.0: timeout waiting for SUSPEND" wrongly when
plug in an unsupported usb device, in that case, the PORT_PE is cleared
and bus_suspend is called.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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- Add CONFIG_USB_OTG_WHITELIST and CONFIG_USB_HCD_TEST_MODE
- Change CONFIG_USB_EHSET_TEST_FIXTURE from 'm' to 'y'
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Moving the EPDC firmware to /lib/firmware/imx/epdc.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
(cherry picked from commit 9712d9cdd565280f8cc458af1e73e43dc677e29f)
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In commit 67a9ad9b8a6f ("mtd: nand: Warn the user if the selected ECC
strength is too weak"), a check was added to inform the user when the
ECC used for a NAND device is weaker than the recommended ECC
advertised by the NAND chip. However, the warning uses WARN_ON(),
which has two undesirable side-effects:
- It just prints to the kernel log the fact that there is a warning
in this file, at this line, but it doesn't explain anything about
the warning itself.
- It dumps a stack trace which is very noisy, for something that the
user is most likely not able to fix. If a certain ECC used by the
kernel is weaker than the advertised one, it's most likely to make
sure the kernel uses an ECC that is compatible with the one used by
the bootloader, and changing the bootloader may not necessarily be
easy. Therefore, normal users would not be able to do anything to
fix this very noisy warning, and will have to suffer from it at
every kernel boot. At least every time I see this stack trace in my
kernel boot log, I wonder what new thing is broken, just to realize
that it's once again this NAND ECC warning.
Therefore, this commit turns:
------------[ cut here ]------------
WARNING: CPU: 0 PID: 1 at /home/thomas/projets/linux-2.6/drivers/mtd/nand/nand_base.c:4051 nand_scan_tail+0x538/0x780()
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Not tainted 3.16.0-rc3-dirty #4
[<c000e3dc>] (unwind_backtrace) from [<c000bee4>] (show_stack+0x10/0x14)
[<c000bee4>] (show_stack) from [<c0018180>] (warn_slowpath_common+0x6c/0x8c)
[<c0018180>] (warn_slowpath_common) from [<c001823c>] (warn_slowpath_null+0x1c/0x24)
[<c001823c>] (warn_slowpath_null) from [<c02c50cc>] (nand_scan_tail+0x538/0x780)
[<c02c50cc>] (nand_scan_tail) from [<c0639f78>] (orion_nand_probe+0x224/0x2e4)
[<c0639f78>] (orion_nand_probe) from [<c026da00>] (platform_drv_probe+0x18/0x4c)
[<c026da00>] (platform_drv_probe) from [<c026c1f4>] (really_probe+0x80/0x218)
[<c026c1f4>] (really_probe) from [<c026c47c>] (__driver_attach+0x98/0x9c)
[<c026c47c>] (__driver_attach) from [<c026a8f0>] (bus_for_each_dev+0x64/0x94)
[<c026a8f0>] (bus_for_each_dev) from [<c026bae4>] (bus_add_driver+0x144/0x1ec)
[<c026bae4>] (bus_add_driver) from [<c026cb00>] (driver_register+0x78/0xf8)
[<c026cb00>] (driver_register) from [<c026da5c>] (platform_driver_probe+0x20/0xb8)
[<c026da5c>] (platform_driver_probe) from [<c00088b8>] (do_one_initcall+0x80/0x1d8)
[<c00088b8>] (do_one_initcall) from [<c0620c9c>] (kernel_init_freeable+0xf4/0x1b4)
[<c0620c9c>] (kernel_init_freeable) from [<c049a098>] (kernel_init+0x8/0xec)
[<c049a098>] (kernel_init) from [<c00095f0>] (ret_from_fork+0x14/0x24)
---[ end trace 62f87d875aceccb4 ]---
Into the much shorter, and much more useful:
nand: WARNING: MT29F2G08ABAEAWP: the ECC used on your system is too weak compared to the one required by the NAND chip
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
(cherry picked from commit 54c39e9ba3a93e3848ad8f9d082c39010cfc5e73)
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We do not want (care) the interrupt during we remove the otg function,
so move it beforehand.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 9ae22c687fd161dfff2e81512b50143fa154b9bb)
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load/unload module
The interrupt may occur (due to remove process may block interrupt)
after we remove hcd, in that case, we should not call hcd's interrupt
handler, otherwise, below NULL pointer dereference will occur, the reason
for this is we call free_irq later than hcd's. So after hcd has been
removed, we should not call hcd interrupt handler.
ci_hdrc ci_hdrc.0: remove, state 1
usb usb1: USB disconnect, device number 1
ci_hdrc ci_hdrc.0: USB bus 1 deregistered
[<800691e8>] (handle_irq_event) from [<8006c02c>] (handle_fasteoi_irq+0x84/0x14c)
[<8006c02c>] (handle_fasteoi_irq) from [<800687f4>] (generic_handle_irq+0x2c/0x3c)
[<800687f4>] (generic_handle_irq) from [<8000ed4c>] (handle_IRQ+0x40/0x90)
[<8000ed4c>] (handle_IRQ) from [<8000856c>] (gic_handle_irq+0x2c/0x5c)
[<8000856c>] (gic_handle_irq) from [<80012240>] (__irq_svc+0x40/0x70)
Exception stack(0x80db1f18 to 0x80db1f60)
1f00: 80db1f60 3b9aca00
1f20: 06f86934 0000000d 80dbe1c8 80dbe1c8 ee71e0d0 00000000 06f5bb01 0000000d
1f40: 80db0000 00000000 00000017 80db1f60 00000009 8049c19c 000d0013 ffffffff
[<80012240>] (__irq_svc) from [<8049c19c>] (cpuidle_enter_state+0x54/0xe4)
[<8049c19c>] (cpuidle_enter_state) from [<8049c2e0>] (cpuidle_idle_call+0xb4/0x14c)
[<8049c2e0>] (cpuidle_idle_call) from [<8000f07c>] (arch_cpu_idle+0x8/0x44)
[<8000f07c>] (arch_cpu_idle) from [<8006876c>] (cpu_startup_entry+0x100/0x14c)
[<8006876c>] (cpu_startup_entry) from [<80d52b10>] (start_kernel+0x350/0x35c)
--[ end trace 1160f590a7b228b3 ]--
Unable to handle kernel NULL pointer dereference at virtual address 000000b0
pgd = 80004000
[000000b0] *pgd=00000000
Internal error: Oops: 17 1 PREEMPT SMP ARM
Modules linked in: ci_hdrc_imx usbmisc_imx ci_hdrc udc_core ehci_hcd phy_mxs_usb mxc_v4l2_capture ipu_bg_overlay_sdc ipu_still ipu_prp_enc adv7180_tvin ipu_csi_enc v4l2_int_device ipu_fg_overlay_sdc mxc_mlb mxc_dcic evbug [last unloaded: phy_mxs_usb]
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.14.38-usb-host-otg-02047-ga4dec77 #13
task: 80dbbae8 ti: 80db0000 task.ti: 80db0000
PC is at usb_hcd_irq+0x4/0x38
LR is at handle_irq_event_percpu+0x50/0x180
pc : [<8040eed8>] lr : [<8006907c>] psr: a00d0193
sp : 80db1e98 ip : fffffffa fp : 00000000
r10: 80e1f13f r9 : d8009900 r8 : 0000004b
r7 : 00000000 r6 : 00000000 r5 : d800995c r4 : d8f2dec0
r3 : d2234010 r2 : d2234010 r1 : 00000000 r0 : 0000004b
Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 6920004a DAC: 00000015
Process swapper/0 (pid: 0, stack limit = 0x80db0238)
Stack: (0x80db1e98 to 0x80db2000)
1e80: d2234010 8006907c
1ea0: 0000004b ee71da00 d8009900 d800995c d8f2dec0 f4a00100 06f5bb01 0000000d
1ec0: 80db0000 800691e8 d8009900 d800995c 00000000 8006c02c 8006bfa8 0000004b
1ee0: 0000004b 800687f4 80dace54 8000ed4c f4a0010c 80db8970 80db1f18 8000856c
1f00: 00000009 8049c19c 000d0013 ffffffff 80db1f4c 80012240 80db1f60 3b9aca00
1f20: 06f86934 0000000d 80dbe1c8 80dbe1c8 ee71e0d0 00000000 06f5bb01 0000000d
1f40: 80db0000 00000000 00000017 80db1f60 00000009 8049c19c 000d0013 ffffffff
1f60: 06f86934 0000000d 80dc4a54 ee71e0d0 80db8574 ee71e0d0 00000000 00000000
1f80: 00000000 80e797f8 80dbe1c8 8049c2e0 00000000 80db0000 80db8574 806fe48c
1fa0: 80db0038 80e1f13d 80e1f13d 8000f07c 00000000 8006876c ffffffff 80d52b10
1fc0: ffffffff ffffffff 80d5258c 00000000 00000000 80d9ef30 00000000 10c53c7d
1fe0: 80db84fc 80d9ef2c 80dbcb80 1000406a 412fc09a 10008074 00000000 00000000
[<8040eed8>] (usb_hcd_irq) from [<8006907c>] (handle_irq_event_percpu+0x50/0x180)
[<8006907c>] (handle_irq_event_percpu) from [<800691e8>] (handle_irq_event+0x3c/0x5c)
[<800691e8>] (handle_irq_event) from [<8006c02c>] (handle_fasteoi_irq+0x84/0x14c)
[<8006c02c>] (handle_fasteoi_irq) from [<800687f4>] (generic_handle_irq+0x2c/0x3c)
[<800687f4>] (generic_handle_irq) from [<8000ed4c>] (handle_IRQ+0x40/0x90)
[<8000ed4c>] (handle_IRQ) from [<8000856c>] (gic_handle_irq+0x2c/0x5c)
[<8000856c>] (gic_handle_irq) from [<80012240>] (__irq_svc+0x40/0x70)
Exception stack(0x80db1f18 to 0x80db1f60)
1f00: 80db1f60 3b9aca00
1f20: 06f86934 0000000d 80dbe1c8 80dbe1c8 ee71e0d0 00000000 06f5bb01 0000000d
1f40: 80db0000 00000000 00000017 80db1f60 00000009 8049c19c 000d0013 ffffffff
[<80012240>] (__irq_svc) from [<8049c19c>] (cpuidle_enter_state+0x54/0xe4)
[<8049c19c>] (cpuidle_enter_state) from [<8049c2e0>] (cpuidle_idle_call+0xb4/0x14c)
[<8049c2e0>] (cpuidle_idle_call) from [<8000f07c>] (arch_cpu_idle+0x8/0x44)
[<8000f07c>] (arch_cpu_idle) from [<8006876c>] (cpu_startup_entry+0x100/0x14c)
[<8006876c>] (cpu_startup_entry) from [<80d52b10>] (start_kernel+0x350/0x35c)
Code: 11a002a0 03a00001 e12fff1e e92d4008 (e59130b0)
--[ end trace 1160f590a7b228b4 ]--
Kernel panic - not syncing: Fatal exception in interrupt
CPU2: stopping
CPU: 2 PID: 1483 Comm: modprobe Tainted: G D W 3.14.38-usb-host-otg-02047-ga4dec77 #13
[<80014a68>] (unwind_backtrace) from [<80011758>] (show_stack+0x10/0x14)
[<80011758>] (show_stack) from [<806f5fe8>] (dump_stack+0x7c/0xbc)
[<806f5fe8>] (dump_stack) from [<800139f0>] (handle_IPI+0x144/0x158)
[<800139f0>] (handle_IPI) from [<80008598>] (gic_handle_irq+0x58/0x5c)
[<80008598>] (gic_handle_irq) from [<80012240>] (__irq_svc+0x40/0x70)
Exception stack(0xd96c5dc0 to 0xd96c5e08)
5dc0: d800995c 0000004b 00000000 00072004 d8f2dec0 d8009900 d800995c 0000004b
5de0: d800995c a00f0013 00000000 010f2280 fffffffa d96c5e08 00000000 8006926c
5e00: 000f0013 ffffffff
[<80012240>] (__irq_svc) from [<8006926c>] (synchronize_irq+0x18/0xa8)
[<8006926c>] (synchronize_irq) from [<800696dc>] (__free_irq+0xfc/0x1c4)
[<800696dc>] (__free_irq) from [<80069838>] (free_irq+0x4c/0xa4)
[<80069838>] (free_irq) from [<8034b760>] (release_nodes+0x16c/0x1cc)
[<8034b760>] (release_nodes) from [<803487ec>] (__device_release_driver+0x78/0xcc)
[<803487ec>] (__device_release_driver) from [<8034885c>] (device_release_driver+0x1c/0x28)
[<8034885c>] (device_release_driver) from [<8034827c>] (bus_remove_device+0xdc/0x108)
[<8034827c>] (bus_remove_device) from [<80345788>] (device_del+0x100/0x1a4)
[<80345788>] (device_del) from [<8034a218>] (platform_device_del+0x18/0x9c)
[<8034a218>] (platform_device_del) from [<8034a2a8>] (platform_device_unregister+0xc/0x20)
[<8034a2a8>] (platform_device_unregister) from [<7f61932c>] (ci_hdrc_remove_device+0xc/0x20 [ci_hdrc])
[<7f61932c>] (ci_hdrc_remove_device [ci_hdrc]) from [<7f631260>] (ci_hdrc_imx_remove+0x2c/0xdc [ci_hdrc_imx])
[<7f631260>] (ci_hdrc_imx_remove [ci_hdrc_imx]) from [<8034a350>] (platform_drv_remove+0x18/0x30)
[<8034a350>] (platform_drv_remove) from [<803487e4>] (__device_release_driver+0x70/0xcc)
[<803487e4>] (__device_release_driver) from [<80348ef4>] (driver_detach+0xac/0xb0)
[<80348ef4>] (driver_detach) from [<803484e4>] (bus_remove_driver+0x4c/0xa0)
[<803484e4>] (bus_remove_driver) from [<80084158>] (SyS_delete_module+0x11c/0x17c)
[<80084158>] (SyS_delete_module) from [<8000e460>] (ret_fast_syscall+0x0/0x30)
CPU3: stopping
CPU: 3 PID: 0 Comm: swapper/3 Tainted: G D W 3.14.38-usb-host-otg-02047-ga4dec77 #13
[<80014a68>] (unwind_backtrace) from [<80011758>] (show_stack+0x10/0x14)
[<80011758>] (show_stack) from [<806f5fe8>] (dump_stack+0x7c/0xbc)
[<806f5fe8>] (dump_stack) from [<800139f0>] (handle_IPI+0x144/0x158)
[<800139f0>] (handle_IPI) from [<80008598>] (gic_handle_irq+0x58/0x5c)
[<80008598>] (gic_handle_irq) from [<80012240>] (__irq_svc+0x40/0x70)
Exception stack(0xd80b1f50 to 0xd80b1f98)
1f40: d80b1f98 3b9aca00 256aed09 0000000d
1f60: 80dbe1c8 80dbe1c8 ee7360d0 00000000 25477984 0000000d d80b0000 00000000
1f80: 00000017 d80b1f98 00000009 8049c19c 00070013 ffffffff
[<80012240>] (__irq_svc) from [<8049c19c>] (cpuidle_enter_state+0x54/0xe4)
[<8049c19c>] (cpuidle_enter_state) from [<8049c2e0>] (cpuidle_idle_call+0xb4/0x14c)
[<8049c2e0>] (cpuidle_idle_call) from [<8000f07c>] (arch_cpu_idle+0x8/0x44)
[<8000f07c>] (arch_cpu_idle) from [<8006876c>] (cpu_startup_entry+0x100/0x14c)
[<8006876c>] (cpu_startup_entry) from [<10008624>] (0x10008624)
CPU1: stopping
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit 402f2d38e22007e931dc3dd52a69c0fed88452bf)
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When do usb driver module load and unload loop test for A-device, the
hrtimer may be cancelled during otg state machine running, so after
the hrtimer is cancelled, the otg state machine may start it again by
adding a new timer, this will cause the hrtimer will be active after
its function memory is freed by module unload. This patch is to fix it
by trying to hold the fsm mutex lock before setting otg state to be
undefined, then otg hrtimer will be cancelled after current otg fsm
transition completes, and no new timer will be added.
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit 8c3ab4f22bc34675aeb8f9c62e69b450a179be0f)
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The Bypass 'MMDC ADOPT' option shows better DRAM utilization result.
To fully enable the Bypass MMDC ADOPT option the DRAM low power mode
sequence needs to be updated.
Signed-off-by: Bai Ping <b51503@freescale.com>
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Remove unnecessary clk enable/disable calls. This will
make the driver logic clear and easier to maintaine.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
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When the fb is in blank mode, do set_par has no real meaning.
So delaying this action in the later unblank request.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
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The value bpp of fbi->var can be initialized according to kernel
parameter video option.
But, for some cases, there is no video option.
In these cases, the bpp value should be configured according to the
'bpp' property in dtb if provided, otherwise the frame buffer will
always work in bpp 16 mode
Signed-off-by: Sandor Yu <R01008@freescale.com>
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If the thermal driver probe failed after the thermal_clk has been enabled,
disable the thermal_clk before return.
Signed-off-by: Bai Ping <b51503@freescale.com>
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Adding 'is_prepared' callback function for pllv3 type clk to make sure when
the system is bootup, the unused clk is in a known state to match the prepare
count info.
Signed-off-by: Bai Ping <b51503@freescale.com>
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If in low power idle, we use the RC-OSC to reduce the power consumption,
the RC-OSC freq need to be adjusted, otherwise, the RC-OSC freq is not
very accurate. It may lead to system instability issue.
Signed-off-by: Bai Ping <b51503@freescale.com>
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With commit e585c40ba (Input: ads7846 - convert to
hwmon_device_register_with_groups()) the device passed to the attribute's
show function isn't the spi device as before.
So fixup the passed device to ads7846_read12_ser.
Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
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mx6s capture driver will check the return value
of s_mbus_fmt, captuer driver will failed if subdev
driver no s_mbus_fmt function.
so add s_mbus_fmt function to vadc subdev driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Add FB_VMODE_YWRAP support in mxsfb driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Enable mxsfb frame buffer update by FBIOPUT_VSCREENINFO ioctl.
The patch cherry pick from android branch.
MA-5963-4 Upgrade kernel version from 3.10.y to 3.14.y
Backport imx_3.10_y_android's mxsfb driver to add vsync timestamp
Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
(cherry picked from commit 8f24453e0b081f16338916f75ce73dc896f93f8e)
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Do some code logic refinement for lcdif driver to make it
more reasonable and strong. set_par and enable_controller
calling sequences should be more exact.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
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In tsc2046 touch driver, the values such as ti,x-min is defined as a u16
value. the driver use API of_property_read_u16() read the value. For these
u16 value, the dts entry should be like:
property = /bits/ 16 <0x5000>;
This describe the property as a u16 value.
if the dts entry write like following:
property = <0x5000>;
of subsystem will read this property as a u32 value in default. Due to the
DTB file is big-endian, and our memory system is little endian, this will
make the driver can't read the correct value.
This patch correct the format of u16 values, and set the default value defined
in tsc2046 touch driver.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Add HSIC support for imx7d. We have not supported HSIC as system
wakeup as well as HSIC remote wakeup function at DSM mode, since
the 24M OSC can't be off and the SoC internal regulators can't be
off at this mode, that will keep power consumption much higher.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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In this notifier, we can power on/off the two LDO's which are needed
for USB HSIC.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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- Enable the USB HSIC port
- Add pin control for USB HUB 24M clock
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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There are two power supplied for USB HSIC, one is VDD_1P2_CAP, another
is VDD_HSIC_1P0. The VDD_1P2_CAP is analog reg which can be controlled
by PMU, but we set the override bit and let the gpc control it, without
this setting, the USB module can't get the clock properly.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add Makefile entry for imx7d-12x12-ddr3-arm2.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Because of the delay of auto suspend, the nand clocks are delayed to
disable when calling the clk_set_rate. This causes the clk_set_rate
failed on some platforms like 6q/6qp, and finally lead the NAND not
working.
Signed-off-by: Ye.Li <Ye.Li@freescale.com>
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for data commands
Due to the data may be still in transferring if a cmd error of data
command happens, the next quick reset during data transfer may cause host
controller unpridicable issues.
e.g. On MX6Q/MX6QP, if reset during ADMA is busy moving data from FIFO to
memory, we can observe 32 bytes lost issue sometimes in a very lower
possibility especially for SD3.0 cards because the tuning command can easily
fail on cmd error before data transfer complete.
Let's using data error interrupts to handle transfer error of a
data command instead of only checking cmd error, then can make sure
the next safe reset only happens when data transfer is done.
After fixing, the SD3.0 can pass 3 days reboot stress test while it could
easily fail on only one night stress test before.
Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
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When dma mapping (dma_map_sg) fails in sdhci_pre_dma_transfer, -EINVAL
is returned. There are 3 callers of sdhci_pre_dma_transfer:
* sdhci_pre_req and sdhci_adma_table_pre: handle negative return
* sdhci_prepare_data: handles 0 (error) and "else" (good) only
sdhci_prepare_data is therefore broken. When it receives -EINVAL from
sdhci_pre_dma_transfer, it assumes 1 sg mapping was mapped. Later,
this non-existent mapping with address 0 is kmap'ped and written to:
Corrupted low memory at ffff880000001000 (1000 phys) = 22b7d67df2f6d1cf
Corrupted low memory at ffff880000001008 (1008 phys) = 63848a5216b7dd95
Corrupted low memory at ffff880000001010 (1010 phys) = 330eb7ddef39e427
Corrupted low memory at ffff880000001018 (1018 phys) = 8017ac7295039bda
Corrupted low memory at ffff880000001020 (1020 phys) = 8ce039eac119074f
...
So teach sdhci_prepare_data to understand negative return values from
sdhci_pre_dma_transfer and disable DMA in that case, as well as for
zero.
It was introduced in 348487cb28e66b032bae1b38424d81bf5b444408 (mmc:
sdhci: use pipeline mmc requests to improve performance). The commit
seems to be suspicious also by assigning host->sg_count both in
sdhci_pre_dma_transfer and sdhci_adma_table_pre.
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: stable@vger.kernel.org # 4.0+
Fixes: 348487cb28e6
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Haibo Chen <haibo.chen@freescale.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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The color is incorrect for 24bpp and 32 bpp framebuffer.
Needed to add cases to support 24bpp and 32bpp.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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Add dts for mx6ul-14x14-lpddr2-arm2 board.
Basic function tested: SD1/EMMC2/ENET/UART1 is ok.
This patch takes mx6ul-14x14-ddr3-arm2.dts as a reference.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The driver will now read the firmware header and detect whether basic
or advanced alogorithms are used.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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When hdmi driver rebuild a new modelist, the fbi var may
overwrited by fbcon.
Reinitialize fbi var when video mode same as previous to
fix this issue.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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The VSELECT for 1.8V does not work on PMIC board, so should not use
it for SD1.
Signed-off-by: Ye.Li <Ye.Li@freescale.com>
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Export the symbols to fix the below errors when built as modules:
ERROR: "tso_build_data" [drivers/net/ethernet/marvell/mvneta.ko] undefined!
ERROR: "tso_build_hdr" [drivers/net/ethernet/marvell/mvneta.ko] undefined!
ERROR: "tso_start" [drivers/net/ethernet/marvell/mvneta.ko] undefined!
ERROR: "tso_count_descs" [drivers/net/ethernet/marvell/mvneta.ko] undefined!
ERROR: "tso_build_data" [drivers/net/ethernet/marvell/mv643xx_eth.ko] undefined!
ERROR: "tso_build_hdr" [drivers/net/ethernet/marvell/mv643xx_eth.ko] undefined!
ERROR: "tso_start" [drivers/net/ethernet/marvell/mv643xx_eth.ko] undefined!
ERROR: "tso_count_descs" [drivers/net/ethernet/marvell/mv643xx_eth.ko] undefined!
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The vsync and frame_done irqs should be cleared in the ISR.
Otherwise, the unrequired irq may be triggered in a wrong
moment.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
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After introduce otg features in dts, and remove hnp_enable, we should update
otg test document for how to enable HNP, SRP and ADP.
Signed-off-by: Li Jun <jun.li@freescale.com>
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Disable all otg features for otg1 port of imx7d-sdb board, then
the otg port can only do role swtich by ID pin state.
Signed-off-by: Li Jun <jun.li@freescale.com>
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Disable all otg features for otg1 port of imx7d-12x12-lpddr3-arm2 board, then
the otg port can only do role swtich by ID pin state.
Signed-off-by: Li Jun <jun.li@freescale.com>
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Disable all otg features for otg1 port of imx7d-12x12-ddr3-arm2 board, then
the otg port can only do role swtich by ID pin state.
Signed-off-by: Li Jun <jun.li@freescale.com>
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Disable all otg features for otg1 port of imx6sx-sdb board, then
the otg port can only do role swtich by ID pin state.
Signed-off-by: Li Jun <jun.li@freescale.com>
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Disable all otg features for otg1 port of imx6sx-sabreauto board, then
the otg port can only do role swtich by ID pin state.
Signed-off-by: Li Jun <jun.li@freescale.com>
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Disable all otg features for otg1 port of imx6sx-19x19-arm2 board, then
the otg port can only do role swtich by ID pin state.
Signed-off-by: Li Jun <jun.li@freescale.com>
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