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The resources for the I2C1 and I2C2 instance were missing. When
adding them from the board file, this could lead to a not working
instance of the I2C driver or other undefined behaviour.
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Enable the SRTC as wakeup source in order to enable Vybrid modules
to be waken up by the RTC alarm functionaity.
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On Vybrid, the machine/architecture specific code seems not to
enable wakeup for devices, hence force RTC as wakeup source in
the driver.
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The smbus block read is not currently supported for imx i2c devices.
This patchset adds the support to imx i2c bus so that blocks of data
can be read using SMbus block reads.(using i2c_smbus_read_block_data()
function from the i2c_core.c.). Tested with 3.10.9 kernel.
Reviewed-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Kaushal Butala <kaushalkernelmailinglist@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
[backported to Toradex 3.0 branch from 8e8782c71595a5ad29e234ce6b3d2fce787fb07a]
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Adding the i2c_add_numbered_adapter might already lead to calls
of i2c_imx_xfer, which requires the semaphore to be assigned.
Hence we should assign the semaphore before add the I2C adapter.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Don't disable I2C clock between each transfers. Instead, disable the
module internally between the transfers. This also fixes SMBus
multi-block transfers.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
[Removed uncommented clk_enable/disable calls]
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abort pending TX
In patch
0d1862e can: flexcan: fix flexcan_chip_start() on imx6
the loop in flexcan_chip_start() that iterates over all mailboxes after the
soft reset of the CAN core was removed. This loop put all mailboxes (even the
ones marked as reserved 1...7) into EMPTY/INACTIVE mode. On mailboxes 8...63,
this aborts any pending TX messages.
After a cold boot there is random garbage in the mailboxes, which leads to
spontaneous transmit of CAN frames during first activation. Further if the
interface was disabled with a pending message (usually due to an error
condition on the CAN bus), this message is retransmitted after enabling the
interface again.
This patch fixes the regression by:
1) Limiting the maximum number of used mailboxes to 8, 0...7 are used by the RX
FIFO, 8 is used by TX.
2) Marking the TX mailbox as EMPTY/INACTIVE, so that any pending TX of that
mailbox is aborted.
Cc: linux-stable <stable@vger.kernel.org>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
[backported for 3.0 kernel by Stefan Agner <stefan.agner@toradex.com>]
d5a7b406c529e4595ce03dc8f6dcf7fa36f106fa
can: flexcan: flexcan_chip_start: fix regression, mark one MB for TX and abort pending TX
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Enable fhandle syscall which is required for newer systemd versions.
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Add parameter to define the minimal pressure required to be interpreted
as a touch event. Also filter out unusual high pressure since this
means there is no touch screen connected.
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This adds a new FlexTimer PWM driver in favor of the old PWM driver.
The new driver allows to make use of the individual PWM channels
independently. However, the PWM period need to be the same for all
PWM channels on the same FlexTimer instance. If the period differs,
the driver would overwrites the period of a previously configured
PWM output.
For Colibri VF, we register FTM0/1 only since those instances are
used for PWM support. Also we use the same PWM period of 1ms for
all outputs.
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Now that we are shipping Colibri VF61 V1.1a with modified audio master
clock pinmux get rid of temporary workaround of using PTB18 instead.
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Remove Video for Linux on Vybrid since Video is not (yet) supported
on Vybrid. Also compile NTFS into the kernel and remove some CD-ROM
file systems.
Use make savedefconfig which generates a minimal configuration file.
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3.0-vybrid-ts2.17
Conflicts:
arch/arm/plat-mxc/include/mach/iomux-mvf.h
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This enables CAN support for Colibri VFxx if CONFIG_CAN_FLEXCAN is
seleced. There is also an example how to make use of the transceiver
switch to enable the transceiver on demand (e.g. using a GPIO).
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Extend FlexCAN driver to support Vybrid. Vybrids variant of the IP
has ECC support which is controlled through the memory error
control register (MECR). There is also an errata which leads to
false positive error detections (ID e5295). This patch disables
the memory error detection completely.
Extend the clock control for FlexCAN to enable the clocks.
Fix the base addresses and introduce the necessary pinmux defines.
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In flexcan_chip_enable() and flexcan_chip_disable() fixed delays are used.
Experiments have shown that the transition from and to low power mode may take
several microseconds.
This patch adds a while loop which polls the Low Power Mode ACK bit (LPM_ACK)
that indicates a successfull mode change. If the function runs into a timeout a
error value is returned.
This is a simpliefied backport of
can: flexcan: fix transition from and to low power mode in chip_{en,dis}able
9b00b300e7bce032c467c36ca47fe2a776887fc2
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Currently the flexcan driver uses hardware local echo. This blindly
echos all transmitted frames to all receiving sockets, regardless what
CAN_RAW_RECV_OWN_MSGS and CAN_RAW_LOOPBACK are set to.
This patch now submits transmitted frames to be echoed in the transmit
complete interrupt, preserving the reference to the sending
socket. This allows the can protocol to correctly handle the local
echo.
Further this patch moves tx_bytes statistic accounting into the tx_complete
handler.
Signed-off-by: Reuben Dowle <reuben.dowle@navico.com>
[mkl: move tx_bytes accounting into tx_complete handler; cleanups]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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can_get_echo_skb() is usually called in the TX complete handler.
The stats->tx_packets and stats->tx_bytes should be updated there, too.
This patch simplifies to figure out the size of the sent CAN frame.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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The flexcan is still in disable mode during suspend if it's still
not up. We do not need to enter stop mode if find the device is not
up since the stop mode does not work well in disable mode(remote wakeup
does not work).
Using disable mode for suspend if it's not up.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Clean up duplicated code and hide the details of enter/exit
stop mode into API.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Currently flexcan only exits stop mode by remote wakeup,
if system resumes normally, the flexcan may still in stop mode
and can not work anymore.
Change to also exit stop mode during normal resume in case system
is not remote wakeup by flexcan.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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The root cause is missed to set CAN2_STOP_REQ in iomuxc
group register which is used to support can wakeup feature.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Issues reported in commit aed6c4fe5 have now been fixed.
Signed-off-by: Anthony Felice <tony.felice@timesys.com>
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Signed-off-by: Anthony Felice <tony.felice@timesys.com>
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Signed-off-by: Anthony Felice <tony.felice@timesys.com>
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The gic_enable_ppi() function is used with the global timer when resuming
from STOP mode on the Vybrid Tower. With the __cpuinit attribute set, the
gic_enable_ppi() function would have already been freed once the kernel
finishes loading, causing a kernel oops when attempting to resume from STOP mode.
Signed-off-by: Anthony Felice <tony.felice@timesys.com>
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3.0-vybrid-ts2.16
Conflicts:
drivers/tty/serial/mvf.c
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Use the more common name "fsl_nfc" instead of "NAND" for this
device. This also affects the mtdparts option of the kernel
command line.
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Add correct chip select handling. This is required when using
mainline U-Boot since chip select is properly done there as well.
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Hardware ECC was enabled, however the result of the ECC check was
actually ignored. This patch checks the result and acts accordingly.
Also, enable ECC hardware for every page (which is required for
UBIFS, this might be a relict of JFFS2 support).
The driver passes the mtd_pagetest.
Bits an pieces taken from the RFC mainline driver from Bill
Pringlemeir.
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In order to properly support VF50 V1.1 and older modules we need
to move the GPIOs to platform data. This is anyway the cleaner
and easier maintainable solution.
Also raise pressure threshold to a reasonable level for our
resistive touchscreens.
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UART3 and UART4 are possible additions to a custom Colibri carrier
board. This patch muxes RX/TX pins for those UARTs, as well as
enables DMA and FIFO for those instances.
However, UART3 conflicts with Colibris default SD card data pins,
so this option disables SD-Card support (SDHC1).
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Add alternative pinmux and platform data for second Ethernet. Also
make sure MAC address is calculated from first Ethernet MAC address,
which is derived from part serial number. Note that FEC1 is the
default Ethernet controller (and hence eth0), while FEC0 is the
additional Ethernet controller (eth1).
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Since update_sched_clock only supports 32-bit timer, we should
initialize sched_clock with this bitness too. This avoids sched
clock time jumping backwards from time to time.
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In low latency mode, tty_flip_buffer_push should be called from
interrupt context. However, because flush_to_ldisc is not safe
to call from interrupt, the user get a kernel message "BUG:
scheduling while atomic". This is actually a kernel bug, which
essentially breaks low latency.
Using a work queue works around this, however, it also makes
the low latency mode useless. In non-low latency mode, the
tty code uses a work queue too.
So, don't use our own work queue to work around a kernel bug.
Instead rely on work queue implementation in the tty code,
disable the UPF_LOW_LATENCY feature and hope the low latency
bug itself gets fixed eventually.
This is also the way the proposed upstream driver works.
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When data are pending and altering FIFO size and flushing FIFO,
we end up having the UARTSR1_RDRF (receive data register full)
bit set while UARTSFIFO_RXEMPT (FIFO empty) is set too. We check
the second flag in the interrupt routine, which is set, and hence
don't read the data register. This leads to an interrupt storm,
which never gets handled properly.
However, we can not check the UARTSR1_RDRF flag in the interrupt
routine, since reading data in this case would misalign the
FIFO buffer. Hence we should make sure there are no data before
dealing with the FIFO.
This fixes a race condition during bootup: when a character was
sent between imx_console_setup and imx_startup, the kernel got
stuck in a interrupt storm. Another character usually fixed
that storm.
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EDMA enabled in the UART configuration prevents ADC from working in MQX 4.0.2.
We also disable EDMA with UART in other Vybrid variants due to an
incompatibility with sysvinit.
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is disabled in UART config. The receive interrupt was attempting to schedule a work queue only defined if EDMA is enabled.
kernel BUG at kernel/workqueue.c:1037!
Unable to handle kernel NULL pointer dereference at virtual address 00000000
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3.0-vybrid-ts2.13
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Add platform data for PWM channels B, C and D to be LED PWM. The
PWM value can now be set from userspace using /sys/class/leds/PWM*.
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The AC97 driver is not yet finished and has problems with power
management. Build it as a module so users can load it if required.
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The Colibri Evaluation Board V3.1a has a on-board SPI CAN controller
MCP251X. This patch adds platform data for this device. However, to
have CAN support, some configuration have to be enabled:
CONFIG_CAN
CONFIG_CAN_RAW
CONFIG_CAN_BCM
CONFIG_CAN_DEV
Plus support for the SPI device itself:
CONFIG_CAN_MCP251X
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Fix registers and channels for SPI1, however using SPI with DMA
still doesn't work (dspi_interrupt doesn't fire).
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Use the supplied parent clock for SPI clock calculation. This
results in correct clock calculation for 396MHz/500MHz Vybrid
SoCs. Also fix an calculation issue: Another division by 2 is
not required, the prescaler is taken into account already.
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Enable Colibri SPI pins using DSPI1. Define required clocks for
DSPI1 and initialize the device on init. Currently the device
is available through spidev (/dev/spidev1.0).
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Define drivers supported mode using mode_bits. This fixes warnings
which claim that hardware don't support modes which actually are
supported, e.g.
[ 64.586777] spidev spi1.0: setup: unsupported mode bits 3
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All supported Micrel PHYs implement the standard "power down" bit 11 of BMCR,
so this patch adds support using the generic genphy_{suspend,resume} functions.
Backported patch by Patrice Vilchez, see
1a5465f5d6a23e84ef5c06cb32f3d8c26632f42a
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Register wake-up pins on SO-DIMM 43/45 (PTB19/PTB20) to trigger
on falling edge. This allows to wake up the SoC from low-power
modes such das suspend-to-RAM or standby.
Also, on standby (when pheripherials are on) we allow to wake
using serial interrupt (UART0).
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