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When do stream on/off in pair repeatedly without close the v4l device,
the kernel dump happens:
Unable to handle kernel paging request at virtual address 00200200
pgd = c0004000
[00200200] *pgd=00000000
Internal error: Oops: 805 [#1] PREEMPT
Modules linked in:
CPU: 0 Not tainted (3.0.35-06027-gbbea887-dirty #21)
PC is at camera_callback+0x15c/0x1c8
LR is at 0x200200
pc : [<c03747d0>] lr : [<00200200>] psr: 20000193
sp : c0b0fed0 ip : 00200200 fp : daf1102c
r10: daf11034 r9 : 00100100 r8 : daf11098
r7 : daf11100 r6 : daf11034 r5 : daf11000 r4 : c0b0e000
r3 : 00000000 r2 : 00000001 r1 : 00000001 r0 : daf114b8
Flags: nzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 8cc8c059 DAC: 00000015
...
Process swapper (pid: 0, stack limit = 0xc0b0e2e8)
Stack: (0xc0b0fed0 to 0xc0b10000)
fec0: c0374674 822a4000 daf11000 c0b87eb4
fee0: 00000000 00000027 c0b73904 c0b305e0 00000001 c0374090 da2bbbe0 c0b0e000
ff00: 00000000 c00acc58 00000000 c0098058 00989680 c0b305e0 c0b0e000 00000000
ff20: 00000002 00000001 c0b0e000 00000000 00000000 c00acdf8 00000000 c0b0e000
ff40: 9e4e7881 c0b305e0 c0b0e000 c00aee44 c00aed9c c0b43c6c 00000027 c00ac634
ff60: 00000270 c004257c ffffffff f2a00100 00000027 c00417cc 20000000 00000006
ff80: f40c4000 00000000 c0b0e000 c0b6a924 c0b1876c c0b18764 80004059 412fc09a
ffa0: 00000000 00000000 c0063a40 c0b0ffc0 c004f758 c0042690 80000013 ffffffff
ffc0: c004266c c004294c c0b1013c 00000000 c10960c0 c00088ec c0008334 00000000
ffe0: 00000000 c00337d4 10c53c7d c0b10060 c00337d0 80008040 00000000 00000000
[<c03747d0>] (camera_callback+0x15c/0x1c8) from [<c0374090>] (csi_irq_handler+
0x7c/0x160)
[<c0374090>] (csi_irq_handler+0x7c/0x160) from [<c00acc58>] (
handle_irq_event_percpu+0x50/0x19c)
[<c00acc58>] (handle_irq_event_percpu+0x50/0x19c) from [<c00acdf8>] (
handle_irq_event+0x54/0x84)
[<c00acdf8>] (handle_irq_event+0x54/0x84) from [<c00aee44>] (handle_fasteoi_irq
+0xa8/0x160)
[<c00aee44>] (handle_fasteoi_irq+0xa8/0x160) from [<c00ac634>] (
generic_handle_irq+0x2c/0x40)
[<c00ac634>] (generic_handle_irq+0x2c/0x40) from [<c004257c>] (handle_IRQ
+0x30/0x84)
[<c004257c>] (handle_IRQ+0x30/0x84) from [<c00417cc>] (__irq_svc+0x4c/0xa8)
[<c00417cc>] (__irq_svc+0x4c/0xa8) from [<c0042690>] (default_idle+0x24/0x28)
[<c0042690>] (default_idle+0x24/0x28) from [<c004294c>] (cpu_idle+0x8c/0xc0)
[<c004294c>] (cpu_idle+0x8c/0xc0) from [<c00088ec>] (start_kernel+0x294/0x2e4)
[<c00088ec>] (start_kernel+0x294/0x2e4) from [<80008040>] (0x80008040)
Code: e88c4200 e595c030 e5858030 e8881800 (e58c8000)
---[ end trace 224150c26d2bd5f7 ]---
The root cause is cam->enc_counter is not re-initialized to 0 when calls
STREAMOFF ioctl, and then in DQBUF ioctl wait_event_interruptible_timeout()
sees the condition is true and access cam->done_q queue which has no strict
check and could be empty.
This patch adds the re-initialization and the sanity check.
Also, add the pointer check for memcpy because the destination may be
NULL on UERSPTR mode.
Signed-off-by: Robby Cai <R63905@freescale.com>
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The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
But according to ARM PL310 errata: 752271
ID: 752271: Double linefill feature can cause data corruption
Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
Workaround: The only workaround to this erratum is to disable the
double linefill feature. This is the default behavior.
[in the commit:c483abdca0011c1342bad42f16925dd5a2c7c091]
ENGR00271977-1 imx6_defconfig: enable PL310_ERRATA_769419
There is one error in the commit log, the correct PL310 version in
i.MX6DL/SOLO should be r3p2, not r3p1-50rel0.
so, PL310_ERRATA_769419, will not apply to i.MX6DL/SOLO. But since we build
one image to support both i.MX6Q and i.MX6DL/SOLO, the ideal solution is to
manage this errata in dynamic way. Someone did post the patches here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/145593.html
As the discussion on the above link, Russell King, the ARM arch maintainer said:
"As I already said, there is _no_ point making the barrier conditional;
it's probably more expensive to make it conditional than just to execute
it every time. But we still might as well optimize it away if we are
running _only_ on platforms which _do_ _not_ have that errata."
So, we will turn on the PL310_ERRATA_769419 on both i.MX6D/Q and i.MX6DL/SOLO.
Signed-off-by: Jason Liu <r64343@freescale.com>
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There's an interim buffer which should only be used when PxP CSC is used.
Otherwise the video buffer gets incorrect data by copying the content of
interim buffer. The patch fixes this by moving the memcpy to the right place.
Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit 8e0b8ff485dd7cdeabc653f1e27c271ac923710e)
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One bd actually needs 4KB page size. So changed the iram_alloc()
size parameter to allocate a precise iram memory for bd.
This patch also removed the extra iram pool for SDMA due to its
insufficient total size: SDMA allows around 48 channels to work
simultaneously, so it's better to allocate memory from iram pool
directly.
[There will be 3KB size waste in sdma->channel_control, which is
640B but actually using 4KB due to 4KB alignment for iram pool.]
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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This reverts commit 7b60e285b7b019185389326c2d989f5e42d9736e.
With the commit 881e21c1 and 7b60e285, the system will hang when do suspend
and resume stress test continuouly while run edpc test in the background.
Revert it now and revisit it later.
Signed-off-by: Robby Cai <R63905@freescale.com>
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This reverts commit 881e21c1275dcc40ccd63fb4fa46b990eeb4fb00.
With the commit 881e21c1 and 7b60e285, the system will hang when do suspend
and resume stress test continuouly while run edpc test in the background.
Revert it now and revisit it later.
Signed-off-by: Robby Cai <R63905@freescale.com>
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The transceiver TJA1041A on sabreauto RevE baseboard will
fail to transit to Normal state if EN/STBY is high by default
after board power up. So we set the EN/STBY initial state to low
first then to high to guarantee the state transition successfully.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
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CONFIG_USB_EHCI_TT_NEWSCHED introduces a new schedule method
for periodic transfer, it can cover more peridic transfers which
introduced recently years.
Meanwhile, both PC and our 3.5.7 (and coming 3.10) enable it,
and have not found any issues, this commit also fixes a bug
this CR reported.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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CC arch/arm/mach-mx6/usb_h1.o
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
In function '_host_wakeup_enable':
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
522: warning: unused variable 'phy_reg'
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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This patch adds a null pointer check and explicitly frees memory in the
tcrypt.c function test_ahash_speed.
Signed-off-by: Winston Hudson <b45308@stc-mongo.am.freescale.net>
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At host 1 code, we should use UH1_XXXX. The wrong register
access causing a bug that the u-disk disconnion at host 1
can't be recognized after system resume.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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At mx6, if usb wakeup is not enabled, the PHY's power
will be off during the system suspend, so the dp/dm
will be unknown after the system resumes, it may wake up
controller at some boards since dp/dm's status satisfies
wake up condition. If the controller is waken up, the
PHCD will be cleared automatically.
According to IC requirement, after PHCD is cleared, we
need to wait 1ms before clear PHY's clock gate to wait
PHY's clock stable. At above condition, the PHCD is cleared
automatically, it may less than 1ms before we clear
PHY's clock gate, then, software operation to clear PHY's
clock gate will be useless. At this case, the PHY will works
abnormal, and cause the controller hang when we write some registers
(eg, portsc).
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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the ARM core version we are using on the i.MX6 is
r2p10, thus, we need apply this ARM errata
Signed-off-by: Jason Liu <r64343@freescale.com>
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The PL310 version we are using on the i.MX6Q/DL is r3p1-50rel0,
thus, we need enable this errata for i.MX6DQ/DL/SOLO.
i.MX6SL has the PL310 version: r3p2, no need enable this errata.
Signed-off-by: Jason Liu <r64343@freescale.com>
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arm: Add ARM ERRATA 775420 workaround
Workaround for the 775420 Cortex-A9 (r2p2, r2p6,r2p8,r2p10,r3p0) erratum.
In case a date cache maintenance operation aborts with MMU exception, it
might cause the processor to deadlock. This workaround puts DSB before
executing ISB if an abort may occur on cache maintenance.
Based on work by Kouei Abe and feedback from Catalin Marinas.
Signed-off-by: Kouei Abe <kouei.abe.cp@rms.renesas.com>
[ horms@verge.net.au: Changed to implementation
suggested by catalin.marinas@arm.com ]
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The display MIX can be power gated when EPDC, PXP and LCDIF are all inactive.
This will save around 1.5mW-1.8mW of power in system IDLE mode.
Need to re-initialize the EPDC and PXP whenever the display MIX is
powered up as all the register state is lost when the display MIX is
power gated.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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The display MIX can be power gated when EPDC, PXP and LCDIF are all inactive.
This will save around 1.5mW-1.8mW of power in system IDLE mode.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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when do the crypto module speed test in single mode, meet the following dump:
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = 8c804000
[00000000] *pgd=1c84b831, *pte=00000000, *ppte=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP
Modules linked in: tcrypt(+)
CPU: 0 Tainted: G W (3.0.35-02642-g3a18d11-dirty #92)
PC is at __bug+0x1c/0x28
LR is at __bug+0x18/0x28
pc : [<80045390>] lr : [<8004538c>] psr: 60000013
sp : 8c925dd8 ip : a09b2000 fp : 881f8018
r10: 00000000 r9 : 881f8000 r8 : 8e5a0c08
r7 : 8c866840 r6 : 00000002 r5 : 00000010 r4 : 7f08bbe0
r3 : 00000000 r2 : 80ac9190 r1 : 80000093 r0 : 00000065
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c53c7d Table: 1c80404a DAC: 00000015
Process insmod (pid: 3994, stack limit = 0x8c9242f0)
Stack: (0x8c925dd8 to 0x8c926000)
5dc0: 00000000 8004b548
5de0: 7f08bbe0 0f08bbe0 8db9a000 8c866840 8e5a0c08 803cd650 00000001 181f8038
5e00: 00000001 8db9a000 00000000 181f8038 881f8038 8b800000 00000010 1c866a70
5e20: 8db9a000 8db9a000 00000000 803cd26c 004eea5b 00000000 00000000 8db9a000
5e40: 8db9a000 80208db8 00000010 00000001 7f08b7b4 7f088b40 00000001 80aff320
5e60: 8e5330c0 80affe00 00000003 0000012c 8c866800 8c866840 00000000 00000000
5e80: 00000000 8c925e84 8c925e84 00000041 87654321 8b9c4be0 00000000 00001000
5ea0: 1c938000 87654321 8b9c4a0c 00000000 00001000 00000000 87654321 8b9bfd44
5ec0: 00000000 00001000 00000000 87654321 8b9c497e 00000000 00001000 00000000
5ee0: 7f08ba9c 7f08bbd0 7f08bbd0 000a7008 0000833c 80042284 7f08e000 8c924000
5f00: 00000000 7f08a3e0 7f08bbd0 000a7008 0000833c 00000010 7f08bbd0 000a7008
5f20: 0000833c 80042284 8c924000 7f08e06c 7f08ba90 00000000 000a7008 8003c588
5f40: 00000000 00000000 0000001f 00000020 00000017 00000014 00000012 00000000
5f60: 8c925f74 7f08ba90 00000000 000a7008 0000833c 80042284 8c924000 00000000
5f80: 00000000 800aae9c 8e4a6c80 800f307c 00000000 0000833c 7ee9adb4 7ee9aebf
5fa0: 00000080 80042100 0000833c 7ee9adb4 000a7020 0000833c 000a7008 7ee9aebf
5fc0: 0000833c 7ee9adb4 7ee9aebf 00000080 000001de 00000000 2ab5e000 00000000
5fe0: 7ee9abf0 7ee9abe0 0001a32c 2ac3e490 60000010 000a7020 aaaaaaaa aaaaaaaa
[<80045390>] (__bug+0x1c/0x28) from [<8004b548>]
(___dma_single_cpu_to_dev+0xd4/0x108)
[<8004b548>] (___dma_single_cpu_to_dev+0xd4/0x108) from
[<803cd650>] (ahash_digest+0x3e4/0x61c)
[<803cd650>] (ahash_digest+0x3e4/0x61c) from
[<80208db8>] (crypto_ahash_op+0x40/0xf0)
[<80208db8>] (crypto_ahash_op+0x40/0xf0) from
[<7f088b40>] (test_ahash_speed.constprop.8+0x540/0x690 [tcrypt])
[<7f088b40>] (test_ahash_speed.constprop.8+0x540/0x690 [tcrypt]) from
[<7f08a3e0>] (do_test+0x1270/0x1dd0 [tcrypt])
[<7f08a3e0>] (do_test+0x1270/0x1dd0 [tcrypt]) from
[<7f08e06c>] (tcrypt_mod_init+0x6c/0xc8 [tcrypt])
[<7f08e06c>] (tcrypt_mod_init+0x6c/0xc8 [tcrypt]) from
[<8003c588>] (do_one_initcall+0x10c/0x170)
[<8003c588>] (do_one_initcall+0x10c/0x170) from
[<800aae9c>] (sys_init_module+0x74/0x19c)
[<800aae9c>] (sys_init_module+0x74/0x19c) from
[<80042100>] (ret_fast_syscall+0x0/0x30)
Code: e59f0010 e1a01003 eb131d31 e3a03000 (e5833000)
Signed-off-by: Hudson Winston <B45308@freescale.com>
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
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We have not implemented fully OTG support, so we can't call
otg_statemachine since the state machine may incorrect at current
dual-role switch design.
At existed code, it will call otg_statemachine, in fact, it doesn't
need. Besides, it causes one kernel dump at Sabreauto board due
to it calls gpio API at spin lock, but at Sabreauto board the
USB power GPIO is expanded by MAX7310 which calls i2c read/write
and will schedule itself.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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This patch is copied from commit 25b7679136fd85b1e5197e36a0ca126163e89590
Just unable to cherry-pick due to different file names.
The ASoC core tries to not enforce symmetric rates when
two streams open simultaneously. It does so by checking
rtd->rate being zero. This works exactly once after booting
because it is not set to zero again when the streams close.
Fix this by setting rtd->rate when no active stream is left.
[This leads to lots of warnings about not enforcing the symmetry in some
situations as there's a race in the userspace API where we know we've
got two applications but don't know what rates they want to set.
-- broonie ]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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In probe(), we set LEFT_ADC_VOLUME but failed to set RIGHT_ADC_VOLUME due to
typo during coding, thus fix it.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit ae3eb591ed9f61579a4217c6ddfd19d32e8f3cc5)
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The driver should inform the upper-lever application the exact size of
the image. PAGE_ALIGN macro should be removed.
Signed-off-by: Robby Cai <R63905@freescale.com>
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add the strict check for crop setting in S_CROP ioctl
Signed-off-by: Robby Cai <R63905@freescale.com>
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- add the CROPCAP ioctrl support
Signed-off-by: Robby Cai <R63905@freescale.com>
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The original calculation of the boot size is wrong.
Fix it by the right calculation.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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In the imx6sl, we meet the compiling warning shows below:
--------------------------------------------------------------------
drivers/dma/imx-sdma.c: In function Pleasesdma_iram_free:
drivers/dma/imx-sdma.c:366: warning: passing argument 2 of
Pleasegen_pool_free makes integer from pointer without a cast
include/linux/genalloc.h:58: note: expected Pleaselong unsigned integer
but argument is of type Pleaselong unsigned int *Please
drivers/dma/imx-sdma.c: In function Pleasesdma_load_script:
drivers/dma/imx-sdma.c:452: warning: passing argument 2 of
Pleasesdma_iram_malloc makes pointer from integer without a cast
drivers/dma/imx-sdma.c:352: note: expected Pleaselong unsigned
int *Please but argument is of type Pleaselong unsigned integer
drivers/dma/imx-sdma.c:475: warning: passing argument 1 of
Pleasesdma_iram_free makes pointer from integer without a cast
drivers/dma/imx-sdma.c:361: note: expected Pleaselong unsigned
int *Please but argument is of type Pleasedma_addr_t
drivers/dma/imx-sdma.c: In function Pleasesdma_request_channel:
drivers/dma/imx-sdma.c:942: warning: passing argument 2 of
Pleasesdma_iram_malloc makes pointer from integer without a cast
drivers/dma/imx-sdma.c:352: note: expected Pleaselong unsigned int
*Please but argument is of type Pleaselong unsigned integer
drivers/dma/imx-sdma.c: In function Pleasesdma_free_chan_resources:
drivers/dma/imx-sdma.c:1109: warning: passing argument 1 of
Pleasesdma_iram_free makes pointer from integer without a cast
drivers/dma/imx-sdma.c:361: note: expected Pleaselong unsigned int
*Please but argument is of type Pleasedma_addr_t
drivers/dma/imx-sdma.c: In function Pleasesdma_init:
drivers/dma/imx-sdma.c:1505: warning: passing argument 2 of
Pleasesdma_iram_malloc from incompatible pointer type
drivers/dma/imx-sdma.c:352: note: expected Pleaselong unsigned int
*Please but argument is of type Pleasedma_addr_t *Please
--------------------------------------------------------------------
this patch fixes it.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Fixed code so condition causing the warning never occurs.
Signed-off-by: Jay Monkman <jay.monkman@freescale.com>
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TV will been setting powerdown state when first run HDMI CEC unit
test on MX6Q, but failed in the secondly run and loop in print
message:
sleep for ready!
sleep for ready!
sleep for ready!
...
It is cause by cec interrupter been enabled before interrupter
polarity setting, controler will received fake interrupter,
and cec unit test will get wrong device state.
Fix the issue with move interrupter polarity setting code before
interrupter enabled.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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CC [M] drivers/gpu/drm/drm_global.o
drivers/mxc/mlb/mxc_mlb150.c: In function 'mxc_mlb150_open':
drivers/mxc/mlb/mxc_mlb150.c:1910: warning: format '%x'
expects type 'unsigned int', but argument 2 has type 'void *'
....
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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The problem locates at:
fsl_otg_start_host(fsm, 0);
if (pdata->wake_up_enable)
pdata->wake_up_enable(pdata, false);
otg_drv_vbus(fsm, 0);
fsl_otg_start_host(fsm, 0) internally calls fsl_otg_drv_vbus(), which does
the same thing as otg_drv_vbus(fsm, 0). More critically, we need disable
VBUS wakeup before close VBUS operation, otherwise unexpected VBUS
wakeup will occur. The solution is to remove the call of fsl_otg_drv_vbus()
in fsl_otg_start_host().
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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We call the function ipu_calc_stripes_sizes() to calculate
stripe settings for vdi split mode. Chances are that the
parameters output_frame_width and maximal_stripe_width for the
function satisfy the relationship 'output_frame_width <=
maximal_stripe_width' and make the function return non-zero
value. This causes the IPU device driver generates an annoying
warning message, though the default stripe settings still can
work. This patch simply silences the warning message by reducing
the print log level from error to debug.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 58d6cb0f2d5013c7a6f7b163ce8834019f0dcbc0)
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Board files correctly define fec gpio irq to wake up wait mode since FEC
interrupt cannot connect to GPC, otherwise board files define fec gpio irq
to -1. So, fec probe function check the gpio irq to decide whether fec use
gpio irq or fec irq.
Current irq checking logic is incorrect. Correct the gpio irq checking.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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For imx6 serial silicon, fec MDC clock parent is ipg 66MHz.
The current clock file define the clock source is enet_pll8 50Mhz.
So, the MDC clock is more than 2.5Mhz after divider.
The phy Ar8031 work fine in current MDC clock, which shows the phy
have exceeding flexibility. Correct the parent clock source to make
MDC clock little than 2.5Mhz.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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For imx6 serial silicon, fec MDC clock parent is ipg 66MHz.
The current clock file define the clock source is enet_pll8 50Mhz.
So, the MDC clock is more than 2.5Mhz after divider.
The phy Ar8031 work fine in current MDC clock, which shows the phy
have exceeding flexibility. Correct the parent clock source to make
MDC clock little than 2.5Mhz.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Add a command line option to route the ENET interrupts to the GPIO_1_6.
To route the ENET interrupts to GPIO_6 add "enet_gpio_6" to the
kernel command line.
Also remove the CONFIG option (MX6_ENET_IRQ_TO_GPIO).
This commit should be applied on top of following commits:
72c86f0b9a953e91bb1ed31021b71f337050bc28
808863866d2c17aeb3e70a7fcd094bd96db4b601
bae4d40849f3acdd9663f5a0857c9415ed7e6d5d
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Add a command line option to route the ENET interrupts to the GPIO_1_6.
To route the ENET interrupts to GPIO_6 add "enet_gpio_6" to the
kernel command line.
Also remove the CONFIG option (MX6_ENET_IRQ_TO_GPIO).
This commit should be applied on top of following commits:
72c86f0b9a953e91bb1ed31021b71f337050bc28
808863866d2c17aeb3e70a7fcd094bd96db4b601
bae4d40849f3acdd9663f5a0857c9415ed7e6d5d
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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We need 2 video buffers to get a deinterlaced frame in VDI low motion
mode or medium motion mode. When there is no enough video buffer in
the active list, no one triggers the video buffer timer, then users
may be blocked at dqueue buffer ioctrl if they are in blocking mode.
In order to fix this issue, we may peek the first available video
buffer in the queue list so that the buffer may be taken as a reference
video buffer to do deinterlacing. If there is no video buffer in the
queue list, we should make users be able to trigger the timer again
when they queue buffers to the driver.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 52d0e3f01afbf49d8d16225dede18cc71daa0570)
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WM8962 doesn't support asymmetric parameters for playback and capture,
so add hw_params check in machine driver to obviate some potential risks.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit 85059ec43e34662feca2c58b3a31cf93d79d00bc)
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This file could be included in user-space application while uint is not quite
standard type. This patch changed to unsigned int to avoid to include specific
header file. This is requested from mm team.
Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit 318a325b8c19d1ba7c1451797da5a161e787c64d)
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Add chip revision checking and only enable DISPLAY power gating on TO1.2
Signed-off-by: Robby Cai <R63905@freescale.com>
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The commit 0c0334779a08cca6c5a509570c944fe229837a21
corrected the v_period/v_wait_cnt, h_period/h_wait_cnt caculation in elcdif
framebuffer driver but in WVGA panel timing setting the left_margin and
upper_margin includes the length of hsyn_len and vsyn_len.
Thus the timing setting for lcd panel is not correct.
This patch fixes it.
Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit 9c04adb3c7b95459153873556ff0566d837ee325)
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Use ePxP to do the horizontal/vertical flip and rotation support
Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit d0b9c741601b766213af1332329963f4267cd0c6)
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- the root cause is pxp input/output buffer for csi post-processing is
same one, some part of content is overridded.
- use S_CROP ioctl to control crop, S_FMT to control output size.
Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit 9f3685ea1cd4e56b5d89bfbaf48920ba862edb49)
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ASRC driver allows users to set channel number via PROC interface,
but only passes the total number equal 10.
This's not reasonable because ASRC can use total number lower than 10
if user assure each of them is an even number.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit d76d08c93550cf2de9b1eff569ad6c0928ba122c)
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Set ASRC processing clock 56k/76k with the recommended value from spec.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit 0519d385f5ed78f3526b72a211ccf22ac77c102e)
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The pair config code was prolix. Actually the three pair could use the same
part of code with different configurations. So remove the prolix code.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit feb58d669633b94f97f111d79f81cb4abf1bf2c1)
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There's already a same section of code above the removed one.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit b69af65683f17bfa701fdbb2dd3a93f53dc3503b)
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The old req_pair() constrained that only Pair B could afford 6 channels,
while actually not. So rewrite it to be more flexible.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit adbc9dbba6ee46c05c0878a8e3bab118981d62c7)
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Added missing clock and revised the clock map for v2
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit c7e1b9af10cb579efaf7c4644170f6f8bee401e2)
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The comments for the input/output prescaler and divider were swapped,
so reverse them.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit bb6347bc5acb1d59e001063968c18d1056807cf9)
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