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The 32 bpp pixel format which is passed to pxp should be
'PXP_PIX_FMT_RGB32' instead of 'PXP_PIX_FMT_RGB24', since
only 'PXP_PIX_FMT_RGB32' can be recognized by lcdif.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit c98efc59e1bc6d1814b2179f1b7e9f22cb177f47)
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with CONFIG_HZ=100, the precision of jiffies is 10ms, and the
generic_cmd6_time of some card is also 10ms. then, may be current
time is only 5ms, but already timed out caused by jiffies precision.
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 8bcce64faaaf07165453e6600ae9ffb887e79b1a)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 38f639884a2cfd65cbe29ac2fbfe4ab3fcb1f1af)
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there is a time window between __mmc_send_status() and time_afer(),
on some eMMC chip, the timeout_ms is only 10ms, if this thread was
scheduled out during this period, then, even card has already changes
to transfer state by the result of CMD13, this part of code also treat
it to timeout error.
So, need calculate timeout first, then call __mmc_send_status(), if
already timeout and card still in programing state, then treat it to
the real timeout error.
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 3bbb0deea6d5c6d5ed38ae927a5bf9b0cd7c8639)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit b9b8249b98b9128d8931887eccb38cd45a0f8bf3)
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Now, when call esdhc_set_timeout() to set the data timeout counter value,
IPP_RST_N(bit 23) is wrongly affected. This patch add a mask to avoid this.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 6713b713dda4382677bc31a16d6ff3ef23f2d1ac)
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Our Reference Manual has a mistake, for the register SYS_CTRL,the
DTOCV(bit 19~16) means the data timeout counter value. When DTOCV
is set to 0xF, it means SDCLK << 29, not SDCLK << 28.
This patch correct this in our usdhc driver.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit df9598d6dd617ed87b2e41e29bfc794b69831e86)
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Added imx7d-12x12-lpddr3-arm2-pcie.dtb to makefile
Signed-off-by: Frank Li <Frank.Li@nxp.com>
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During suspend, as 24MHz will be disabled, but system counter
needs to be running in order to maintain accurate clock source,
so we need to switch system counter's clock from base clock(24MHz)
to alternate clock(32K) before system enter STOP mode, otherwise,
the suspend time will NOT be counted into system time when issue
a "date" command.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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for imx6qdl"
This reverts commit 312979d1fcbd068d4ba0f461e974e7cbcc889548.
When busfreq is at low bus mode, which is 24MHz, it means DDR/AHB/AXI
will drop to 24MHz. At the same time, when in low busfreq mode, cpuidle
can be in low power idle, DRAM will be put into self-refresh and DRAM IO
will in low power mode to save power, so DMA will NOT work.
So all peripherals that needs DMA, need to request bus freq to high
setpoint when it is active.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 2c01452f4d7c0f65553b365adc27a1b7b6ba8644)
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Add the mipi panel 'TFT3P5581' driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 17a4dce7f9a80166ddcc76205b13c1999767899c)
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Add the dts support for the new mipi panel 'TFT3P5581'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 3b2b9a727c8c6d97e225237a52865486bab844fa)
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and cmds.
Since the lcdif uses RGB interface to transfer image data to
mipi dsi, video mode should be used to transfer the image data.
So, the commands transfer should also use video mode to avoid
unnecessary mode switches.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 57d2d01a4fbdf6fb8f71515a74765492d1d34dab)
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write operation.
Add 10msec delay after all the pkt write operations to let
the data to take effect on the panel's side.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit f53d88d5996f3384533b50d21503b6e5e3e06b06)
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position.
The hardware reset should be done on LP-11 mode which
is the data/clk stop state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit cfab3dd4f519adf4e14247e6d09169a1d7833f13)
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deferred probe
The assert gpio comes from 'gpio_spi' module, so the framebuffer
depends on the 'gpio_spi' driver loading. And in the case that
the framebuffer driver is loaded earlier than the 'gpio_spi'
driver, the gpio asserting will fail. So handle this gpio in
the framebuffer driver and add deferred probed support.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 3e1b050fd0d9f39292208c6bcd1a474063234f89)
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According to the 7d sdb schematic, only when the 'LCD_PWR_EN' is
low voltage, the 'LCD_3V3' can has the 3.3V voltage. And 'LCD_3V3'
is used to provide 3.3V power for lcd peripherals.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 2b34ed894f2efa27b336b61d4db9985a9c5e4f14)
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Add more delay to wait sensor stable.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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PAD_GPIO1_IO01 bit[31:7] are reserved, remove the setting mapping to
this reserved field.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Mipi CSI PHY regulator will enabled in function of s_power.
So remove regulator enable code when driver probe.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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Add HSIC support for imx7d. We have not supported HSIC as system
wakeup as well as HSIC remote wakeup function at DSM mode, since
the 24M OSC can't be off and the SoC internal regulators can't be
off at this mode, that will keep power consumption much higher.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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In this notifier, we can power on/off the two LDO's which are needed
for USB HSIC.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add imx7d 12x12 ARM2 ddr3 board dts
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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It is missing at imx7d.dtsi, but used at source code.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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When Mega/Fast Mix off in DSM mode, RDC recovery needs PCIe/PXP/EIM
clock to be enabled, otherwise, with M4 enabled, DSM resume will fail.
We only enable them before entering DSM and hardware will disable
them when DSM is entered and they will be re-enabled after resume,
then in low level resume phase, we will disable them again.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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enabled
For i.MX7D, current runtime clock management code will skip all
PLL/PFD/GATE enable/disable when M4 is enabled, this is NOT good
for power number in low power idle and audio playback, as M4 only
uses one high speed PFD which is from system PLL, it is never
disabled runtimely, so we can just enable the hardware operation of
PLL/PFD/GATE for A7.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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the original fix (MGS-755) for vg memory leak is incomplete,
further destroy the node handle to free the integer id with vg memory.
Date: May 26, 2016
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
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To i.MX7D and i.MX6ULL, we need to support multiple iomux controller,
but we only have one imx_pinctrl_desc with type static. This means
different iomux controller share one imx_pinctrl_desc variable.
The value filled into imx_pinctrl_desc when probing the first iomuxc
node will be overriden when probing the second one.
This will incur errors, such as
'mx7d-pinctrl 30330000.iomuxc: could not map pin config for
"MX7D_PAD_LCD_DATA00"'
In this patch, dynamically allocate imx_pinctrl_desc for each iomux
controller to fix the issue.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 355b1f2153463bf838e928ffcab871e32cc5081f)
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Add pinctrls for usbotg1 and usbotg2 vbus control. This missing keeps
the vbus enable pin is high after power up, so vbus is on and otg port
will not enter suspend in device mode, as active usb port has high
bus freq requested, this prevents system enter low bus freq.
Signed-off-by: Li Jun <jun.li@nxp.com>
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The 'pm_runtime_get_sync()' and 'pm_runtime_put_sync_suspend()'
may be called not pairs. And this will cause the 'usage_count'
to be negative.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 10135c736dfc1b3d5c449adb78118e3642b99276)
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Add 'ipg' and 'axi' clocks for pxp which should
be used to control runtime power managments.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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The pxp require two clocks to enable when it works, and
they are 'ipg' and 'axi' clocks. Besides, the two clocks
share the same CCGR to control clock gating.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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missed the brackets for bch legacy support, which leads the large oob
nand bch setting to wrong path.
Signed-off-by: Han Xu <han.xu@nxp.com>
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document the new option for legacy bch geometry support.
Conflicts:
Documentation/devicetree/bindings/mtd/gpmi-nand.txt
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit c1c24ecd24cb808e825eb13a3e3d016c283322cc)
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Provide an option in DT to use legacy bch geometry, which compatible
with the 3.10 kernel bch setting. To enable the feature, adding
"fsl,legacy-bch-geometry" under gpmi-nand node.
NOTICE: The feature must be enabled/disabled in both u-boot and kernel.
Conflicts:
drivers/mtd/nand/gpmi-nand/gpmi-nand.h
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit 4d28b1693905526558892d40525763e6bc4469e4)
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Fix chipidea usb driver compile warning if CONFIG_USB_CHIPIDEA_HOST
is disabled:
In file included from drivers/usb/chipidea/otg.c:26:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
static void ci_hdrc_host_driver_init(void)
^
CC drivers/usb/chipidea/otg_fsm.o
In file included from drivers/usb/chipidea/otg_fsm.c:34:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
static void ci_hdrc_host_driver_init(void)
^
Signed-off-by: Li Jun <jun.li@nxp.com>
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The 'otm8018b' is the Source Driver IC which is used
by 'TFT3P5079E' panel. This patch is adding the build
support for the 'otm8018b' kernel driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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The 'otm8018b' is the Source Driver IC for 'TFT3P5079E'
mipi panel. This patch is the kernel driver for 'otm8018b'.
No backlight brightness adjustment function, since this is
not supported by imx7d sdb revb board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Frank Li <frank.li@nxp.com>
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Create a new dts for the 'TFT3P5079E' mipi panel on
imx7d sabresd revb board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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fix the potential integer overflow issue found by coverify.
Signed-off-by: Han Xu <han.xu@nxp.com>
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fix the raw_buffer pointer double free issue found by coverify.
Signed-off-by: Han Xu <han.xu@nxp.com>
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To avoid touch other bits of HW_ANADIG_SNVS_MISC_CTRL , use set/clear register
, and correct the bit29 setting:
--before: write 1 to toggle DDR power pin to high before enter DDR retention,
and write 1 again to pull pin to low when exit from DDR retention.
--now: write 1 to pull DDR power pin to high and write 0 to low.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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The head list may be corrupted when two requests from
the same 'pxp_chan' are issued sequentially. So change
the issue_pending function to strictly serialized the
requests to avoid this kind of issue.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 3ed71dcdd8ceeb3725399053f31c1930d2e7a08d)
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This dts is only for USB HSIC controller test which needs
Validation Port Card on it.
Disable controller 3 due to strange signal on it at arm2 board.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 8bd0739d81719ed8a09ca4e45393bb1c5ce3de83)
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This piece of code is existed at imx_3.10, but missing at imx_3.14 and
imx_4.1, port it from imx_3.10.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 901f278a08baf6e5109bcf538f1f78cdbbccd389)
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Add csis-clk-settle property to imx7D SDB mipi csi.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit 01365628fdfadc4f8343722a2d5c69d5d8037540)
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Add clk_settle variable to compliance more mipi sensor.
Mipi controller should setting by followed value
according mipi sensor support D-phy version.
Slave Clock Lane Control Register for TCLK-SETTLE.
2'b0x = 110 ns to 280ns (v0.87 to v1.00)
2'b10 = 150 ns to 430ns (v0.83 to v0.86)
2'b11 = 60 ns to 140ns (v0.82)
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit 928103ba7d28a7dbddf950892cb9d49ec2b192d3)
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ov5647 mipi camera sensor is replaced by ov5640
on imx7D SDB RevB board.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit aef2ab14e91ccd173086a9849cf64619e078ed6f)
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Combine csi image setting function for 32-bit,16-bit,8-bit format.
For parallel 8-bit sensor input, when bit per pixel is 16,
csi image width should been doubled.
But for mipi input, the csi image width and height should align
with mipi whatever data width.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit caa8725e713691b42aa112a6e51f12e7d595f139)
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-Support no power and reset pins platform.
-Remove specific power and reset pin setting for ov5640 daughter card.
-Put sensor in software power down state when streamoff.
-Remove unsupported video modes, keep 640x480, 720x480, 720p, 1080p 30fps
video modes in driver.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit 6a6c44e2406dcd9481e3103ca2710a319265c52a)
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GPIO0~GPIO7 part:
- Commit(c8cabda5ab07) add some wrong input sel value for uart, return
them to origin setting.
- Add uart DTE pin mode setting.
UART2_TX_DATA pin part:
- RM doc "iMX7D_RM_Rev0_Approval.pdf" (2016.04.25 updated in compass)
updated input sel define for UART2_RX_DATA, then set the correct input
sel for the pin.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit: 90a8b06b9735dd5b8d2023ff3b95886441e0e8d9)
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On i.MX7D, per design team's require, need to make sure
DLL is locked after DDR frequency scaled done. Although
normally there should be no issue, but it is better to
add it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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