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Powering down PLL before switching to a mode that does not use it
is a bad idea. It would cause the SGTL5000 be without internal
clock supply, especially on the I2C interface, which would make
subsequent access to it fail.
Thus, in case of not using PLL any longer, first set the mode
control, then power down PLL.
Signed-off-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit e06e4c2d530fd4995c41083009647263ccd77d3b)
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The SGTL5000 Capture Attenuate Switch (or "ADC Volume Range Reduction"
as it is called in the manual) is single bit only.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 65f2b226763bc348a9b9145aa5e17e7e3f6d8c35)
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When a sound capture/playback is terminated while a playback/capture
is running, power_vag_event() will clear SGTL5000_CHIP_ANA_POWER in
the SND_SOC_DAPM_PRE_PMD event, thus muting the respective other
channel.
Don't clear SGTL5000_CHIP_ANA_POWER when both DAC and ADC are active
to prevent this.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit f091f3f07328f75d20a2a5970d1f8b58d95fc990)
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According to the sgtl5000 reference manual, the default value of CHIP_SSS_CTRL
is 0x10.
Reported-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
(cherry picked from commit 016fcab8ff46fca29375d484226ec91932aa4a07)
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The VAG_POWER must be enabled after all other bits in CHIP_ANA_POWER
and disabled before any other bit in CHIP_ANA_POWER. See the SGTL5000
datasheet (Table 31, BIT 7, page 42-43). Failing to follow this order
will result in ugly loud "POP" noise at the end of playback.
To achieve such order, use the _PRE and _POST DAPM widgets to trigger
the power_vag_event, where the event type check has to be fixed
accordingly as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit dd4d2d6dfb49e8916064f2cb07f0ad7b32a82fb7)
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After a 'reboot' command in Linux or after pressing the system's reset button
the sgtl5000 driver fails to probe:
sgtl5000 0-000a: Device with ID register ffff is not a sgtl5000
sgtl5000 0-000a: ASoC: failed to probe CODEC -19
imx-sgtl5000 sound.12: ASoC: failed to instantiate card -19
imx-sgtl5000 sound.12: snd_soc_register_card failed (-19)
sgtl5000 codec does not have a reset line, nor a reset command in software, so
after a system reset the codec does not contain the default register values
from sgtl5000_reg_defaults[] anymore, as these are only valid after a
power-on-reset cycle.
Fix this issue by explicitly reading all the reset register values from
sgtl5000_reg_defaults[] and writing them back into sgtl5000 to ensure a sane
state.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit af8ee11209e749c75eabf32b2a4ca631f396acf8)
Conflicts:
sound/soc/codecs/sgtl5000.c
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Do not disable and re-enable clocks after deasserting
PCIE, AFI and PCIEX resets. Deasserting the resets should
be followed by programming the PCIE.
Bug 1521306
Change-Id: Idc43bc9b21cac3818852ed059fe512f4cd75b748
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
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Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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The whole rounding stuff really depends on a specific resolution.
This reverts commit 4dd83942b418b937e3da02746baabf63f37fe682.
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Force round down in division calculating required logo height as
preceding code did round up as follows:
logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height);
Which resulted in no boot-logo shown at all due to not enough lines
being available.
Additionally disable cursor for custom boot logo.
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Using this unconditionally cuts the birds feet (;-p).
This reverts commit 491f263ebfb338c59abfbde6d4e0e7256a0150fa.
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Make sure that we dont enter infinite loop due to
negative value of pins in some cases. Also remove
debugging check for refcount.
Bug 1478467
Change-Id: I7df8efa5b3cf8927a0c18363add4f031aca48e48
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/450209
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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Also use nvhost_syncpt_incr_max_ext().
Bug 1478352
Change-Id: Ib868bd2bd7a070e4c410e48bd51977ac45b7d477
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/439471
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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There could be race in refcount update leading to
access of module registers without enabling the clock
and power.This patch tries to catch such instances
and enables power.
Bug 1478467
Change-Id: Ia32da44bfcd7838e312815b6261ccadf4470a761
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/448701
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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nvhost_job_unpin should always get the nvmap_handle_ref
from rb_entry after validating handle and presence
in the tree.
Bug 1478467
Change-Id: Ibf5f64a1a82fea8adbf7500bdb36b76357776448
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/436076
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
with the memset return value. However the memset itself became broken
by that patch for misaligned pointers.
This fixes the above by branching over the entry code from the
misaligned fixup code to avoid reloading the original pointer.
Also, because the function entry alignment is wrong in the Thumb mode
compilation, that fixup code is moved to the end.
While at it, the entry instructions are slightly reworked to help dual
issue pipelines.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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optimizations
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.
For instance in the following function:
void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
waiter->magic = waiter;
INIT_LIST_HEAD(&waiter->list);
}
compiled as:
800554d0 <debug_mutex_lock_common>:
800554d0: e92d4008 push {r3, lr}
800554d4: e1a00001 mov r0, r1
800554d8: e3a02010 mov r2, #16 ; 0x10
800554dc: e3a01011 mov r1, #17 ; 0x11
800554e0: eb04426e bl 80165ea0 <memset>
800554e4: e1a03000 mov r3, r0
800554e8: e583000c str r0, [r3, #12]
800554ec: e5830000 str r0, [r3]
800554f0: e5830004 str r0, [r3, #4]
800554f4: e8bd8008 pop {r3, pc}
GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.
This patch fixes the return value of the assembly version of memset.
It adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:
Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).
Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:
save r8:
- str lr, [sp, #-4]!
+ stmfd sp!, {r8, lr}
and restore r8 on both exit paths:
- ldmeqfd sp!, {pc} @ Now <64 bytes to go.
+ ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
(...)
tst r2, #16
stmneia ip!, {r1, r3, r8, lr}
- ldr lr, [sp], #4
+ ldmfd sp!, {r8, lr}
Step 3
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:
save r8:
- stmfd sp!, {r4-r7, lr}
+ stmfd sp!, {r4-r8, lr}
and restore r8 on both exit paths:
bgt 3b
- ldmeqfd sp!, {r4-r7, pc}
+ ldmeqfd sp!, {r4-r8, pc}
(...)
tst r2, #16
stmneia ip!, {r4-r7}
- ldmfd sp!, {r4-r7, lr}
+ ldmfd sp!, {r4-r8, lr}
Step 4
======
Rewrite register list "r4-r7, r8" as "r4-r8".
Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Enable VLAN networking functionality.
While at it also enable some more kernel modules for Apalis T30 PCIe
based devices like the Intel E1000E NICs, Intel IWLAGN Wi-Fi cards,
PCIe serial cards and XHCI based USB 3.0 controllers.
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This reverts commit f162e88fc6aac0fef03c49c1ac596995a03ff134.
Somehow NVIDIA's media player does not like it to be fixed as
it starts stuttering like crazy at times.
Still keep the dangerous time out handling clean-up.
While at it get rid of the excessive dev_info() logging as well.
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These 2 syncronize_rcu()s make attaching a task to a cgroup
quite slow, and it can't be ignored in some situations.
A real case from Colin Cross: Android uses cgroups heavily to
manage thread priorities, putting threads in a background group
with reduced cpu.shares when they are not visible to the user,
and in a foreground group when they are. Some RPCs from foreground
threads to background threads will temporarily move the background
thread into the foreground group for the duration of the RPC.
This results in many calls to cgroup_attach_task.
In cgroup_attach_task() it's task->cgroups that is protected by RCU,
and put_css_set() calls kfree_rcu() to free it.
If we remove this synchronize_rcu(), there can be threads in RCU-read
sections accessing their old cgroup via current->cgroups with
concurrent rmdir operation, but this is safe.
# time for ((i=0; i<50; i++)) { echo $$ > /mnt/sub/tasks; echo $$ > /mnt/tasks; }
real 0m2.524s
user 0m0.008s
sys 0m0.004s
With this patch:
real 0m0.004s
user 0m0.004s
sys 0m0.000s
tj: These synchronize_rcu()s are utterly confused. synchornize_rcu()
necessarily has to come between two operations to guarantee that
the changes made by the former operation are visible to all rcu
readers before proceeding to the latter operation. Here,
synchornize_rcu() are at the end of attach operations with nothing
beyond it. Its only effect would be delaying completion of
write(2) to sysfs tasks/procs files until all rcu readers see the
change, which doesn't mean anything.
Signed-off-by: Li Zefan <lizefan@huawei.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Colin Cross <ccross@google.com>
Conflicts:
kernel/cgroup.c
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Use HDA HDMI audio now on Colibri T30 as well allowing for up to 7.1
multi-channel playback. Split board sound initialisation between Apalis
and Colibri T30 in order to distinguish better between default SPDIF
being supported out-of-the-box on Apalis vs. this being an optional
feature for the Colibri. Therefore remove SPDIF for the Colibri T30.
While at it add csus clock required for vi_sensor camera master clock
on Apalis T30 and clk_out_2/extern2 for Colibri T30, fix debug UART1
initialisation, get rid of spurious CONFIG_SND_USB enable and further
clean-up both board platform data files.
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Hack HDA driver to make it the 2nd rather than the first sound card as
the first one should be the SGTL5000 which is always present on our T30
modules. Especially on Ixora where there is no HDA codec on the carrier
board HDA being the first sound card does not make much sense even more
though as there was no primary device (e.g. device=hw:0,0).
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Enable CONFIG_FHANDLE required for systemd >= 209 according to
lists.freedesktop.org/archives/systemd-devel/2014-February/017362.html
While at it put them all 3 on par concerning ARM Errata configuration.
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Fix issue with slow SPDIF clock by just doubling desired rate prior to
doing any further calculations on it.
BTW: A proper fix might involve overall clock doubler configuration.
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Fix (Colibri) resp. introduce (Apalis) SPI device controller data to
properly use HW based chip select with one clock of setup and hold time
each for both MCP2515 CAN controller(s) as well as spidev.
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This works around a issue we see when using eMMC 4.5 on tegra
SDHCI host controller.
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The 1.8V quirk also affected the internal eMMC which disabled newer
modes such as SDR50, SDR104 and DDR50. This in turn lead to an
out of spec usage since the clock was still 50MHz.
By creating a no_1v8 field in the platform data we can now enable
this work around on a per-instance basis. Hence we enable the
quirk only on the controllers which are connected to the external
SD-slots.
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PCIe Reset line must be asserted for at least 100us after clock is enabled.
PEX 2 Controller Register fix, offsets are not at constant intervals.
Bug 1521306
Reviewed-on: http://git-master/r/225399
(cherry picked from commit df0760bf515236bed2e87e590509642ab72a01b5)
Change-Id: I7b44ea51e7e02f2bca93cfc75ed85e01ab91fe03
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
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Force round down in division calculating required logo height as
preceding code did round up as follows:
logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height);
Which resulted in no boot-logo shown at all due to not enough lines
being available.
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The AC97 sampling rate is really fixed to 48 kHz at all times.
While at it clean-up dangerous time out handling.
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This commit resolves an issue of non-working vi camera driver
on Colibri T20 occured after a l4t-r16-r4 merge.
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- remove reduntant emc clock rate set which is controlled by DVFS
- VI's maxim working clock freq is 300MHz
- Change VI clock divider from an integer to a decimal, so the
maxim VI clock on Cardhu should be 272MHz (PLL_P is 408MHz and
divider is 1.5)
Bug 1478352
Change-Id: I4028ed8531d92300d131befb53a4c9dc9f90930d
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/419071
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
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Signed-off-by: Bryan Wu <pengw@nvidia.com>
Change-Id: I67c50ff86b53a6c1001d2b688251dc55bd2eff55
Reviewed-on: http://git-master/r/419070
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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The driver should not try to switch to 1.8V when the SD 3.0 host
controller does not have any UHS capabilities bits set (SDR50, DDR50
or SDR104). See page 72 of "SD Specifications Part A2 SD Host
Controller Simplified Specification Version 3.00" under
"1.8V Signaling Enable". Instead of setting SDR12 and SDR25 in the host
capabilities data structure for all V3.0 host controllers, only set them
if SDR104, SDR50 or DDR50 is set in the host capabilities register. This
will prevent the switch to 1.8V later.
Bug 1402031
Acked-by: Arindam Nath <arindam.nath@amd.com>
Acked-by: Philip Rakity <prakity@marvell.com>
Acked-by: Girish K S <girish.shivananjappa@linaro.org>
Signed-off-by: Al Cooper <acooper@gmail.com>
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Change-Id: I61d3fdb96fce223649075b6c063a3dd227aef062
Reviewed-on: http://git-master/r/365451
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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The OLPC XO-1.75 laptop includes a SDHCI controller which is 1.8v
capable, and it truthfully reports so in its capabilities. This
alternate voltage is used for driving new "UHS-I" SD cards at their
full speed.
However, what the controller doesn't know is that the motherboard
physically doesn't have a 1.8v supply available.
Add a quirk so that systems such as this one can override disable
1.8v support, adding support for UHS-I cards (by running them at
3.3v).
This avoids a problem where the system would first try to run the
card at 1.8v, fail, and then not be able to fully reset the card
to retry at the normal 3.3v voltage.
This is more appropriate than using the MISSING_CAPS quirk, which
is intended for cases where the SDHCI controller is actually lying
about its capabilities, and would force us to somehow override both
caps words from another source.
Bug 1402031
Change-Id: I7ca070a13241e6403eb2e243ebbc441a311110bc
Signed-off-by: Daniel Drake <dsd@laptop.org>
Reviewed-by: Philip Rakity <prakity@nvidia.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/346323
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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Add SPI controller platform data required for use of hardware chip
selects.
While at it pull-up SPI chip select pin due to NVIDIA's designers
taking the term chip select a little too personal: they indeed only
select a chip otherwise all the chip select pins are just left
floating!
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The MCP2515 on the Colibri EvalBoard V3.1a actually uses regular system
reset aka RESET_OUT# on SODIMM 87 to reset the MCP2515.
Therefore clean-up resp. remove any MECS Tellurium legacy in that
respect.
While at it adjust copyright year, re-order some include, clean-up some
struct spacing, re-order clocks and improve some comments.
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Reworked driver in order to properly support default watchdog api
such as triggering by writing a character and disable by sending
a magic character. Renamed ENABLE_ON_PROBE to ENABLE_HEARTBEAT
which triggers the watchdog using the interrupt service routine.
Original patch:
http://git.toradex.com/gitweb/linux-toradex.git/commitdiff/5da592b805718b4f33897d642f577b1e6511bc2b
Bug 1402031
Change-Id: I33ef556dac6d6717cadc00f8937437b925dc2ca3
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/346477
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Don't initialize the whole display controller (dc) when framebuffer
mode is set to off.
This avoids creation of the /dev/tegra_dc_x device. The tegra X
driver requires for each tegra_dc_x device an framebuffer device
with the same id. This patch avoids creation of both, which makes
the tegra X driver load correctly.
Note: Turning off tegrafb0 still leads to kernel crash due to
hard coded device enumeration.
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Symptoms:
The interface stops receiving CAN frames when reception of CAN frame
and call to the introduced get_berr_counter function coincide.
Reproduction:
Ip requests, among others, the berr field for the can interfaces. NOTE
that it does so even if called as 'ip link show lo', as interface-based
filtering is only done after the system calls to receive interface
information.
Run candump on a MCP-based can interface that has a lot of traffic (via
'cangen -g1' on another can node).
On the system with the MCP chip, run
while /bin/true; do ip link > /dev/null ; done;
Reception of CAN-frames (as shown by candump) will cease within
seconds.
This issue got introduced by commit
1b59090a47101b4bf379d2c35986ad3f0bcb2aa1 as access to the SPI registers
of the MCP251x were not locked.
Issue report and patch courtesy David R. Piegdon of Indurad GmbH.
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Driver features:
1. Supported formats:
- Full HD, 1920x1080, 8.5 FPS, YUYV
- VGA, 640x480, 30 FPS, YUYV
2. Available controls with enabled AE (auto exposure):
- brightness [0...255],
- contrast [16...64],
- saturation [0...256],
- hue [-2200...2200],
- gamma [100...280].
3. Works only in parallell interface mode (CSI in progress).
4. No external tools needed (for i2c).
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This commit restores the full framerate (25 FPS), after a drop to
16 FPS caused by a l4t-r16-r4 merge.
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This commit adds settings such as:
- values of horizontal/vertical active start,
- enabling/disabling internal sync,
to the private data of decoders: MAX9526, ADV7180, TVP5150,
OV7670 and AS0260.
The feature is available through *_tegra_camera_platform_data
struct initialised in board-*.c files.
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This commit fixes the crash that occures while loading tegra_v4l2_camera
module caused by its new features (private data per sensor).
updated files:
arch/arm/mach-tegra/board-apalis_t30.c
arch/arm/mach-tegra/board-colibri_t20.c
arch/arm/mach-tegra/board-colibri_t30.c
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This commit fixes the kernel compilation error with the lack
of the export of tegra_powergate_partition symbol in
arch/arm/mach-tegra/powergate.c
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