summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2010-09-03[ARM/tegra] power: Added non-boot PLL restoration.tegra-10.8.3Alex Frid
Added non-boot PLL (PLLC/PLLA/PLLD) restoration during clock resume before clock dividers are restored. (Current restoration in RM happens late after clock dividers are restored). Change-Id: I9661f5ddba0ba4b25d5a00c78820792791777429 Reviewed-on: http://git-master/r/5515 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Iqbal Bhinderwala <iqbalb@nvidia.com> Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-03[arm/tegra] dma: Dma allocation should be thread safeLaxman Dewangan
The dma can be allocated from multiple client in run time and so it should be thread/smp safe. Returning proper error pointer in case of there is no dma to allocate. bug 723220 Change-Id: Ifb333d4b14e32be561e34a0d7668a2d631ac80c6 (cherry picked from commit db2d10f715fcdd6fdaf5fc7ea8e27a505f8332da) Reviewed-on: http://git-master/r/5769 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-03[arm/tegra] rm dma: Fixing resource leak issue.Laxman Dewangan
When dma is aborted, all request should be dequeued from the dma and the allocated memory should be freed. The allocated resource was not getting freed, fixing this issue. Properly checking the return pointer from the allocate_dma. (cherry picked from commit 02f0e4da9c66fee14f4492fa5b4ec41fd028a56e) Change-Id: I0dbaeca9b19331458b9aaf91556b7dad1e9b67ee Reviewed-on: http://git-master/r/5768 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-03[arm/tegra]spi:Restricting interface freq to less than requestedLaxman Dewangan
The maximum interface frequency configured by the spi driver should not more than the requested interface freq. Correcting the passed argument to behave the clock driver accordingly. Change-Id: I6e1beea7f01fb410f5e2755406b7d4dac7fd570d Reviewed-on: http://git-master/r/5573 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-02video: tegra: nvmap: disallow splitting when no spare blocks availableThomas Roell
The block realignment if a block wasn't split lead to a slow leak of carveout memory if the previous block was not a free block. Change-Id: I08bd89364932f2c4fc4faf1dec177dab03e82a9a Reviewed-on: http://git-master/r/5851 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Thomas Roell <troell@nvidia.com>
2010-09-01[tegra/arm] Use inner shareable I-cache BTB on SMPJon Mayo
merge of the following two patches: ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP The standard I-cache Invalidate All (ICIALLU) and Branch Predication Invalidate All (BPIALL) operations are not automatically broadcast to the other CPUs in an ARMv7 MP system. The patch adds the Inner Shareable variants, ICIALLUIS and BPIALLIS, if ARMv7 and SMP. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> ARM: 6139/1: ARMv7: Use the Inner Shareable I-cache on MP This patch fixes the flush_cache_all for ARMv7 SMP.It was missing from commit b8349b569aae661dea9d59d7d2ee587ccea3336c Change-Id: Ie98623b758f8d2d5dabc436ab536ed83efed59f4 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@kernel.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Reviewed-on: http://git-master/r/5826 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-31tegra sdhci: Restore SDHCI interrupts on resumeRahul Bansal
On resume restore SDHCI interrupts to the state which was before entering into suspend for SDIO (always_pwr_on) slot. Also, in suspend keep CARD_INT enabled if it was before going to suspend, so that it can be used as wake source. Broadcom wifi driver does not disable/enable SDIO_INT on early_suspend/late_resume, it requires SDIO INTs to be enabled on resume, as even before broadcom driver's late_resume is called which puts wifi is high_pwr, it needs to communicate with MAC for incoming IOCTLs from wpa_supplicant. Bug: 723708 Change-Id: Id1bfe67f415080eeb7563428322dbec3df0f27d2 Reviewed-on: http://git-master/r/5407 Reviewed-by: Rahul Bansal <rbansal@nvidia.com> Tested-by: Rahul Bansal <rbansal@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-31tegra vibrator: Fixing vibrator issues on froyo+K32Venu Byravarasu
1. Changing name field of tegra_vibrator to vibrator 2. Removing vibrator references from board-nvodm.c bug: 702248 Tested on: whistler Change-Id: Ie323e2ee74c4f89b0505f6e3aed1d87f57b388c8 Reviewed-on: http://git-master/r/5795 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-30[arm/tegra] spi: Configuring desired CS for slave communication.Laxman Dewangan
The desired chipselect id which is passed from the slave transaction api is not getting set and so it was not possible to do slave communication on different CS other than 0. Fixing this issue. Change-Id: I91d3b10b7ec01af98a4912ed05f9068491626ba9 Reviewed-on: http://git-master/r/5425 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-30[odm/pmu] tps6586: Fixing external rail control issue.Laxman Dewangan
The external power rail Ext_TPS74201PmuSupply_LDO is controlled by the gpio 1 of the tps6586. When gpio output is set to 0, the rail output is ON and when gpio output is set to 1, the rail output is OFF. As the api provides the control of these external rails through tps6586, the gpio output control should be on the desired value of external rails. Also by default power on, the external power rail Ext_TPS74201PmuSupply_LDO is ON so making it OFF as part of pmu setup. Change-Id: I05e2700afc719065f723b6f78b8cef829dcd4e53 Reviewed-on: http://git-master/r/5558 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-29[driver/sensor] lm90: Adding suspend-resume for nct1008.Laxman Dewangan
Suspending the device nct1008 before going to suspend and reconfiguring at the time of system resume. This is implemneted for the nct1008 which is adt7461 type device. Change-Id: Iecfb33819d0427e2ab2bb1f8eed0066222e5793f Reviewed-on: http://git-master/r/4800 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-29[ventana/ulpi] ulpi low power stateSuresh Mangipudi
Release the ulpi gpio before entering lp0. Bug 718123 Change-Id: I6a07f6df723b7192a3b83dbda1cde39b4dd75b93 Reviewed-on: http://git-master/r/5088 Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-27tegra-fb : fix the panningDaehyoung Ko
Address should be calculated based on pitch not width Bug 709201 Change-Id: Ic2a73a9f665d212595bf4b61eeb7ea2984df7548 Reviewed-on: http://git-master/r/5718 Reviewed-by: Daehyoung Ko <dko@nvidia.com> Tested-by: Daehyoung Ko <dko@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-27[arm/tegra] serial: Using double buffering in receive path.Laxman Dewangan
To improve the performance in receive path, the uart configures the dma in the continuous double buffering mode. The dma keep filling the same buffer in continuously and inform uart driver when half of buffer completes. Change-Id: Iff7c9433766f272384fc1a329ff1db8031987544 Reviewed-on: http://git-master/r/4419 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-27[arm/tegra]dma:Continuous double buffer repeat transfer.Laxman Dewangan
To get the higher performance on uart receive, it is required to have the transfer mode of continuous double buffer of dma operation on the client buffer. The dma keeps filling same buffer and informs client when half buffer and full buffer transfer completes. Also added support to start and stop without enqueing/dequeueing. Bug 725085 Change-Id: I994af55d5e5b2e7f17b889aaa00ca57942bebac8 Reviewed-on: http://git-master/r/4630 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-27[tegra/arm] use no allocate on write for cachingJon Mayo
Changes NMRR (normal memory remap register) to use write-back, no allocate on write for cacheable(C-bit) and bufferable(B-bit) pages. Originally it was set to write-back, allocate on write. Bug 722162 Change-Id: Idb04e86e902c06b5c1721907d93d63c7bb281b5b Reviewed-on: http://git-master/r/5666 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-27[ventana/battery] Gpio to be driven low.Suresh Mangipudi
The Gpio for the battery needs to tbe driven low, so that it does not draw any current. Bug 718123 Change-Id: Ib1493c3ebb8abe0a978b1482abeba43b76a65e1c Reviewed-on: http://git-master/r/5089 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-27[arm/tegra] comms: move 32KHz clock initializationRakesh Kumar
32KHz clock is required for bcm4329 wifi, bluetooth and gps. wifi odm is not correct place for it. Change-Id: I2613236c5cff918b51921609d942568865324a00 Reviewed-on: http://git-master/r/5199 Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Tested-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-25[ARM/tegra] RM: elevated cpufreq dfsd priority.Alex Frid
Elevated cpufreq dfsd priority from one step above default to one step below NvOS IRQ priority. Bug 721076 (cherry picked from commit 56a29c7e184bb98457385eea307ce664bf8ceacf) Change-Id: I49c5a3df78d81a2511ef6e1109962464d93495f5 Reviewed-on: http://git-master/r/5570 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-25[ARM/tegra] RM: Updated hotplug request timing.Alex Frid
Removed filtering of CPU1 On/Off repeated requests from RM - no need, since hotplug code is doing it. Bug 722399 (cherry picked from commit b6ee6b6ac46e3ebcd3dda63fa786f4aa90808b90) Change-Id: I0c8ba5a2c5b0eb167f5f1e7cc1281b9f081dd5d6 Reviewed-on: http://git-master/r/5569 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-24[arm/tegra] i2c: Enabling Newslave always.Laxman Dewangan
It is recommended by ASIC to enable the new slave whenever new master is enable in i2c controller. It should be enable even if the controller only works in master mode. This will avoid the misbehaving of the old slave which is enable by default. Change-Id: Ifd2a9626d95e97865cc4f6b7151b2cb47a14840f (cherry picked from commit 498b4e1e113b8db86d5af5425476d2aac5f75442) Reviewed-on: http://git-master/r/5489 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-24[arm tegra odm] battery: modifying stub driverAbhishek Aggarwal
Stub driver is modified to return success from all the relevant APIs to prevent failure of probe of tegra-battery driver. If there is no battery driver then MSD cannot be turned on. Also removing the dummy driver for whistler as it is now redundant since stub driver is being used for whistler. Bug: 715515 Change-Id: Icc922dc9e2016c783d005b5467983553d05a1028 Reviewed-on: http://git-master/r/5467 Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-24[tegra-ehci] Fix Usb device detection for config USB_SUSPENDVenkat Moganty
When CONFIG_USB_SUSPEND is enabled USB device detection is not working. This is due to the wrong API called to resume the hub and HUB resume funtionality not happening properly. Fixed this by calling the correct API to resume the HUB driver when auto suspend is called. Bug 713237 Bug 713966 Change-Id: Ia4d091fd29ea7ebfe5844cf5685fc5a86e66d12a Reviewed-on: http://git-master/r/4984 Reviewed-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-24[ARM] whistler: Enable CONFIG_HIGHMEM.vdumpa
Enable CONFIG_HIGHMEM to support 1GB RAM on whistler. Bug 715041 Change-Id: I55ffca382b531782173da6bfa517459b6427348a Reviewed-on: http://git-master/r/5313 Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-20[ARM/tegra] RM: Integrated EMC DLL process dependency.tegra-10.8.2Alex Frid
Implemented EMC digital DLL setting dependency on process variations and scaling frequency. Bug 722439 Change-Id: I558f2dfbfe09eb16010875f2ba8a1a963c95e50f Reviewed-on: http://git-master/r/5383 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-20[arm/tegra] ventana: Enabling CONFIG_SENSORS_LM90Laxman Dewangan
Enabling config variable CONFIG_SENSORS_LM90 for enabling temperature monitoring through ON semoconductor's NCT1008 temperature sensor. The NCT1008 is driver compatible with National semiconductor's LM90 temperature sensor. Change-Id: I263932fe283b75384acd36c486da20fbe9ec5efb Reviewed-on: http://git-master.nvidia.com/r/5079 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-19tegra: Save restore pad control registers acorss LP0Venkata (Muni) Anda
Pad control register should be saved before LP0 and restored after LP0. (cherry picked from commit df7e8107f49e15d5652b63b5a3d35121b9f722ad) Change-Id: I8679de6bccf6292a41a79b5603a9f02da41f8b15 Reviewed-on: http://git-master.nvidia.com/r/5333 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-19[arm/tegra] nct1008: Adding board info for temp sensor nct1008.Laxman Dewangan
Adding the board information for the device nct1008. This is ON semiconductor temperature sensor and driver compatible with national semicoductor LM90. The board info is getting register if config variable CONFIG_SENSORS_LM90 is selected through def config file. Change-Id: I2d49dec6ef0942823654b8f00cf62742f0136273 Reviewed-on: http://git-master.nvidia.com/r/5078 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-19[driver/hwmon] lm90: Adding nct1008 as supported list.Laxman Dewangan
The ON semiconductor's temperature sensor NCT1008 is driver compatible with National semicondutor's LM90 driver. Adding NCT1008 as the list of lm90 driver id table. Change-Id: I3dcbe1cdd1441e5196239551265444ebb633a1a2 Reviewed-on: http://git-master.nvidia.com/r/5080 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-19[ventana] DVFS table.Suresh Mangipudi
Integrate the DVFS table for ventana. Change-Id: I2be06e78893f544c1e180438d6650138b7973c1b Reviewed-on: http://git-master/r/5085 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-19nvhost: Reimplement null kickoff functionality.Antoine Chauveau
For each channel submit where null kickoff is requested, we don't place the user's commands in the pushbuffer. All necessary context switches, syncpoint increments and waitbase increments do happen though. Bug 717235 Change-Id: I51c323729ea57993a5b52fb395ab90cb8608ee6b Reviewed-on: http://git-master/r/5091 Reviewed-by: Antoine Chauveau <achauveau@nvidia.com> Reviewed-by: Antti Hatala <ahatala@nvidia.com> Tested-by: Antti Hatala <ahatala@nvidia.com>
2010-08-18[ARM/tegra] RM: Re-arranged voltage request limits.Alex Frid
Re-arranged the order low corner limit is applied to voltage request to guarantee that no actual PMU transaction is triggered (= no clock control re-entry) if peripheral clock is disabled concurrently with low corner increase. Bug 717899 Change-Id: I854164998fa8e88651950fb5aeed3b8595c3c10b Reviewed-on: http://git-master.nvidia.com/r/3757 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Iqbal Bhinderwala <iqbalb@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-18[arm/tegra] spi: Fixing warning dump when timeout err happen.Laxman Dewangan
If transfer started and driver waits for transfer completes with given timeout, and if transfer have not completed in a given timeout then driver handles the erro_timeout case. In this error handling, it does not need to call the Interrupt done as it has not been interupted yet. Calling unnecessarily InterruptDone create warning for unbalanced call. Change-Id: Id7f924eefcd49131b9f752d530b108ab08874b57 (cherry picked from commit 31bc11d7583d089673cb0c474f210343a729e8da) Reviewed-on: http://git-master/r/4377 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-18tegra fuse: fixing fuse and AP compatibility issuesVenu Byravarasu
As Fuse ddk was not correctly storing SecBootDeviceConfig value, there was a mismatch between GfShell and Sysfs. These issues are fixed with this change. tested on: Whistler using GfShell and Sysfs Bug: 715134 Change-Id: Iccca2c1f9608f63938557b0ef0e88aff012bd574 Reviewed-on: http://git-master/r/4976 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-18tegra accelerometer: Changed default initialization parametersPritesh Raithatha
Re-enabled accelerometer for whistler. Fixes bug 721469 Fixes bug 704850 Change-Id: I5eb9b04092df11b82b3e43e6c9699b579945576f Reviewed-on: http://git-master/r/5278 Tested-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-17[ARM/tegra] odm: corrected the polarity of the baseband wakeup pin configurationSheshu Shenoy
Change-Id: I33c6abe2739f13eaf6dab2c98a910048f3733b85 Reviewed-on: http://git-master/r/5213 Reviewed-by: Sheshagiri Shenoy <sshenoy@nvidia.com> Tested-by: Sheshagiri Shenoy <sshenoy@nvidia.com> Reviewed-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-17tegra accelerometer: power management changesVenu Byravarasu
Added suspend and resume functionality to tegra accelerometer, for supporting LP0 on Ventana tested on Ventana-C bug 716080 Change-Id: Ib57b3f2f0d3bec77839f40226f79cd60e222a366 Reviewed-on: http://git-master/r/4836 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-17[tegra/ventana] kernel config for bcm softapMichael Hsu
specify kernel nat / netfilter config options for wifi tethering Change-Id: I110f5246b6110f01455634e4f17138b388252103 Reviewed-on: http://git-master/r/5112 Reviewed-by: Michael Hsu <mhsu@nvidia.com> Tested-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Tested-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-17[arm/tegra] Serial: Confirming configured baudrate.Laxman Dewangan
Sometimes, in uart, the desired baudrate can not be configured in 5% error accuracy due to not finding the correct combination of clock source freq and integer divisor. In this case the driver should generate the error message. Change-Id: Iafe245876a2cb9810c1025c02a4b6a36eb26aa4c Reviewed-on: http://git-master/r/4974 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-16tegra accelerometer: removing threshold settingVenu Byravarasu
As Threshold settings are done in a common place for different accelerometers, removing it. Need to add threshold settings to individual ODM driver based on the need. Bug 721469 Change-Id: I6fe20c4e501208dde9fcf47ac3e31bdf81343efc Reviewed-on: http://git-master/r/5082 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-16[ARM/tegra] timers: Updated timers on LP2 exit.Alex Frid
Moved hrtimer_peek_ahead_timers() call from LP3 entry to LP2 exit. The purpose of this call is to account for time spent in LP2. No need to do it on every LP3 entry. Also made sure that LP2 is entered only when scheduler tick is stopped. Bug 720021 (cherry picked from commit 44137c615f2942d37b18f51ab80356ec9dff9bbb) Change-Id: Ia63c3075778f2bc7ba465c386e80503b7c40a97f Reviewed-on: http://git-master.nvidia.com/r/5165 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: John David Moser <jmoser@nvidia.com> Tested-by: John David Moser <jmoser@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-16harmony odm: disable GPIO-PV2 as wake-up eventBharat Nihalani
gpio_pv2 is disabled as a wake-up source for Harmony, as it causes spurious interrupts when battery charging current is more than 120 mA fix for bug 717868 Change-Id: I9b42b81daac035b0ba3644e8b23a1c1d6a5f03bb Reviewed-on: http://git-master.nvidia.com/r/5140 Tested-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-16nvhost: split hardware context state into refcounted objectAntti Hatala
Change-Id: I69bfed3522d7d2082530204d8f568458f2966638 Reviewed-on: http://git-master/r/5094 Reviewed-by: Andrew Howe <ahowe@nvidia.com> Reviewed-by: Antti Hatala <ahatala@nvidia.com> Tested-by: Antti Hatala <ahatala@nvidia.com>
2010-08-13[driver/mm_ak8975]: Adding suspend/resume functions.Laxman Dewangan
For the power managementi functionality for the device magnetometer ak8975, added the power suspend and resume functions. Change-Id: I40bc799d77dcbcc419200d9a6b6622415b520246 Reviewed-on: http://git-master/r/4790 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-10tegra sdhci: Prevent SDIO from suspend/resumePavan Kunapuli
To support wifi connectivity on system suspend resume for always powered on SDIO cards. Added card_always_on flag. This flag will prevent SDIO de-init/re-init in suspend/resume. If this flag is not set, then SDIO card is de-init/re-init on suspend/resume. Change-Id: Ib092fa9e0bc63ba781e0f4b6637dad0231303ba9 Reviewed-on: http://git-master.nvidia.com/r/4257 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Deepesh Subhash Gujarathi (Engrg-Mobile) <dgujarathi@nvidia.com> Tested-by: Deepesh Subhash Gujarathi (Engrg-Mobile) <dgujarathi@nvidia.com> Reviewed-by: Rahul Bansal <rbansal@nvidia.com> Tested-by: Rahul Bansal <rbansal@nvidia.com> Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com> Tested-by: Victor (Weiguo) Pan <wpan@nvidia.com> Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Tested-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-10[ARM/tegra] clocks: Relaxed undefined tolerance.Alex Frid
Set min/max frequency request boundaries as "unspecified", if tolerance is not defined. Current code in such case requests exact frequency, which may not be reached with limited dividers granularity. This should fix 3D clock boost failure observed on Harmony (bug 717289), and Host clock configuration failure on Whistler. Change-Id: Ib13e87f1cd1e4dc0cd48807fedb34d952c710f68 Reviewed-on: http://git-master.nvidia.com/r/4885 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Andrew Howe <ahowe@nvidia.com> Reviewed-by: Seth Williams <swilliams@nvidia.com> Tested-by: Seth Williams <swilliams@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-10[arm tegra] whistler: enable config TEGRA_BATTERY_ODMAbhishek Aggarwal
Enabling TEGRA_BATTERY_ODM config variable to enable battery driver on whistler. Bug: 715515 Change-Id: I1e3d750f2b75ae7bfd1de30fba64e318ed8cf467 Reviewed-on: http://git-master/r/4841 Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Janne Hellsten <jhellsten@nvidia.com>
2010-08-10[arm tegra odm] battery: new driver for whistlerAbhishek Aggarwal
Implementing new dummy odm battery driver for whistler. It is based on the stub driver and returns success from all the relevant APIs to prevent failure of probe of tegra-battery driver. If there is no battery driver then MSD cannot be turned on. Bug: 715515 Change-Id: I2dece8b7b3d27292a96e9e59d175679b75cc13a1 Reviewed-on: http://git-master/r/4840 Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Janne Hellsten <jhellsten@nvidia.com>
2010-08-09[arm tegra] power: proper error handling in battery probeAbhishek Aggarwal
If the open of tegra odm battery driver fails, we are failing the probe of tegra-battery without unregistering the tegra power supplies which causes errors during boot. Fixed this by moving the call to open tegra odm battery driver and its failure check before we register tegra power supplies. Bug 715515 Change-Id: Ie11c860fa692b3b707ce79796e2713366107bdec Reviewed-on: http://git-master/r/4839 Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Phillip Smith <psmith@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-09[ARM] whistler: Enable USB_ANDROID_MASS_STORAGE.Rakesh Iyer
Bug 707720. Change-Id: I5a1724adae2edb19d4e20be286002a6a2d2e0e44 Reviewed-on: http://git-master/r/4937 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Tested-by: Yu-Huan Hsu <yhsu@nvidia.com>