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2010-09-19tegra-whistler-accelerometer: reverse x directiontegra-10.9.1Bharat Nihalani
X direction needs to be reversed to correct orientation in portrait mode for Whistler. Bug 678250 Reviewed-on: http://git-master/r/6661 Tested-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> (cherry picked from commit 2406bc176b9bb86bd7b6c9e707c4e44b97d997d6) Change-Id: I35eff83ba9cb39d49062f2fb9e01d968543b7bde Reviewed-on: http://git-master/r/6767
2010-09-19nvrm: single pages allocation policy correctedKirill Artamonov
When user doesn't use default heap policy and selects GART or carveout allocation, automatic single-page-to-sysmem rule doesn't work. Because of broken rule many single page allocations go to GART and carveout. The fix adds sysmem bit to heap mask when allocation is single page and GART or carveout is present in heap mask. bug 730124 bug 731923 (cherry picked from commit 3ca9989c922420a57215d297189738a0464c4073) Change-Id: I2ea8018ae5ed9d31e90659479d0e44052ebf9431 Reviewed-on: http://git-master/r/6701 Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com> Tested-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-17[ARM/tegra] RM: Clean-up SPI hints/APB low corner.Alex Frid
- Completely removed busy hints for the SPI channel connected to PMU (busy hints were allowed for for CS, other than PMU, which may create dead-lock if channel access is serialized). - Increased APB low corner to 36MHz for reliable SPI communications at default low frequencies. Bug 721076 (cherry picked from commit 50ccc3cb8f0956370f1841e83133f47c88615889) Change-Id: I0a119610608bc5db4d7daea68bd9d4285d3715e8 Reviewed-on: http://git-master.nvidia.com/r/6744 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-17watchdog: add tegra_wdt driverGary King
add a driver for the hardware watchdog timer embedded in NVIDIA Tegra SoCs Change-Id: I40730213119b4f325e3de008a5efb28f5d578b1c Signed-off-by: Gary King <gking@nvidia.com> Reviewed-on: http://git-master/r/6305 Reviewed-on: http://git-master/r/6705
2010-09-17video: tegra: nvmap: perform cache maintenance for rw_handleMarkus Holtmanns
bug 715382 Integrate from tegra-2010-07 Change-Id: I790bd0e6ff5ddd9513ae7a5ddfce491dcd1e32b3 Reviewed-on: http://git-master/r/6673 Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Antti Hatala <ahatala@nvidia.com> Tested-by: Antti Hatala <ahatala@nvidia.com>
2010-09-16[arm/tegra] serial: Fixing Tx to work in case of out of dma.Laxman Dewangan
When system runs out of dma and uart driver tries to allocate dma, the dma allocation fails. In such case, the uart communication should work with interrupt based -non dma mode. bug 730003 (cherry picked from commit 4a9d5633474c806799ccc6d167f3d624c92d560c) (cherry picked from commit 2000a076103c559446d11ad49debc4e0f2952e8a) Change-Id: I96c2a3f79fd9044e3b54771b60cad7dcb12f517b Reviewed-on: http://git-master/r/6599 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Harry Hong <hhong@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-16[ARM/tegra] RM: Wake Source InformationVictor(Weiguo) Pan
Print out wake status when resuming back from LP0. Bug 725727 Change-Id: Iede6aa7314e4912ff7ccadccbab90f097deab893 Reviewed-on: http://git-master.nvidia.com/r/6549 Tested-by: Victor (Weiguo) Pan <wpan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-16 [ARM/tegra] validate return code from sem_handle_insert callsAndy Carman
Bug 720137 (cherry picked from commit 3a86bacc8a8cf8c593028a7594867df00a45a189) Change-Id: I9a35a9a41c2d27e36ff651650633cf6c59cc2e57 Reviewed-on: http://git-master.nvidia.com/r/6456 Reviewed-by: Andy Carman <acarman@nvidia.com> Tested-by: Andy Carman <acarman@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-16tegra video: remove cancelled actions from the list at power downAndy Carman
[bug] 729378 Change-Id: I34d276d2552491c933983309df0fe31f7bf3ba7e Reviewed-on: http://git-master/r/6443 Reviewed-by: Andy Carman <acarman@nvidia.com> Tested-by: Andy Carman <acarman@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-16[arm/tegra] IPv6, UID_STAT configs supportRahul Bansal
To support IPv6 and Network Traffic Stats related CTS tests. Bug: 690020, 690023, 687255 Change-Id: I5b14c908ba544196da6000d598a11fd1b33780ef Reviewed-on: http://git-master/r/6597 Reviewed-by: Rahul Bansal <rbansal@nvidia.com> Tested-by: Rahul Bansal <rbansal@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-16[arm/tegra] dma and serial: Adding pointer checksLaxman Dewangan
Adding the valid pointer checks before accessing the pointers which is passed when public apis are called. Also resetting the pointers to null once the allocated handles are freed. (cherry picked from commit 0954407534a757b316bc35a0232968feed23243a) Change-Id: Ib8b99f0556fb9a98c74ba8911a00879451fad9e5 Reviewed-on: http://git-master/r/6578 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-15[ARM/tegra] RM: Updated HDMI PLLD settings.Alex Frid
Separated PLLD and PLLC HDMI settings. Changed PLLD settings to increase comparison frequency for 12MHz and 26MHz reference clocks. Kept PLLD settings for other reference clocks and all PLLC settings unchanged. Idempotent PLL configuration clean up. Bug 719667 Change-Id: I882ca2d8a98618518099a5b9482526d5556ba8ea Reviewed-on: http://git-master/r/6340 Tested-by: Hoang Pham <hopham@nvidia.com> Reviewed-by: Hoang Pham <hopham@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-14Merge remote branch 'origin/tegra-2010-09' into HEADMaria Gutowski
2010-09-13[arm/tegra] serial: Removing wait loop for tx emptyLaxman Dewangan
When uart_close() or uart_suspend() calls the tegra_uart_suspend() the drivers waits in tight loop for tx to be empty. This wait is not required because serial_core driver have already waited for the tx fifo to empty with proper timeout before calling these function. bug 730612 (cherry picked from commit 13387c532dfb35dc672b290aec8b7a4db49730d6) (cherry picked from commit ddd896c933e3f8d5fb28948ad957ec12b3d881cd) Change-Id: Ie898ad0a134684844bf80ae00a1c8dd4b02a605a Reviewed-on: http://git-master/r/6372 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Harry Hong <hhong@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-13[arm/tegra] serial: Don't register uart channel if pinux is 0.Laxman Dewangan
If pinmux is not configured for the uart channel then will not be registering the uart device. bug 731336 (cherry picked from commit e496189740d18903db1de44cd96b96e07c93d8b7) Change-Id: Ib5a97425f991f16d280bfaabb00febacab392fe1 Reviewed-on: http://git-master/r/6373 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Harry Hong <hhong@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-13[ARM/tegra] ODM: Enabled EMC DFS for Samsung LPDDR2.Alex Frid
Enabled EMC DFS for Whistler E1112 board with Samsung LPDDR2. Bug 725563 Change-Id: I65cd32365f5739b1d82b1f0a84d794245a6c98a9 Reviewed-on: http://git-master/r/6319 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-09[ARM/tegra] nvhost: WAR power down of powered off module.Alex Frid
Replaced assert on powering down of already powered off module with skipping the power down procedure in this situation is detected. WAR for bug 727964. (cherry picked from commit c562c8fdf58a552fe9ba1c62ffec66e0b67447e5) Change-Id: I2f55052d38874bf196bc89a06fa478aa3e9783c2 Reviewed-on: http://git-master/r/6283 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-09[tegra/ARM] nvhost: Added nvhost resume.Alex Frid
Added nvhost device resume function, and moved syncpoints restoration here from run-time power_host() control. Respectively added syncpoints saving to nvhost suspend procedure. This change is required, since power_host() has no way to account for display advancing syncpoints after they have been already saved. Bug 726052 (cherry picked from commit 629bbd439e1bb156a8cfce3de9384e42586d4f42) Change-Id: I6149cfa1bff72cb9b5e9e9da0f302c7d8a3032a0 Reviewed-on: http://git-master/r/6282 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-09[ARM/tegra] RM: Set pulse mode for 3D busy hints.Alex Frid
Set pulse mode for 3D busy hints to speed up frequency/voltage decrease after hint is canceled. Bug 726052 (cherry picked from commit 58c01c2fc28a3e90e661954ab76cd7f65b0bd2cf) Change-Id: I77a77d9fc73b1675bdaddb08663cfed07900ffa7 Reviewed-on: http://git-master/r/6281 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-09[usb-msd]Fix to increase MSD write performanceVenkat Moganty
MSD write performance is decreased due to the file_sync() called in the write path this is introduced in the K32. After removing this write performance is increased and it is back to K29. Bug 727609 (cherry picked from commit 3674a60b8d4ede5d9305bf59a205e9f16e025f2a) Change-Id: I99e63302e1b189b600163c216847eae437e86a9f Reviewed-on: http://git-master/r/6246 Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-06tegra accelerometer: Changed default initialization parametersPritesh Raithatha
Fixes bug 678250 Reviewed-on: http://git-master/r/5583 Tested-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> (cherry picked from commit bcd2f2e113fb10b321272a53c2c0e015099e3ea8) Change-Id: I985af6334389e257ae6acd37e85c17391200b649 Reviewed-on: http://git-master.nvidia.com/r/6056 Tested-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-06[arm/tegra]: Allocating dma action memory with zero init.Laxman Dewangan
In NvRmDmaStartDmaTransfer(), the memory is allocated for the dma action. The allocated memory does not get initialized and so uninitialized member unintentionally changing the behavior of dma. Allocating memory with zero initialized. bug 728661 (cherry picked from commit ac036af2c9599c419c12a8ba1c4309a9d8364b21) Change-Id: Ie36db6ad88eb9a9870f53b2c685eed6888decaf9 Reviewed-on: http://git-master.nvidia.com/r/6052 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-03[ARM/tegra] power: Added non-boot PLL restoration.tegra-10.8.3Alex Frid
Added non-boot PLL (PLLC/PLLA/PLLD) restoration during clock resume before clock dividers are restored. (Current restoration in RM happens late after clock dividers are restored). Change-Id: I9661f5ddba0ba4b25d5a00c78820792791777429 Reviewed-on: http://git-master/r/5515 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Iqbal Bhinderwala <iqbalb@nvidia.com> Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-09-03[arm/tegra] dma: Dma allocation should be thread safeLaxman Dewangan
The dma can be allocated from multiple client in run time and so it should be thread/smp safe. Returning proper error pointer in case of there is no dma to allocate. bug 723220 Change-Id: Ifb333d4b14e32be561e34a0d7668a2d631ac80c6 (cherry picked from commit db2d10f715fcdd6fdaf5fc7ea8e27a505f8332da) Reviewed-on: http://git-master/r/5769 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-03[arm/tegra] rm dma: Fixing resource leak issue.Laxman Dewangan
When dma is aborted, all request should be dequeued from the dma and the allocated memory should be freed. The allocated resource was not getting freed, fixing this issue. Properly checking the return pointer from the allocate_dma. (cherry picked from commit 02f0e4da9c66fee14f4492fa5b4ec41fd028a56e) Change-Id: I0dbaeca9b19331458b9aaf91556b7dad1e9b67ee Reviewed-on: http://git-master/r/5768 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-03[arm/tegra]spi:Restricting interface freq to less than requestedLaxman Dewangan
The maximum interface frequency configured by the spi driver should not more than the requested interface freq. Correcting the passed argument to behave the clock driver accordingly. Change-Id: I6e1beea7f01fb410f5e2755406b7d4dac7fd570d Reviewed-on: http://git-master/r/5573 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-02video: tegra: nvmap: disallow splitting when no spare blocks availableThomas Roell
The block realignment if a block wasn't split lead to a slow leak of carveout memory if the previous block was not a free block. Change-Id: I08bd89364932f2c4fc4faf1dec177dab03e82a9a Reviewed-on: http://git-master/r/5851 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Thomas Roell <troell@nvidia.com>
2010-09-01[tegra/arm] Use inner shareable I-cache BTB on SMPJon Mayo
merge of the following two patches: ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP The standard I-cache Invalidate All (ICIALLU) and Branch Predication Invalidate All (BPIALL) operations are not automatically broadcast to the other CPUs in an ARMv7 MP system. The patch adds the Inner Shareable variants, ICIALLUIS and BPIALLIS, if ARMv7 and SMP. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> ARM: 6139/1: ARMv7: Use the Inner Shareable I-cache on MP This patch fixes the flush_cache_all for ARMv7 SMP.It was missing from commit b8349b569aae661dea9d59d7d2ee587ccea3336c Change-Id: Ie98623b758f8d2d5dabc436ab536ed83efed59f4 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@kernel.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Reviewed-on: http://git-master/r/5826 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-31tegra sdhci: Restore SDHCI interrupts on resumeRahul Bansal
On resume restore SDHCI interrupts to the state which was before entering into suspend for SDIO (always_pwr_on) slot. Also, in suspend keep CARD_INT enabled if it was before going to suspend, so that it can be used as wake source. Broadcom wifi driver does not disable/enable SDIO_INT on early_suspend/late_resume, it requires SDIO INTs to be enabled on resume, as even before broadcom driver's late_resume is called which puts wifi is high_pwr, it needs to communicate with MAC for incoming IOCTLs from wpa_supplicant. Bug: 723708 Change-Id: Id1bfe67f415080eeb7563428322dbec3df0f27d2 Reviewed-on: http://git-master/r/5407 Reviewed-by: Rahul Bansal <rbansal@nvidia.com> Tested-by: Rahul Bansal <rbansal@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-31tegra vibrator: Fixing vibrator issues on froyo+K32Venu Byravarasu
1. Changing name field of tegra_vibrator to vibrator 2. Removing vibrator references from board-nvodm.c bug: 702248 Tested on: whistler Change-Id: Ie323e2ee74c4f89b0505f6e3aed1d87f57b388c8 Reviewed-on: http://git-master/r/5795 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-30[arm/tegra] spi: Configuring desired CS for slave communication.Laxman Dewangan
The desired chipselect id which is passed from the slave transaction api is not getting set and so it was not possible to do slave communication on different CS other than 0. Fixing this issue. Change-Id: I91d3b10b7ec01af98a4912ed05f9068491626ba9 Reviewed-on: http://git-master/r/5425 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-30[odm/pmu] tps6586: Fixing external rail control issue.Laxman Dewangan
The external power rail Ext_TPS74201PmuSupply_LDO is controlled by the gpio 1 of the tps6586. When gpio output is set to 0, the rail output is ON and when gpio output is set to 1, the rail output is OFF. As the api provides the control of these external rails through tps6586, the gpio output control should be on the desired value of external rails. Also by default power on, the external power rail Ext_TPS74201PmuSupply_LDO is ON so making it OFF as part of pmu setup. Change-Id: I05e2700afc719065f723b6f78b8cef829dcd4e53 Reviewed-on: http://git-master/r/5558 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-29[driver/sensor] lm90: Adding suspend-resume for nct1008.Laxman Dewangan
Suspending the device nct1008 before going to suspend and reconfiguring at the time of system resume. This is implemneted for the nct1008 which is adt7461 type device. Change-Id: Iecfb33819d0427e2ab2bb1f8eed0066222e5793f Reviewed-on: http://git-master/r/4800 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-29[ventana/ulpi] ulpi low power stateSuresh Mangipudi
Release the ulpi gpio before entering lp0. Bug 718123 Change-Id: I6a07f6df723b7192a3b83dbda1cde39b4dd75b93 Reviewed-on: http://git-master/r/5088 Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-27tegra-fb : fix the panningDaehyoung Ko
Address should be calculated based on pitch not width Bug 709201 Change-Id: Ic2a73a9f665d212595bf4b61eeb7ea2984df7548 Reviewed-on: http://git-master/r/5718 Reviewed-by: Daehyoung Ko <dko@nvidia.com> Tested-by: Daehyoung Ko <dko@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-27[arm/tegra] serial: Using double buffering in receive path.Laxman Dewangan
To improve the performance in receive path, the uart configures the dma in the continuous double buffering mode. The dma keep filling the same buffer in continuously and inform uart driver when half of buffer completes. Change-Id: Iff7c9433766f272384fc1a329ff1db8031987544 Reviewed-on: http://git-master/r/4419 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-27[arm/tegra]dma:Continuous double buffer repeat transfer.Laxman Dewangan
To get the higher performance on uart receive, it is required to have the transfer mode of continuous double buffer of dma operation on the client buffer. The dma keeps filling same buffer and informs client when half buffer and full buffer transfer completes. Also added support to start and stop without enqueing/dequeueing. Bug 725085 Change-Id: I994af55d5e5b2e7f17b889aaa00ca57942bebac8 Reviewed-on: http://git-master/r/4630 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-27[tegra/arm] use no allocate on write for cachingJon Mayo
Changes NMRR (normal memory remap register) to use write-back, no allocate on write for cacheable(C-bit) and bufferable(B-bit) pages. Originally it was set to write-back, allocate on write. Bug 722162 Change-Id: Idb04e86e902c06b5c1721907d93d63c7bb281b5b Reviewed-on: http://git-master/r/5666 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-27[ventana/battery] Gpio to be driven low.Suresh Mangipudi
The Gpio for the battery needs to tbe driven low, so that it does not draw any current. Bug 718123 Change-Id: Ib1493c3ebb8abe0a978b1482abeba43b76a65e1c Reviewed-on: http://git-master/r/5089 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-27[arm/tegra] comms: move 32KHz clock initializationRakesh Kumar
32KHz clock is required for bcm4329 wifi, bluetooth and gps. wifi odm is not correct place for it. Change-Id: I2613236c5cff918b51921609d942568865324a00 Reviewed-on: http://git-master/r/5199 Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Tested-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-08-25[ARM/tegra] RM: elevated cpufreq dfsd priority.Alex Frid
Elevated cpufreq dfsd priority from one step above default to one step below NvOS IRQ priority. Bug 721076 (cherry picked from commit 56a29c7e184bb98457385eea307ce664bf8ceacf) Change-Id: I49c5a3df78d81a2511ef6e1109962464d93495f5 Reviewed-on: http://git-master/r/5570 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-25[ARM/tegra] RM: Updated hotplug request timing.Alex Frid
Removed filtering of CPU1 On/Off repeated requests from RM - no need, since hotplug code is doing it. Bug 722399 (cherry picked from commit b6ee6b6ac46e3ebcd3dda63fa786f4aa90808b90) Change-Id: I0c8ba5a2c5b0eb167f5f1e7cc1281b9f081dd5d6 Reviewed-on: http://git-master/r/5569 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-24[arm/tegra] i2c: Enabling Newslave always.Laxman Dewangan
It is recommended by ASIC to enable the new slave whenever new master is enable in i2c controller. It should be enable even if the controller only works in master mode. This will avoid the misbehaving of the old slave which is enable by default. Change-Id: Ifd2a9626d95e97865cc4f6b7151b2cb47a14840f (cherry picked from commit 498b4e1e113b8db86d5af5425476d2aac5f75442) Reviewed-on: http://git-master/r/5489 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-24[arm tegra odm] battery: modifying stub driverAbhishek Aggarwal
Stub driver is modified to return success from all the relevant APIs to prevent failure of probe of tegra-battery driver. If there is no battery driver then MSD cannot be turned on. Also removing the dummy driver for whistler as it is now redundant since stub driver is being used for whistler. Bug: 715515 Change-Id: Icc922dc9e2016c783d005b5467983553d05a1028 Reviewed-on: http://git-master/r/5467 Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-24[tegra-ehci] Fix Usb device detection for config USB_SUSPENDVenkat Moganty
When CONFIG_USB_SUSPEND is enabled USB device detection is not working. This is due to the wrong API called to resume the hub and HUB resume funtionality not happening properly. Fixed this by calling the correct API to resume the HUB driver when auto suspend is called. Bug 713237 Bug 713966 Change-Id: Ia4d091fd29ea7ebfe5844cf5685fc5a86e66d12a Reviewed-on: http://git-master/r/4984 Reviewed-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-08-24[ARM] whistler: Enable CONFIG_HIGHMEM.vdumpa
Enable CONFIG_HIGHMEM to support 1GB RAM on whistler. Bug 715041 Change-Id: I55ffca382b531782173da6bfa517459b6427348a Reviewed-on: http://git-master/r/5313 Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-20[ARM/tegra] RM: Integrated EMC DLL process dependency.tegra-10.8.2Alex Frid
Implemented EMC digital DLL setting dependency on process variations and scaling frequency. Bug 722439 Change-Id: I558f2dfbfe09eb16010875f2ba8a1a963c95e50f Reviewed-on: http://git-master/r/5383 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-20[arm/tegra] ventana: Enabling CONFIG_SENSORS_LM90Laxman Dewangan
Enabling config variable CONFIG_SENSORS_LM90 for enabling temperature monitoring through ON semoconductor's NCT1008 temperature sensor. The NCT1008 is driver compatible with National semiconductor's LM90 temperature sensor. Change-Id: I263932fe283b75384acd36c486da20fbe9ec5efb Reviewed-on: http://git-master.nvidia.com/r/5079 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-19tegra: Save restore pad control registers acorss LP0Venkata (Muni) Anda
Pad control register should be saved before LP0 and restored after LP0. (cherry picked from commit df7e8107f49e15d5652b63b5a3d35121b9f722ad) Change-Id: I8679de6bccf6292a41a79b5603a9f02da41f8b15 Reviewed-on: http://git-master.nvidia.com/r/5333 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-19[arm/tegra] nct1008: Adding board info for temp sensor nct1008.Laxman Dewangan
Adding the board information for the device nct1008. This is ON semiconductor temperature sensor and driver compatible with national semicoductor LM90. The board info is getting register if config variable CONFIG_SENSORS_LM90 is selected through def config file. Change-Id: I2d49dec6ef0942823654b8f00cf62742f0136273 Reviewed-on: http://git-master.nvidia.com/r/5078 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-28 22:34:03 +0000