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2011-11-03printk: fix the lockup when flushing consoletegra-12r12-android-3.2tegra-12r12-android-2.3Bo Yan
console_cpu_notify can be invoked when processing CPU_DYING. When this happens, the CPU running this code can switch into idle loop and kill itself when trying to acquire semaphore. Reviewed-on: http://git-master/r/60555 (cherry picked from commit 30a39da45fda058c9195605a9cbdabfc9e500bda) Change-Id: I3df89bcaf8c2e9bfe814cd6e64489cb30d73de6d Reviewed-on: http://git-master/r/62301 Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com>
2011-11-03ARM: tegra: cardhu: Update dvfs tables for elpida & samsungRay Poudrier
Added dynamic self-refresh field and updated arbitration settings. Bug 896654 Reviewed-on: http://git-master/r/61728 (cherry picked from commit 6b8d5582fb205c6cb277ce0ecbe328fcf724d664) Change-Id: I54be2f57decb461f5d1f1a0b52ed80aff408fadf Reviewed-on: http://git-master/r/62297 Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com>
2011-11-03ARM: tegra: cardhu: Expand EMC DFS table for Hynix DDR3Ray Poudrier
- Added dynamic self-refresh field, and updated arbitration settings Bug 896654 Reviewed-on: http://git-master/r/61725 (cherry picked from commit 2d5a9c1fbe5cdf4f4233ec3eca230d625d0439de) Change-Id: If3ddc5333edebfb7781c2893e33f8978ae23faab Reviewed-on: http://git-master/r/62296 Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com>
2011-11-03ARM: tegra: clock: Add DSR field to Tegra3 EMC DFS tableAlex Frid
Added dynamic self-refresh (DSR) field to Tegra3 EMC DFS table. This field will be supported starting with table revision to 3.2, and it will allow to enable/disable DSR for each table entry independently. Bug 853990 Reviewed-on: http://git-master/r/#change,61702 (cherry picked from commit 0e7347fd3bb6266ce3c84f1186d60f13205c85a5) Change-Id: I803150b71703e3e06545c87331167a976959296c Reviewed-on: http://git-master/r/62295 Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com>
2011-10-31media: video: tegra: ar0832: tune 800x600 sensor registersPrayas Mohanty
Modify READ_MODE for 800x600 sensor mode of sensor id AR0832_SENSOR_ID_8140. This fixes the incorrect colors during camera preview when the sensor of if AR0832_SENSOR_ID_8140 is used. bug 873857 Change-Id: Iaa999b078bf4c342a3ac7e60d59a128160c15568 Reviewed-on: http://git-master/r/61101 Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com> Tested-by: Prayas Mohanty <pmohanty@nvidia.com> Reviewed-by: Shantanu Nath <snath@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2011-10-31mfd: max77663: Move sleep enable setting from suspend to resumeJin Park
Moving sleep enable setting from suspend to resume. And add sleep enable setting into probe. Bug 849360 Change-Id: I6d51bfeb9912b84c3c49dc00fa9937fb3b5c4c50 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/60656 Tested-by: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-10-31rtc: max77663: Update driver for alarm interruptJin Park
Updated rtc-max77663 driver for alarm interrupt. - Enable alarm for sec, min, hour, mday, month and year except wday, because sometimes wday value is not matched with requested alarm time. - Set alarm to wake-up event from sleep mode. - Add max77663_rtc_irq_mask and max77663_rtc_irq_unmask functions. - Fix incorrected wday calculation. - Clean-up the codes. Bug 849360 Change-Id: If145870400b1d0aab4934a311a10d810c552d4e9 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/60655 Tested-by: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-10-31media: video: tegra: Prevent sleep when cam openpeter mikolajczyk
Adding a check for camera open in order to prevent driver from allowing the system to go to sleep. Application layers must release camera before suspend is called bug 870768 Change-Id: I5df86a22e46af724fd2cf4d8a0440350cbd4aba2 Reviewed-on: http://git-master/r/60307 Reviewed-by: Nathan Lord <nlord@nvidia.com> Reviewed-by: Peter Mikolajczyk <pmikolajczyk@nvidia.com> Tested-by: Peter Mikolajczyk <pmikolajczyk@nvidia.com> Tested-by: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2011-10-31input: tegra-kbc: add is_open, don't suspend if no clockRay Poudrier
Added is_open to know whether the clock has been disabled. Occasionally _close is called before _suspend during LP0 cycles resulting in a hang as the clock is disabled. Bug 855753 Reviewed-on: http://git-master/r/50218 (cherry picked from commit c23a24625f5720adb5ede209b60793b5790ead80) Change-Id: I7eec4b1352a7ea1180c14e4aa73e03fef12004ca Reviewed-on: http://git-master/r/60842 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-10-31ARM: Tegra: power: T33 SKU EDP table for 10A regulatorDiwakar Tundlam
bug 841336 Change-Id: Ibbc1593945f1231dd6a7cf0aae40379fd1d15a78 Reviewed-on: http://git-master/r/60762 Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
2011-10-31arm: tegra: cardhu: new emc DFS table for samsungRay Poudrier
Bug 871975 Change-Id: Ic099d60da06b76cca348849b74644e8d42e6b7a8 Reviewed-on: http://git-master/r/59997 Tested-by: Gerrit_Virtual_Submit Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-10-31arm: tegra: defconfig: Add support for M7400 modem.Raj Jayaraman
Bug 878736 Bug 886459 Change-Id: I9464f3d1598c11e06e08afc9942ac083fd28b52f Reviewed-on: http://git-master/r/58207 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-10-31arm: tegra: Add support for M7400 modem.Raj Jayaraman
Bug 878736 Bug 886459 Change-Id: I065c3c0e911332818c81aee5164a242b4d5cd8f1 Reviewed-on: http://git-master/r/58202 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-10-31drivers: misc: Add support for M7400 modem.Raj Jayaraman
Bug 878736 Bug 886459 Change-Id: I94e0e7b9405b97c4cc302400aaf0f8aea9850e25 Reviewed-on: http://git-master/r/58200 Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com> Tested-by: Rajkumar Jayaraman <rjayaraman@nvidia.com> Reviewed-by: Uday Raval <uraval@nvidia.com> Reviewed-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
2011-10-31arm: tegra: defconfig: Add baseband power management driver.Raj Jayaraman
Bug 886459 Change-Id: Iad6a482c44d3221578261a752fae9a4186127a17 Reviewed-on: http://git-master/r/58182 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-10-31drivers: misc: Add tegra baseband power management driver.Raj Jayaraman
Bug 886459 Change-Id: I455d245cfcf046b90a7d9cc42673614c2e929ddb Reviewed-on: http://git-master/r/58172 Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com> Tested-by: Rajkumar Jayaraman <rjayaraman@nvidia.com> Reviewed-by: Uday Raval <uraval@nvidia.com> Reviewed-by: Michael Hsu <mhsu@nvidia.com> Tested-by: Gerrit_Virtual_Submit Reviewed-by: Steve Lin <stlin@nvidia.com>
2011-10-27arm: tegra: cardhu: KEY_POWER event through ONKEY for PM298Jin Park
ONKEY is connected with PMU and PMU generates power-on interrupt. PM298's power-on interrupt was handled as KEY_POWER event using interrupt keys driver. Bug 849360 Change-Id: I822e540e3f82b81b41dc0a582b3a63f54bf5762b Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/60654 Tested-by: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-10-27Revert "Revert arm: tegra: baseband: Fix modem enumeration for single flash"Steve Lin
This reverts commit 44436ad6fb6927999df3cf6f7bed07f2c4bed14a. Bug 891706 Change-Id: I8386af6b4d5297bb893a7baddef3fe57c091139a Reviewed-on: http://git-master/r/60474 Tested-by: Steve Lin <stlin@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
2011-10-27ARM: tegra: dvfs: Enable EMC bridge if rail is disabledAlex Frid
When core rail is disabled it is set to nominal voltage underneath clock framework. On Tegra3 DDR3 platforms low EMC rates are not safe at high voltage that exceeds EMC bridge minimum level. Enable EMC bridge explicitly in this case to set safe floor for EMC. Similarly need to enable EMC bridge when CPU rail is disabled and pushing core voltage (cpu-to-core voltage dependency) over bridge minimum level. Change-Id: I0cb67cf14ee3849076b63a737fd8c11356cfbf14 Reviewed-on: http://git-master/r/60119 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-10-27video: tegra: host: Add timeout to low-pri throttleTerje Bergstrom
Add timeout to throttling low-priority thread. Low priority threads are allowed to push work either when push buffer is empty, or when they've waited for a pre-defined period. Setting the period to 50ms for now. Bug 864407 Change-Id: Id37bd2c3c229e359973ca10587c20737596f3e1b Reviewed-on: http://git-master/r/58330 Tested-by: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-10-27media: video: tegra: ar0832: Sunny P8M01E supportCharlie Huang
Add support of Sunny P8M01E module (AKA aptina 8141) This new module is identical with 8140 plus pixel improvement. Use different recommended register settings for each sensor. Add function to figure out the sensor id and let the odm driver pick up the right config data. Bug 868929 Change-Id: I5f0c4c2376d50305e2872e2b34c6078597971146 Reviewed-on: http://git-master/r/53022 Reviewed-by: Charlie Huang <chahuang@nvidia.com> Tested-by: Charlie Huang <chahuang@nvidia.com> Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2011-10-26ARM: tegra: clock: Update Tegra3 EMC clock configurationAlex Frid
- Moved initialization of Tegra3 dram configuration variables from EMC DVFS setup to EMC clock initialization, so that these variables can be used independently of DVFS. - Added graceful exit from EMC DVFS setup in case of empty DVFS table - Applied EMC minimum rate to direct EMC clock round rate operations (currently applied only to shared EMC bus update). Change-Id: I1338ead036bc69b3e803c76b5e2eaf51d21290cc Reviewed-on: http://git-master/r/60117 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-26ARM: tegra: power: Enable Tegra3 EMC bridge in suspendAlex Frid
When dvfs is suspended core rail is set to nominal voltage underneath clock framework. On Tegra3 DDR3 platforms low EMC rates are not safe at high voltage that exceeds EMC bridge minimum level. Enabling EMC bridge during suspend for Tegra3 DDR3 platforms guarantees safe EMC operations at high voltage. Change-Id: Ib653dd50071a07e92faa9e2c472211c75a8d1525 Reviewed-on: http://git-master/r/60118 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-26ARM: Tegra: Power: use api to get cpu regulator max_currDiwakar Tundlam
used when the chip SKU is T33/T33S (cardhu) or AP33 (enterprise) to initialize edp with a higher cpu regulator max_curr value. bug 888679 Change-Id: Ica6fd472f414908b2620b4de88a13a5c72f05e52 Reviewed-on: http://git-master/r/60087 Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2011-10-26video: tegra: dsi: use mask to control interruptsXin Xie
This patch is based on "video: tegra: dc: use mask to control interrupts", so we do not use DC_CMD_INT_ENABLE to disable IRQ. Bug 888207 Bug 870801 Change-Id: I2c6e38a22bac69631fdc74cd4e7813d015768fa3 Reviewed-on: http://git-master/r/58176 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-25arm: tegra: issue a warning message per runLiang Cheng
A large trunk of warning message and stack trace storms kmesg when a very small sample quantum is supplied. This eventually causes the system unresponsive. This change fixes this issue by warning once per run. Bug 886286 Reviewed-on: http://git-master/r/56740 (cherry picked from commit 4f36175006a9ee4e0bfb1102af91b551cf044efa) Change-Id: If86852d2b5d66bfeb2610d332229376cdad6903a Reviewed-on: http://git-master/r/60281 Tested-by: Liang Cheng (SW) <licheng@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2011-10-25arm: tegra: cpu: fix compilation errorPreetham Chandru
tegra_throttling_enable function was defined to NULL using a macro if CONFIG_TEGRA_THERMAL_THROTTLE is not defined. So replaced the macro definition with dummy inline function for tegra_throttling_enable function. Without this change we get "called object '0u' is not a function" error during compilation. Bug: 891055 Reviewed-on: http://git-master/r/#change,59598 (cherry picked from commit 3fa5bf723cbf34482de6a1a8473f68bc69958a66) Signed-off-by: Preetham Chandru <pchandru@nvidia.com> Change-Id: I51f9ee8a99080c80cde40ef9864ff65392362e21 Reviewed-on: http://git-master/r/60260 Reviewed-by: Krishna Monian <kmonian@nvidia.com> Tested-by: Krishna Monian <kmonian@nvidia.com> Reviewed-by: Joshua Primero <jprimero@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2011-10-25arm: enterprise: config: raise mmc minor limitSang-Hun Lee
- Raise the number of mmc minors per block device to 16 Bug 870221 Change-Id: I606967436abe32a46941b6c0a5fd452d9cf98fe9 Reviewed-on: http://git-master/r/59769 Reviewed-by: Steve Lin <stlin@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-by: Andrew Chew <achew@nvidia.com> Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
2011-10-25video: tegra: dsi: Add support for DCS short write (1 parameter)Ming Wong
Add MIPI DCS short write (1 parameter) support. The cmds sent with this new function will be sent every frame by hardware Bug 884157 Change-Id: I4110f5698d7156c481ef70c5a343ef4920a78677 Reviewed-on: http://git-master/r/58180 Tested-by: Ming Wong <miwong@nvidia.com> Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2011-10-25Revert "ARM: tegra: power: Clean Tegra3 LP2 entry procedure"Bharat Nihalani
This reverts commit 11d1031e894c67145fb2bffee6f3af19ae4205d3. Bug 889103 Change-Id: I6114d3d59f1d4b7da712d6038da7f87d9bdedb0d Reviewed-on: http://git-master/r/59117 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-10-25mfd: ricoh583: Correct typo in error messageLaxman Dewangan
Correcting typo in the error messages. bug 822562 Change-Id: I7602a500244b6abc651ca36c0b4af76d30bf11e2 Reviewed-on: http://git-master/r/60233 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-10-25regulator: ricoh583: Use register cache to optimise set_voltageLaxman Dewangan
Optimising the read-modify-write operation for setting voltage by using the register cache. Change-Id: Idd04548a9d1563bc2acc815f9c141dc14b2ee8fc Reviewed-on: http://git-master/r/59963 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-10-25media: video: tegra: ar0832: tune 800x600 sensor registersPrayas Mohanty
Modify the READ_MODE and SCALING_MODE sensor register for 800x600 sensor mode, making it same as other working modes. This fixes the incorrect colors during camera preview. bug 873857 Change-Id: I3b871f6e7a7768c9a17dcf9183e972efbc7e004f Reviewed-on: http://git-master/r/59921 Reviewed-by: Krupal Divvela <kdivvela@nvidia.com> Tested-by: Prayas Mohanty <pmohanty@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-10-25mmc: MMC_BLOCK_MINORS should depend on MMC_BLOCK.Sang-Hun Lee
Signed-off-by: Chris Ball <cjb@laptop.org> Tested-by: Chris Ball <cjb@laptop.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Andrew Chew <achew@nvidia.com> Reviewed-on: http://git-master/r/53024 Reviewed-by: Allen Martin <amartin@nvidia.com> (cherry picked from commit 3ea0bc6577c9b8b67d36ef66723012ca6699543a) Bug 870221 Change-Id: I3fcaf64ee3ad402bf6ca54ac0a8080ea613d6d5d Reviewed-on: http://git-master/r/59702 Tested-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Tested-by: Gerrit_Virtual_Submit
2011-10-25mmc: make number of mmcblk minors configurableSang-Hun Lee
The old limit of number of minor numbers per mmcblk device was hardcoded at 8. This isn't enough for some of the more elaborate partitioning schemes, for example those used by Chrome OS. Since there might be a bunch of systems out there with static /dev contents that relies on the old numbering scheme, let's make it a build-time option with the default set to the previous 8. Also provide a boot/modprobe-time parameter to override the config default: mmcblk.perdev_minors. Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Mandeep Baines <msb@chromium.org> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Chris Ball <cjb@laptop.org> Signed-off-by: Andrew Chew <achew@nvidia.com> Reviewed-on: http://git-master/r/53023 Reviewed-by: Allen Martin <amartin@nvidia.com> (cherry picked from commit 73120fb44c41088753abfa02dfee2d01b3f887b6) Bug 870221 Change-Id: Ie8784291c3664ad045a5f0e44d89d3d90e7e55db Reviewed-on: http://git-master/r/59701 Tested-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Tested-by: Gerrit_Virtual_Submit
2011-10-25media: video: tegra: apply powergate based on chipset revisionJihoon Bang
Apply powergate differently depending on chip revision. Remove dependency of regulator and csi. Enable regulator when any client asks for power. Previously regulator was enabled only when csi was enabled. Bug 855758 Bug 878057 Change-Id: Ib231d1f1074aa1547c223e294fe9d72cf81f8f9e Reviewed-on: http://git-master/r/59369 Reviewed-by: Jihoon Bang <jbang@nvidia.com> Tested-by: Jihoon Bang <jbang@nvidia.com> Tested-by: Gerrit_Virtual_Submit Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2011-10-25Revert "ARM: tegra: power: Restore cpu LP2 request statistic"Bharat Nihalani
This reverts commit 464da11dc8aa1dcd1ec0e0d3ba13b48730a29351. Bug 889103 Change-Id: I7e5b39db56861a1bb1baac5414691d677243cae6 Reviewed-on: http://git-master/r/59118 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-10-25Revert "ARM: tegra: power: Update Tegra3 LP2 time prediction"Bharat Nihalani
This reverts commit 47450edc2d22b5561c9aebcf09ea7179d8162c18. Bug 889103 Change-Id: If9b0755835b400b1d926f5a0fcb29afcc58530e0 Reviewed-on: http://git-master/r/59116 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-10-25arm: tegra: usb_phy: move setup value init to PhyopenSuresh Mangipudi
The transciever settings were set for every suspend/resume of the device. The transciever settings should be set only once that is during the phyopen. Bug 889140 Change-Id: Iaf89632fcdbdde950b9f77d3a8b87594061409a1 Reviewed-on: http://git-master/r/59097 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2011-10-25mfd: max77663: Set sleep enable bit before enter into suspendJin Park
The sleep enable is required that AP can be placed MAX77663 into sleep mode by pulling EN1 input low. Bug 849360 Change-Id: I44ce0356fd7bda965f84c742b778e426b015b8d8 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/59477 Tested-by: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-10-24ARM: tegra: dvfs: Update cpu nominal voltage selectionAlex Frid
Update cpu nominal voltage selection to accommodate irregular voltage steps in cpu dvfs table (instead of constant 25mV step assumed so far). Change-Id: I2df2f0fb3dc2e4ebb66602441d0f484500d2965c Reviewed-on: http://git-master/r/59457 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-10-24ARM: tegra: clock: Clean miscellaneous Tegra3 clocksAlex Frid
- Removed xio and twc clock descriptors (no such clocks on Tegra3) - Updated 1.7GHz cpu frequency table (for T33), and added 1.5GHz table (for AP33) - Updated emc bridge related comments Change-Id: I46109d38fb7b6fba064a5b920f76e4a9315dba6e Reviewed-on: http://git-master/r/59458 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-10-21Revert "serial: tegra: Avoid sleeping in atomic context"Simone Willett
This reverts commit 7ebaaea25400d3708b6f3ac3585b61b65ab99a17. Change-Id: I38fd6ab994e819fc3a2c67a2fa870f226dfe0581 Reviewed-on: http://git-master/r/59772 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-21Revert "arm: tegra: comms: Fix RAW-IP rx after resume."Simone Willett
This reverts commit 6af7fd6d2d43455f2ca54dcacd2f46197410c578. Change-Id: I839d0c4beba8c1fc432ff14b89cf0939004e1b30 Reviewed-on: http://git-master/r/59775 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-21Revert "arm: tegra: cardhu: change vi_sensor pll source"Simone Willett
This reverts commit 220af4f1669fac7629a1a777f3037b29749d8b46. Change-Id: I33d380d061be502df0aa13c0ee466c32f5eb8fce Reviewed-on: http://git-master/r/59774 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-21Revert "arm: tegra: comms: Allow variable number of RAW-IP interfaces."Simone Willett
This reverts commit 0fbbd5191c3f1bcd873a2f13edeb63050dab33c1. Change-Id: I4e565a81cf5fda5c5bd682aa94cc23cda00e0339 Reviewed-on: http://git-master/r/59773 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-21Revert "arm: tegra: cpu: fix compilation error"Simone Willett
This reverts commit 3fa5bf723cbf34482de6a1a8473f68bc69958a66. Change-Id: I27042adcc160cd89c7eab6fa19a61d06e9c7f3ea Reviewed-on: http://git-master/r/59771 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-21Revert "arm: tegra: baseband: Fix modem enumeration for single flash"Simone Willett
This reverts commit 5f1b12179c239674741a3a93dbcecd66cdd665be. Change-Id: Ia5bf5597bba939022f9efba8a50dc10ceaef8189 Reviewed-on: http://git-master/r/59770 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2011-10-21arm: tegra: baseband: Fix modem enumeration for single flashSteve Lin
Bug 891706 Reviewed-on: http://git-master/r/59430 (cherry picked from commit a32458b540d77e0bd965b1415a22155731c4e4ba) Change-Id: I6b45359860a8ea24af24058d27a1ad428d45be5a Reviewed-on: http://git-master/r/59663 Reviewed-by: Steve Lin <stlin@nvidia.com> Tested-by: Steve Lin <stlin@nvidia.com>
2011-10-21arm: tegra: cpu: fix compilation errorPreetham Chandru
tegra_throttling_enable function was defined to NULL using a macro if CONFIG_TEGRA_THERMAL_THROTTLE is not defined. So replaced the macro definition with dummy inline function for tegra_throttling_enable function. Without this change we get "called object '0u' is not a function" error during compilation. Bug: 891055 Change-Id: Ibf1b6da5ed8d561801ab05e0dc188adf22d3ff25 Signed-off-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-on: http://git-master/r/59598 Reviewed-by: Krishna Monian <kmonian@nvidia.com> Tested-by: Krishna Monian <kmonian@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-23 21:44:08 +0000