Age | Commit message (Collapse) | Author |
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Integrate OV5640 CSI camera sensor support.
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It looks like our crystal load capacitance is way off as we just copied
NVIDIA's default setting being the lowest possible 1.5 pF due to their
boards having 20 pF external caps while our hardware does not have any
external caps assembled and we should use the highest 12.5 pF setting.
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On a mx28evk with a sgtl5000 codec we notice a loud 'click' sound to happen
5 seconds after the end of a playback.
The SMALL_POP bit should fix this, but its definition is incorrect:
according to the sgtl5000 manual it is bit 0 of CHIP_REF_CTRL register, not
bit 1.
Fix the definition accordingly and enable the bit as intended per the code
comment.
After applying this change, no loud 'click' sound is heard after playback
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
(cherry picked from commit c251ea7bd7a04f1f2575467e0de76e803cf59149)
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CHRGPUMP_POWERUP
The SGTL5000_CHIP_ANA_POWER register is cached. Update the cached
value instead of writing it directly.
Upstream-status: sent
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
(cherry picked from commit 309abdeda8c9331013f25b1a1209d9ce8334237b)
(cherry picked from commit 8a8b303a7431e66a7ec6ec52bc0e04ed0a1335d0)
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Bring the kernel module configuration more in line with what we
currently really deploy. As a second step we can then change the way
kernel modules are actually deployed by just deploying them all.
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Calculate the number of words in a transfer properly: if there are
129-131 bytes, then number of words is more than 32, therefore the
transfer should be handled with DMA rather than FIFO.
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On Tegra30, on a high CPU load or operating at maximum frequency results
in continous interrupt generation, with the following log spewout:
(tegra_w1_irq: line 236) spurious interrupt, status = 0x800
(tegra_w1_irq: line 236) spurious interrupt, status = 0x800
(tegra_w1_irq: line 236) spurious interrupt, status = 0x800
(tegra_w1_irq: line 236) spurious interrupt, status = 0x800
which shows the TX_FIFO_DATA_REQ to be somehow continously being set. To
circumvent this specifically detect the bit transfer and presence done
IRQ's only, for generating a "completion" signal on which the core logic
waits. We anyhow only wait for these interrupts in particular. While at
it, also change the error message to be printed only if it is
conditionally enabled instead of all the time, which floods the serial
console and allows a wrong interpretation of the one wire device not
working at all.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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On Tegra3 at high CPU load, for example while running stress, reading
data from one wire results in the following stack trace:
[ 58.436052] [<c05e93d4>] (__raw_spin_lock_irqsave+0x3c/0xac) from
[<c05e945c>] (_raw_spin_lock_irqsave+0x18/0x1c)
[ 58.446322] [<c05e945c>] (_raw_spin_lock_irqsave+0x18/0x1c) from
[<c0048eb4>] (complete+0x28/0x64)
[ 58.455276] [<c0048eb4>] (complete+0x28/0x64) from [<c03e276c>]
(tegra_w1_irq+0x74/0xb4)
[ 58.463376] [<c03e276c>] (tegra_w1_irq+0x74/0xb4) from [<c009a1fc>]
(handle_irq_event_percpu+0x9c/0x278)
[ 58.472847] [<c009a1fc>] (handle_irq_event_percpu+0x9c/0x278) from
[<c009a424>] (handle_irq_event+0x4c/0x6c)
[ 58.482666] [<c009a424>] (handle_irq_event+0x4c/0x6c) from
[<c009cc40>] (handle_fasteoi_irq+0xe0/0x118)
[ 58.492048] [<c009cc40>] (handle_fasteoi_irq+0xe0/0x118) from
[<c0099bd8>] (generic_handle_irq+0x30/0x40)
[ 58.501616] [<c0099bd8>] (generic_handle_irq+0x30/0x40) from
[<c000ecfc>] (handle_IRQ+0x88/0xc8)
[ 58.510393] [<c000ecfc>] (handle_IRQ+0x88/0xc8) from [<c0008430>]
(asm_do_IRQ+0x18/0x1c)
[ 58.518475] [<c0008430>] (asm_do_IRQ+0x18/0x1c) from [<c000e098>]
(__irq_usr+0x38/0xc0)
[ 58.526464] Exception stack(0xe51a3fb0 to 0xe51a3ff8)
[ 58.531506] 3fa0: 00000000
bea29b04 4030b1b0 4030b4c8
[ 58.539673] 3fc0: 4030b22c 4fd2f305 0000d770 0000d6b0 00000000
00000001 0000000d 00000145
[ 58.547839] 3fe0: 193c62ce bea29af4 4030b22c 4020beb4 600b0010
ffffffff
[ 58.554445] Code: e5843004 e10f0000 f10c0080 e3a02001 (e1953f9f)
[ 58.560539] ---[ end trace fb2fc83ceb8e95c1 ]---
[ 58.565154] Kernel panic - not syncing: Fatal exception in interrupt
[ 58.571520] [<c0014ef4>] (unwind_backtrace+0x0/0xec) from
[<c05e10c8>] (dump_stack+0x20/0x24)
[ 58.580039] [<c05e10c8>] (dump_stack+0x20/0x24) from [<c05e16a0>]
(panic+0x7c/0x1ac)
[ 58.587783] [<c05e16a0>] (panic+0x7c/0x1ac) from [<c0012038>]
(die+0x280/0x2e8)
[ 58.595087] [<c0012038>] (die+0x280/0x2e8) from [<c05e1130>]
(__do_kernel_fault.part.3+0x64/0x84)
[ 58.603952] [<c05e1130>] (__do_kernel_fault.part.3+0x64/0x84) from
[<c0015c84>] (do_page_fault+0x204/0x21c)
[ 58.613681] [<c0015c84>] (do_page_fault+0x204/0x21c) from
[<c000830c>] (do_DataAbort+0x44/0xa8)
[ 58.622369] [<c000830c>] (do_DataAbort+0x44/0xa8) from [<c000de18>]
(__dabt_svc+0x38/0x60)
This seems to be generated due a possible race condition between the on
stack kernel completion being set to NULL in tegra_w1_touch_bit, while a
possible spurious IRQ calling this completion in the IRQ handler. This
is a temporary bandaid and the ideal solution would be to find why this
affects the Tegra3 and not Tegra2.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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CONFIG_SATA_AHCI=m
This allows using PCIe cards with a SATA interface.
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As NVIDIA so far was unable to provide us with any proper speedo
numbers for their industrial temperature aka IT parts just make SKU
0xB0 aka T30IQS-Ax behave identical to the regular commercial
temperature 0xB1 aka T30MQS-Ax for the SKU to speedo ID conversion.
This prevents them to fall back to fixed 600 MHz operation and crashing
thermal throttling once kicking in due to missing table entry causing a
null pointer exception.
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Springville/i211 with a blank Flash/iNVM use different PCI IDs. Extend
the driver to load despite i210/i211 data sheets claiming tools only,
not for driver.
Only warn rather than fail on NVM validation failures on Apalis T30.
Revise Ethernet MAC address assignment: should now handle up to two
instances of custom user MACs (2nd one with a 0x100000 offset). This
way customer does not have to worry about NVM on a secondary Ethernet
on the carrier board and still gets a valid official MAC address from
us (e.g. analogous to how we did it on our Protea carrier board).
Use the Toradex OUI as default MAC address if no valid one is
encountered.
Tested on samples of Apalis T30 2GB V1.0B, V1.0C, V1.1A, Apalis T30 1GB
V1.0A, V1.1A and Apalis T30 1GB IT V1.1A both with blank NVMs as well
as iNVMs programmed with Intel's defaults.
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Springville/i211 with a blank Flash/iNVM use a different PCI ID (tools
only, not for driver) than properly programmed ones.
While at it also fix ethtool time stamping as well as RX flow hash
indirection functionality.
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Integrate latest igb driver version 5.2.17
(igb-5.2.17.tar.gz from e1000.sf.net).
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Conflicts:
drivers/mtd/ubi/ubi.h
drivers/mtd/ubi/wl.c
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Enable module versioning support (CONFIG_MODVERSIONS and
CONFIG_MODULE_SRCVERSION_ALL) which allows using kernel modules across
different kernel builds/versions.
While at it also update the Android configurations.
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This reverts commit bdf9e11d339ebc121e80e7ecdd44e0abcaf4ff38.
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When commands timeout, previously we had code to
retry the same command 3 times. But under some
situations 3 retries do not suffice. Increasing
the retries to 10 does the trick. Also if the card
does not respond after 10 retries then the card is
dead for sure. But if the same card responds in
between 3 to 10 retries then it is always beneficial
to have retries as 10.
Bug 914934
Change-Id: I6b1e95c10ca5a62dde84ce8cacbe53ad2197ab33
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/72092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
(cherry picked from commit c4beda3e798ed91e1dadbce4206b407832fcc40b)
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If the data commands fail due to some error, retry the transfer.
Add 3 retries for data commands.
for bug 914934
Change-Id: I53245ddd159abdbade09f841d9490d2f106e7c88
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/71181
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
(cherry picked from commit fd804ee58d3f9ce10cb2fe16aa76ae0407912d32)
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Add tracepoints to record the start and end of each mmc block
operation. This includes read, write, erase, secure erase,
trim, secure trim1 and secure trim 2, discard and
sanitize commands.
Change-Id: Ic5d1cbdb9adb940d8b1a2a13c73970023575df50
Signed-off-by: Ken Sumrall <ksumrall@android.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
Conflicts:
drivers/mmc/card/block.c
drivers/mmc/core/core.c
(cherry picked from commit 4de9a433c26e47d9b4a93105eb92935321100786)
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Support discard feature if MID field in the CID register is 0x15, EXT.CSD[192]
(device version) is 5 and Bit 0 in the EXT.CSD[64] is 1. Also removed REQ_SECURE flag
check to avoid kernel hang.
This patch is released from samsung.
Change-Id: I4023a900680e9bca10c40311b09ed077a22617db
(cherry picked from commit 4acc227edfb631d377e14911287c1b73682fc9c2)
Conflicts:
drivers/mmc/card/block.c
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Change-Id: Ia56018522e5d18ca5bfd25858ec943da93d3edc3
(cherry picked from commit e363e576f448d6132340c5d0bda580fef212888d)
Conflicts:
drivers/mmc/host/sdhci-tegra.c
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Change-Id: I46e3f1a158d61a0b255fae5d510c8f87579c435d
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/47847
Reviewed-by: Kirt Hsieh <Kirt_Hsieh@asus.com>
Tested-by: Kirt Hsieh <Kirt_Hsieh@asus.com>
Reviewed-by: Vincent Yue <Vincent_Yue@asus.com>
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/48199
Reviewed-by: Jim1 Lin <jim1_lin@asus.com>
Tested-by: Jim1 Lin <jim1_lin@asus.com>
Reviewed-by: Leslie Yu <Leslie_Yu@asus.com>
(cherry picked from commit 8eadc6d514b7838c398ff3499ab5f2e012e2fc06)
Conflicts:
drivers/mmc/host/sdhci.c
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Change-Id: I40a8481618b1a5995a713ff343c7532badd20b65
Change-Id: I399302118c9d8d8246a4a304ff7a1ea80889dbc6
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45568
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
(cherry picked from commit 121c0c6dffe16c683f4dbf00ed841fb4de1f70a0)
Conflicts:
drivers/mmc/core/mmc.c
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Change-Id: I28d670944cbfd55e2b2ad98b727368a8dfdc0944
Change-Id: I2bb65335c2468b257473fe264e705826cfd4474e
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45300
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
(cherry picked from commit 1711f72a9840f3667cf93c774ac16c2d8417375c)
Conflicts:
drivers/mmc/core/core.c
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Change-Id: I89b544afbb0a109a222621a9948399fba8f77693
Change-Id: Ie366a152100a478e7811b4395f3fae9794bb1386
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45221
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
Conflicts:
drivers/mmc/core/mmc.c
include/linux/mmc/card.h
asdf
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Commit fe4c58c4b96a24aba8e27956e8158b3002723b17 adding ADV7280 support
introduced the following warning being printed during boot:
[ 1.121072] sysfs: cannot create duplicate filename
'/devices/platform/soc-camera-pdrv.3'
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(tegra-l4t-r16-16.5)
Conflicts:
drivers/media/video/tegra_v4l2_camera.c
drivers/mmc/host/sdhci.c
drivers/watchdog/tegra_wdt.c
include/media/tegra_v4l2_camera.h
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This patch adds optional UHS support for the 8-bit MMC controller.
Please note that this requires V1.1A or later module hardware plus the
pull-up resistors on the data as well as the command signal lines of
your carrier board need to be removed (e.g. R46 to R54 on our Apalis
Evaluation Board V1.1A). If those pre-requisites are met support can be
enabled using the following kernel command line parameter:
mmc_uhs=1
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Certain low-speed USB devices were not detected correctly when plugged
into a running system.
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The pixel clock polarity setting was wrong: The kernel display flags
are rather somewhat confusing: The flags specify the edge where the
data should be driven by the controller (and hence not sampled by the
display!).
Please note that we don't change the default pixel clock polarity.
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Our move to modedb lead to the HDMI display controller always being
enabled (unless forced off by vidargs). This patch makes sure it gets
disabled upon boot disconnected as well as upon later disconnect.
Note: This also fixes DVFS on Colibri T30 in the sense that it will
again stay at 400 MHz EMC as long as no DVI-D aka HDMI display is
connected during boot.
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As stated by the eMMC 5.0 specification, a chip should not be rejected
only because of the revision stated in the EXT_CSD_REV field of the
EXT_CSD register.
Remove the control on this value, the control of the CSD_STRUCTURE field
should be sufficient to reject future incompatible changes.
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 03a59437ef6b6ad7fb0165cb9b96c08d6bf057fc)
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With the new eMMC5.1 spec, there is a new EXT_CSD register with
the revision number(EXT_CSD_REV) 7. This patch updates the check
for ext-csd.rev number as 7.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit 6636bad839d9936e73e48c4841eda83a58fcdb53)
Conflicts:
drivers/mmc/core/mmc.c
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Both the Apalis EvalBoard as well as Ixora allow their LTC2954
pushbutton on/off controller to optionally initiate orderly shutdown
via GPIO interrupt on GPIO5 upon short power button press (short here
meaning really short unless C137 resp. C35 is assembled). For this to
work the following wiring is required:
Apalis EvalBoard V1.1a X61-4 to X2-6
Ixora V1.0a X5-4 to X27-17
For systemd/logind to actually use this as a power-switch a custom udev
rule /etc/udev/rules.d/70-power-switch-apalis_t30.rules as follows is
required:
# Specific rule for apalis_t30:
#
# Apalis T30's power button is not part of the kernel acpi subsystem.
# Let's manually add the power-switch tag to control its behaviour with
# systemd/logind
ACTION=="remove", GOTO="power_apalis_t30_end"
SUBSYSTEM=="input", KERNEL=="event1", TAG+="power-switch"
LABEL="power_apalis_t30_end"
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Both the Apalis EvalBoard as well as Ixora allow their LTC2954
pushbutton on/off controller to optionally be forced off by using a
GPIO. This patch implements this upon poweroff/shutdown using Apalis
GPIO6 which happens to be internally pulled-up upon power-on reset
(otherwise we would immediately get powered off again). For this to
work the following wiring is required:
Apalis EvalBoard V1.1a X2-A5 to X61-5
Ixora V1.0a X27-18 to X5-5
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The wake-up-key (formerly power-key) on MXM3 pin 37 aka WAKE1_MICO is
actually active-low due to the EvalBoard v1.1a having 4.7 K pull-up.
This patch fixes this.
While at it also get rid of the custom wakeup_key handling blindly
copied from T20 as non of the other T30 boards do this and it anyway
might only be required for LP0 which we anyway do not support so far.
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This commit, updates the driver to work faster with 32-Lead and 40-Lead
versions of adv7180 chip. Output pin VS/FIELD is now configured as
VSYNC.
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This patch fixes a clock related audio hub driver lock-up observed when
booting with mainline U-Boot which we are in the process of migrating
to now.
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Newer eMMC standards use CMD23 for multi-block transfer. These
command has the advantage that only one command is necessary, no
stop command after the transfer is required. The kernel already
supports this command, but we need to enable the capability on
the host level.
Tests verified that the MMC code detects that SD-card do not
support CMD23 and hence don't use that command.
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While in list_for_each_entry() of yaffs_flush_inodes, the fs code
can delete inodes. This leads to an endless loop which causes a
softlockup. Typically this happend in sync_supers when creating
and deleting files while under CPU load.
This fix checks whether we get twice the same inode. If this is
true, we just retry again.
This is an alternative fix to the proposed fix Jisheng Zhang:
yaffs: fix softlockup cauesed by inode deleted when scanning s_inodes list
http://www.aleph1.co.uk/lurker/message/20110831.075307.3cfeacdf.fr.html
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Do not disable and re-enable clocks after deasserting
PCIE, AFI and PCIEX resets. Deasserting the resets should
be followed by programming the PCIE.
Bug 1521306
Change-Id: Idc43bc9b21cac3818852ed059fe512f4cd75b748
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/495616
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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PCIe Reset line must be asserted for at least 100us after clock is enabled.
PEX 2 Controller Register fix, offsets are not at constant intervals.
Bug 1521306
Reviewed-on: http://git-master/r/225399
(cherry picked from commit df0760bf515236bed2e87e590509642ab72a01b5)
Change-Id: I7b44ea51e7e02f2bca93cfc75ed85e01ab91fe03
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/435598
Reviewed-by: Jay Agarwal <jagarwal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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