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2012-04-23arm: tegra: xmm: check return value of autopm_getShawn Joo
check return value of usb_autopm_get_interface(). if return value is not success, usb_autopm_put_interface() should not be called to make up the reference count. Bug 936094 Signed-off-by: Shawn Joo <sjoo@nvidia.com> Reviewed-on: http://git-master/r/85974 (cherry picked from commit aad2bf5c8fef639465c4bb895b73a23c3f0c0403) Change-Id: Ifd1deb1e0953eae1fd8d41f48989b650d6951fed Reviewed-on: http://git-master/r/97647 Reviewed-by: Shawn Joo <sjoo@nvidia.com> Tested-by: Shawn Joo <sjoo@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-04-23video: tegra: nvavp: Add force clock stay on APIHyung Taek Ryoo
Add nvavp_force_clock_stay_on ioctl which provides way for user-mode driver to stay on AVP clock state. This change is to fix LP0 resume fail during Widevine playback. Since VDE/BSEV clocks are used by OTF driver in secure world during closing sesssion, the change makes VDE/BSEV clocks running while entering LP0. Bug 960130 Bug 961015 Change-Id: I7eaaa9a33537a72b6ae0a016372bc513fef532e2 Reviewed-on: http://git-master/r/96302 Reviewed-by: Hyung Taek Ryoo <hryoo@nvidia.com> Tested-by: Hyung Taek Ryoo <hryoo@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2012-04-20ARM: tegra: cardhu: set open drain type to be false for normal pinLaxman Dewangan
When registering fixed regulator for gpio, setting the open drain state to false for normal pin i.e. non-open drain pin. This was side effect of the changes done for porting gpio regulator to fixed regulator. bug 970262 Change-Id: I1977e48b3461f8eb2aacadc28e4b53165ac4e1ec Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/97946 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-20tegra: usb: otg: Clear only interrupt enabling bits in suspendJoshua Cha
In resuming from LP1, USB HOST is wrongly detected in Tegra2. In that time, adb connection doesn't work also. So clear only interrupt enabling bits to fix this problem. Bug 960254 Bug 970012 Change-Id: I2f8e891ab2abcf8552526ff305d6f3a148076edd Signed-off-by: Joshua Cha <joshuac@nvidia.com> Reviewed-on: http://git-master/r/96769 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-20ARM: tegra: dma: Use no DMA interrupts if no callbacksChaitanya Bandi
If there are no callbacks associated with the request, dma interrupt is not enabled. Bug 969125 Change-Id: Ifbf2a8d6c474187927ee38af03cb96e53e199b83 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/96724 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-04-20video: tegra: dc: update windows after set lutAdam Cheney
TEGRA_DC_EXT_SET_LUT programmed the proper shadow registers but did not copy the shadow registers to the active set. Signed-off-by: Adam Cheney <acheney@nvidia.com> bug 947281 Change-Id: Id734e128bb708f1a75c0cad22b0c51b083d8df3b Reviewed-on: http://git-master/r/91368 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-19arm: tegra: enterprise: Correct sdmmc4 tap delayPavan Kunapuli
For SDMMC4 GMI interface, tap delay value of 0xF is recommended by HW team. Bug 911075 Change-Id: I2cdf90f34341cb8062dbded52ff1739c0c84cb0d Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/97668 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-04-19usb: otg: tegra: callback for otg plug/un-plug notificatonSyed Rafiuddin
Addition of callback function to nofity the plug and un-plug of OTG cable to charger driver. Change-Id: I6b16d051cafe0799cffe8a05d1510da27e841f8b Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-on: http://git-master/r/97514 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chandler Zhang <chazhang@nvidia.com> Tested-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-19mmc: tegra: Disable card and host clk separatelyPavan Kunapuli
Disable card clock before disabling internal clock to ensure that there are no abnormal clock waveforms. Bug 947058 Change-Id: I98a3f7f63b4380b62bead05f1018d3cddc0ac217 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/95396 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-19mmc: host: Disable SDIO card clock when idlePavan Kunapuli
Disable SDIO card clock when there are no commands/ data transfers on the SD bus. Bug 958954 Bug 955742 Bug 952344 Change-Id: I7390be0406f7e46c0eb88ede2ae6f904b2181306 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/95390 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-19usb: ehci: tegra: Fence read in unmap urbKrishna Yarlagadda
There is a chance that we might read an TD request which has just arrived after fence read in a interrupt handler. Added fence read in unmap urb to avoid this issue. Bug 964879 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/95916 (cherry picked from commit 8d8415820014710052eef088ed2d579d0531cd52) Change-Id: Ia682654a25c685cf3dd2e76c8b9ea30427a06d89 Reviewed-on: http://git-master/r/97507 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-19arm: tegra3: change min_rate for clocksAmit Kamath
Set minimum sclk,pclk and hclk rate same at 12Mhz for power optimization bug 939415 Change-Id: I579eeca780357b02f65333ffea58301040943506 Signed-off-by: Amit Kamath <akamath@nvidia.com> Reviewed-on: http://git-master/r/96922 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-19Revert "ARM: pm: force non-zero return value from __cpu_suspend when aborting"Sang-Hun Lee
This reverts commit 037bc840859c0d52abedeb576888714698f04bcf. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: I89fa9aad8e56628ebb8932c694d37ab92daaab22 Reviewed-on: http://git-master/r/96796 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: preallocate a page table for suspend/resume"Sang-Hun Lee
This reverts commit 55f0f45a45263ba26bd473f50f867d29dd836e46. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: I036e0bd4e391a17dec8fa0fe86da7eb6b98d503a Reviewed-on: http://git-master/r/96795 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: only use preallocated page table during resume"Sang-Hun Lee
This reverts commit 46d9f14943770c24603ef7cdfd8eb2dbcd3c1248. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: Iee732d8137043240902201d7783d2c3fede98fbe Reviewed-on: http://git-master/r/96794 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: get rid of cpu_resume_turn_mmu_on"Sang-Hun Lee
This reverts commit 5682179d980e1a70bcf37fd97a14e27a2ddde822. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: Ieb44d89a8361d1fa59b3d6375234f06f57c1c717 Reviewed-on: http://git-master/r/96793 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: no need to save/restore context ID register"Sang-Hun Lee
This reverts commit 16e0bb8c46656b1d902d422e0065c746af161a1c. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: Ifa115c4030c48cbd0b629cf02899ca8c6f25d314 Reviewed-on: http://git-master/r/96792 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: convert some assembly to C"Sang-Hun Lee
This reverts commit 11a2e1bb69affe9e8273bc6d1452cd9282ddd27a. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: Ibace368a190a14d24e1cc963e8e2a7ed6fdbba6a Reviewed-on: http://git-master/r/96791 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: pm: add L2 cache cleaning for suspend"Sang-Hun Lee
This reverts commit a27cd62bb4934abe2af420ba7ca5115fbfb653be. Bug 967887 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Change-Id: I826224a4aea4bac78f9d2d1ce6797e8585fc148b Reviewed-on: http://git-master/r/96790 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Restore "ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmu"Sang-Hun Lee
This restores commit 607d5ec8bb46f95473533f611da1ffc97907d16e. The common ARM CPU state suspend/resume code does not work with and external L2 cache controller (like a PL310) enabled. This change fixes corruption of the current PMD by the MMU resume code. cpu_resume_mmu modifies the currently active page tables to add a flat (VA==PA) section mapping of cpu_resume_turn_mmu_on to handle MMU off-to-on transition. It turns off the L1 data cache but it knows nothing of the L2 cache. Since page table walks are L2 cacheable, other CPUs in the system can pick up the corrupted PMD which will eventually result in a kernel panic. The workaround for this is to modify push_ctx_regs to save the current TTB0 and CONTEXID registers in the CPU register context and switch to the private tegra_pgd before saving the rest of the CPU context. The tegra_pgd already has a flat mapping for the code in question, so it can't be damaged by the actions of cpu_resume_mmu. Likewise, pop_ctx_regs is modified to restore the actual TTB0 and CONTEXTID registers when restoring the CPU registers. Bug 967887 Change-Id: Iaf98c46359860531874354e8cddabe299ea90d57 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96789 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: tegra: remove usage of USE_TEGRA_CPU_SUSPEND"Sang-Hun Lee
This reverts commit e6d0e0ceec7cd1a7b8085eb31d2e70bc4d15684f. Bug 967887 Change-Id: I60927a93ebdf6ba4da14311f8ffcc1edf4f56391 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96788 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: tegra: rethink the cpu suspend-resume code path"Sang-Hun Lee
This reverts commit f31ca2d9e0580b58dc51fde31fc8ace190dd253b. Bug 967887 Change-Id: I3fe975f7a6939cace5e208947bcb82e09008c0ac Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96787 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: tegra20: pm: flush L1 data before exit coherency"Sang-Hun Lee
This reverts commit 209209a303742d6312f66896b4351dd97e48e24c. Bug 967887 Change-Id: I2464db28b5a4970d6e60ef79c89c2107c64cb6d3 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96786 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19Revert "ARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU"Sang-Hun Lee
This reverts commit 743c03fbeb5908faf4aef6bee7702a2ad4caac22. Bug 967887 Change-Id: Ie4477e3b5fa9773c9e60b5cace47b3ff240a4bf1 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/96785 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-19drivers: resolve compilation time warningsSanjay Singh Rawat
bug 949219 Change-Id: I5942ba86bd1cbe1f1bd06a7c9f51a10d83e6cabb Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/92819 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-19ARM: tegra: remove T30 FPGA supportJuha Tukkinen
Remove T30 FPGA support as it will conflict with downstreaming mainline way of using chipid and revision. Change-Id: Ic1fd1107801de13c265c7dde8571e0537c43f4fd Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/95872 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-19ASoC: resolve compilation time warningsSanjay Singh Rawat
bug 949219 Change-Id: I52969e8dd1a5ed4dc76ac360ec08b0afb18cd4a5 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/92833 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-19arm: tegra: resolve compilation time warningsSanjay Singh Rawat
Bug 949219 Change-Id: I875f8688a272c415ebf345b8f30e4afdf7551b29 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/91523 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-18ARM: tegra: cardhu: pm299: enable 3v3 rail during bootLaxman Dewangan
Enabling the 3v3 voltage rail during boot. bug 822562 Change-Id: I15318b0c30bae716f40985cbee06cd9eaff54ee3 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96685 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-18i2c: tegra: support for I2C_M_NOSTART protocol manglingLaxman Dewangan
Adding support for protocol mangling I2C_M_NOSTART. Change-Id: I6cc0c96b3c374d452ea886a0f983dc5d31c4575c Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/92573 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-18ARM: tegra: usb: kai: pmu int not requiredKrishna Yarlagadda
vbus int can be generated from pmu and directly from port when host mode is reqruied, we use vbus int and pmu int is not required as usb clock is not disabled. Bug 961166 Change-Id: I96fde7daf052a7c5b8e94414e309b0be6354ec80 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/96338 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chandler Zhang <chazhang@nvidia.com> Tested-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-18arm: tegra: kai: addition of charger regulatorChandler Zhang
Use SMB349 regulator instead of irq to controll USB1 VBUS Bug 961166 Bug 966874 Change-Id: I68884444883277ef169f3eb066ea50d6d49b708d Signed-off-by: Chandler Zhang <chazhang@nvidia.com> Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-on: http://git-master/r/96441 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-18power: smb349: addition of regulator interfaceSyed Rafiuddin
Addition of reglator interface to detect the usb cable plug/unplug detection. Bug 961166 Bug 966874 Change-Id: Ida297bc39df9aca8cffe60c29bc24f2d32819f56 Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com> Signed-off-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-on: http://git-master/r/96440 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-18mfd: max8907c: Disable Hard Reset with Power keyAshwini Ghuge
Disable Hard Reset on long press of power key. Bug 893517 Change-Id: Ic328a04e917aa1bed6780e6f9a2f1c575f84fb68 Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Reviewed-on: http://git-master/r/96687 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-18usb: gadget: fsl_udc: support udc driver without otgRakesh Bodla
Currently udc driver is dependent on otg driver. Added irq work to make gadget driver work with disabling otg driver. Bug 962366 Change-Id: Id782d8003da12ace553b8b812fa410567c281b34 Reviewed-on: http://git-master/r/95106 Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Tested-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-04-18arm: tegra: enterprise: disable dsi_csi_rail in LP0Vinayak Pane
AVDD_DSI_CSI is shared by modem and dsi. If DSI turns off this rail then HSIC fails after wakeup from modem. This patch provides a way to turn on this rail from modem as well as from DSI. Create two virtual power rails from avdd_csi_dsi to control it from both the drivers separately. This is enterprise specific change as per the power rail layout. Bug 920881 (cherry picked from commit ab52b51c59f776ae770d48a28a2744e2db2e5d2f) Reviewed-on: http://git-master/r/85656 Change-Id: I2e9c04a8f4e8d6fd20584b4e75657c1cb6d5c8bd Signed-off-by: Vinayak Pane <vpane@nvidia.com> Reviewed-on: http://git-master/r/89134 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Puneet Saxena <puneets@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-18ARM: tegra: dma: Add API to get channel idChaitanya Bandi
Added tegra_dma_get_channel_id API to determine the id of a given channel. Bug 969125 Change-Id: Ibad67d65c87dc267a4e6942557c02acbd0f6e938 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/96714 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
2012-04-18ARM: tegra: cardhu:enable VDD2 when requiredLaxman Dewangan
The VDD2 supply the power to three rails: 1.5V, LDO1 and LDO2. LDO1 is used for PEX and LDO2 is used for SATA. By default making the VDD2 off and enabling when consumer requires. Change-Id: I283f62277246214966e7635bc31b6eb066f9282b Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96451 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-17tegra: fix typo in pre-power wifi codeMursalin Akon
fix typo in pre-power wifi code Bug 956238 Change-Id: Iee794da508d39131e3166bba71b1c46c60d19a3b Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/96821 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Martin <amartin@nvidia.com>
2012-04-17Revert "video: tegra: dc: load video mode during vblank"Jon Mayo
Change-Id: Ib1b0fc6015a9dd45982a97231972dadba6b5a92e Reviewed-on: http://git-master/r/96966 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-17usb: otg: tegra: set & read otg state with sysfsVenu Byravarasu
Add support for setting & reading back OTG state with sysfs bug 947300 Change-Id: I178c3eb6e2b227ca11fee8916e38c6677d3e4cb0 Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-on: http://git-master/r/96660 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-04-17ASoC: WM8903: fix the resume sequenceJoseph Lo
The bias control must be done after the default register value been restored. Bug 964400 Change-Id: Iefbd96506573d5ea0e1b3123bb34c38e34e75068 Signed-off-by: Joseph Lo <josephl@nvidia.com> Reviewed-on: http://git-master/r/96658 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-04-17ARM: tegra: add several other sysfs/debugfs paramsLiang Cheng
Bug 939292 Change-Id: Ib0c849418c6c426518948785082fcceb180f3d64 Reviewed-on: http://git-master/r/96250 Tested-by: Liang Cheng (SW) <licheng@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Antti Miettinen <amiettinen@nvidia.com> Reviewed-by: Mark Peters <mpeters@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-17ARM: tegra: clock: Apply shared bus ceiling alwaysAlex Frid
Apply shared bus ceiling regardless of whether Tegra3 SHARED_CEILING user is enabled or disabled. Thus, we no longer need to enable ceiling user - and the bus itself via child-parent relations - to cap the bus rate. Bug 954896 Change-Id: I7f96f03f05fd39334c9ee977cd1ac18d86a1fc0d Signed-off-by: Alex Frid <afrid@nvidia.com> (cherry picked from commit 07b1a707aa14dcab37f095a3bb78af79a54c399b) Reviewed-on: http://git-master/r/95739 Reviewed-by: Daniel Solomon <daniels@nvidia.com> Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-04-16cpufreq: interactive: change timer rateShridhar Rasal
Tune *timer_rate* used to increase cpu frequency. bug 943712 Change-Id: I3ded757e21825c475606976c2dcfcd75d9467ef8 Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-on: http://git-master/r/96525 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Satya Popuri <spopuri@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2012-04-16usb: ehci: tegra: use suspend_noirq()/resume_noirq()Preetham Chandru
usb driver needs to be suspended late and resumed early even before irqs are disabled/enabled. Without this change the following two issues are seen during lp0 and lp1 states. In lp0, when there is a usb wakeup event (by unplugging the usb device) we get the following error: "tegra-ehci tegra-ehci.2:fatal error" "tegra-ehci tegra-ehci.2: HC died; cleaning up" The above error comes because an irq is generated even before the usb_resume was called. A similar issue is seen in lp1 as well. Bug 954564 Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Change-Id: Id25fd2588ec034bd6aa54c17607e322f412adc5c Reviewed-on: http://git-master/r/95778 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16arm: tegra: Cardhu: E1198 DirectTouch setupAli Ekici
Modified touch setup and init calls to support DirectTouch in E1198 19x12 system. Change-Id: Ide208c4759af15200fb57530e7fbdc023d074c5c Signed-off-by: Ali Ekici <aekici@nvidia.com> Reviewed-on: http://git-master/r/91260 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16USB: cdc-acm: disconnect stuck issue and acm_tty_open crashVinayak Pane
acm_disconnect() should not kill the anchored URB because they are already killed by stop_data_traffic(). Submit read URBs before control urb is sent because there is a possibility of response coming immediately after ctrl is sent. Bug 957744 Bug 961808 (cherry picked from commit 05c10cbe01f0275e5fe121d763692261c51987fc) Reviewed-on: http://git-master/r/93673 Signed-off-by: Vinayak Pane <vpane@nvidia.com> Change-Id: I5597e239ec3722afb6b4c1cd5fbe228e30af2a2d Reviewed-on: http://git-master/r/96585 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16net: usb: raw-ip: check invalid referenceShawn Joo(Seongho)
before point reference check valid. it prevents null point reference panic. Bug 954883 Signed-off-by: Shawn Joo(Seongho) <sjoo@nvidia.com> Reviewed-on: http://git-master/r/88781 (cherry picked from commit aac87c7d9c7cf7563bb79a29d517a6ffdba5874f) Change-Id: Ica17acb6cc2a1a7ed03f41d8b569fdb6e2098fc9 Reviewed-on: http://git-master/r/96464 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16arm: tegra: xmm: add shutdown handler to off cpSeongho Joo
add shutdown handler to turn off CP when power off and disable irq for ap wake. Bug 942968 Signed-off-by: Seongho Joo <sjoo@nvidia.com> Reviewed-on: http://git-master/r/88188 (cherry picked from commit d37a1900afb9982115f18989b0114bad8f2602bd) Change-Id: I1541453e21b46149bba08eafb0eadf9a598aa182 Reviewed-on: http://git-master/r/96455 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-11-04 02:43:19 +0000