Age | Commit message (Collapse) | Author |
|
This reverts commit b8c142d2e7cfc27b98990d39305b52d2208cb36e.
The changes in ENGR00229290 will cause incorrect update on Eink.
Signed-off-by: Jack Lee <jack.lee@freescale.com>
|
|
Conflicts:
arch/arm/mach-mx6/pm.c
Signed-off-by: Jack Lee <jack.lee@freescale.com>
|
|
The new keymap:
FEATURE EVK DC2
KEY_RESET SW2
KEY_POWER SW1
KEY_SELECT SW6 SELECT
KEY_BACK SW7 BACKKEY
KEY_F1 SW8 F1
KEY_F2 F2
KEY_F3 SW9 F3
KEY_VOLUMEDOWN SW10 F4
KEY_VOLUMEUP SW11 F5
KEY_MENU MENU
KEY_PREVIOUS SW12 PREV
KEY_NEXT SW13 NEX1
KEY_HOME HOME
KEY_NEXT NEX2
KEY_UP UP
KEY_LEFT LEFT
KEY_RIGHT RIGHT
KEY_DOWN DOWN
Signed-off-by: LiGang <b41990@freescale.com>
|
|
1. Make pad WDOG_B pin as gpio_3_18, and 100k pull up
2. Add GPIO button
Signed-off-by: LiGang <b41990@freescale.com>
|
|
Kernel need to pass the panel type to android framework via node
fsl_disp_dev_property.
Signed-off-by: LiGang <b41990@freescale.com>
|
|
Kernel need to pass the panel type to android framework via node
fsl_disp_dev_property.
Signed-off-by: LiGang <b41990@freescale.com>
|
|
1.android.net.cts.VpnServiceTest#testTunDevice
add CONFIG_TUN in kernel configs
2. change the NEXT to VOLUMEDOWN VOLUMEUP for monkey test
Signed-off-by: b02247 <b02247@freescale.com>
|
|
This is needed sanity check, because on Ubuntu it's likely that low memory
will happen. This patch also makes this memory allocated from dma zone.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
The settings in the PXP_PS_BUF, PXP_OUT_PS_ULC, and PXP_OUT_PS_LRC will
determine the subset of the PS buffer, or clipped PS source buffer, that
will be used in the output buffer.
HW_PXP_OUT_PS_LRC should set the scaled output size rather than the origin
size when scaling.
Please refer to the "Clipping source images" section in RM for how it works.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
A small logic bug prevents the init sequence from properly turning
off the clocks. This leads to the clocks being always on
if the first update does not complete due to the screen being blanked.
Signed-off-by: Michael Minnick <michael.minnick@freescale.com>
|
|
Add fsl_disp_dev_property node for android framework
Signed-off-by: LiGang <b41990@freescale.com>
|
|
1. Make integrate HDMI patch work
2. Re-organize the mx6_evk_init function in board-mx6sl_evk.c
3. Single kernel image could support multiple displays by uboot parameter
for eink panel, set HAVE_FSL_EPDC_FB true in BoardConfig.mk
for hdmi/lcd , set HAVE_FSL_EPDC_FB false in BoardConfig.mk
eink bootargs: use kernel default bootargs
hdmi bootargs:
console=ttymxc0,115200 init=/init androidboot.console=ttymxc0 panel=hdmi
seiko_lcd bootargs:
console=ttymxc0,115200 init=/init androidboot.console=ttymxc0 panle=lcd
Signed-off-by: LiGang <b41990@freescale.com>
|
|
Write to the MMDC registers when resetting the MMDC after the
DDR I/Os have been floated.
This fixes the bug introduced by the commit:
"2a2f65bd07ad0f947794c2e5f2f825121805d663
MX6SL-Reset MMDC read FIFO in low power IDLE"
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
The REG_BYPASS_COUNTER(RBC) holds off interrupts when the PGC
block is sending signals to power gate the core. This is apart
from the RBC counter's basic functionality to act as counter to
power down the analog portions of the chip.
But the counter needs to be set/cleared only when no interrupts
are pending. And also for correct hold off the interrupts, enable the
counter as close to WFI as possible.
The RBC counts CKIL cycles (32KHz)
So follow the following steps to set the counter
in suspend/resume in mx6_suspend.S:
1. Mask all the GPC interrupts.
2. Write the counter value to the RBC
3. Enable the RBC
4. Unmask all the interrupts.
5. Busy wait for a few usecs to wait for RBC to start counting
in case an interrupt is pending.
4. Execute WFI
Reset the counter after resume in pm.c:
1. Mask all the GPC interrupts.
2. Disable the counter.
3. Set the RBC counter to 0.
4. Wait for 80usec for the write to get accepted.
5. Unmask all the interrupts.
With the above steps, we can minimize the PDNSCR and PUPSCR counters
in the GPC. The basic condition for the RBC counter:
RBC count >= 25 * IPG_CLK + PDNSCR_SW2ISO.
PDNSCR_SW2ISO = PDNSCR_ISO = 1 (counts in IPG_CLK)
PUPSCR_SW2ISO = PUPSCR_ISO = 2 (counts in 32K)
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
Only enable power gating for PXP and EPDC. The feature for ELCDIF still need to
be verified.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
Add dependency on CONFIG_FB_MXC_ELCDIF_FB, to avoid build error if as module.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
This is needed when build sii902x hdmi driver as module
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
Fix all build warnings in files:
arch/arm/mach-mx6/board-mx6sl_common.h
arch/arm/mach-mx6/board-mx6sl_evk.c
arch/arm/mach-mx6/clock_mx6sl.c
arch/arm/mach-mx6/cpu_regulator-mx6.c
arch/arm/mach-mx6/pm.c
arch/arm/mach-mx6/system.c
arch/arm/plat-mxc/dvfs_core.c
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
|
|
This can be detected by enabling CONFIG_LOCKDEP and CONFIG_PROVE_LOCKING
The dump log:
=============================================
[ INFO: possible recursive locking detected ]
3.0.35-02140-gb4181ce-dirty #959
---------------------------------------------
swapper/1 is trying to acquire lock:
((fb_notifier_list).rwsem){.+.+.+}, at: [<80088758>] __blocking_notifier_call_chain+0x44/0x88
but task is already holding lock:
((fb_notifier_list).rwsem){.+.+.+}, at: [<80088758>] __blocking_notifier_call_chain+0x44/0x88
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
----
lock((fb_notifier_list).rwsem);
lock((fb_notifier_list).rwsem);
*** DEADLOCK ***
May be due to missing lock nesting notation
5 locks held by swapper/1:
#0: (&__lockdep_no_validate__){+.+.+.}, at: [<8027f244>] __driver_attach+0x48/0x98
#1: (&__lockdep_no_validate__){+.+.+.}, at: [<8027f254>] __driver_attach+0x58/0x98
#2: (registration_lock){+.+.+.}, at: [<8023a17c>] register_framebuffer+0x18/0x24c
#3: (&fb_info->lock){+.+.+.}, at: [<80238dc8>] lock_fb_info+0x18/0x3c
#4: ((fb_notifier_list).rwsem){.+.+.+}, at: [<80088758>] __blocking_notifier_call_chain+0x44/0x88
stack backtrace:
[<800405c4>] (unwind_backtrace+0x0/0xf8) from [<80097c78>] (__lock_acquire+0x1644/0x1c18)
[<80097c78>] (__lock_acquire+0x1644/0x1c18) from [<80098748>] (lock_acquire+0x84/0x98)
[<80098748>] (lock_acquire+0x84/0x98) from [<804d0aa8>] (down_read+0x34/0x44)
[<804d0aa8>] (down_read+0x34/0x44) from [<80088758>] (__blocking_notifier_call_chain+0x44/0x88)
[<80088758>] (__blocking_notifier_call_chain+0x44/0x88) from [<800887b4>] (blocking_notifier_call_chain+0x18/0x20)
[<800887b4>] (blocking_notifier_call_chain+0x18/0x20) from [<802397e0>] (fb_set_var+0x264/0x290)
[<802397e0>] (fb_set_var+0x264/0x290) from [<8024a320>] (lcd_init_fb+0x54/0x70)
[<8024a320>] (lcd_init_fb+0x54/0x70) from [<8024a3f0>] (lcd_fb_event+0x44/0xb4)
[<8024a3f0>] (lcd_fb_event+0x44/0xb4) from [<80088514>] (notifier_call_chain.isra.1+0x74/0xd0)
[<80088514>] (notifier_call_chain.isra.1+0x74/0xd0) from [<80088774>] (__blocking_notifier_call_chain+0x60/0x88)
[<80088774>] (__blocking_notifier_call_chain+0x60/0x88) from [<800887b4>] (blocking_notifier_call_chain+0x18/0x20)
[<800887b4>] (blocking_notifier_call_chain+0x18/0x20) from [<8023a2d4>] (register_framebuffer+0x170/0x24c)
[<8023a2d4>] (register_framebuffer+0x170/0x24c) from [<8024fe8c>] (mxc_elcdif_fb_probe+0x464/0x564)
[<8024fe8c>] (mxc_elcdif_fb_probe+0x464/0x564) from [<8028031c>] (platform_drv_probe+0x18/0x1c)
[<8028031c>] (platform_drv_probe+0x18/0x1c) from [<8027f0f0>] (driver_probe_device+0x90/0x19c)
[<8027f0f0>] (driver_probe_device+0x90/0x19c) from [<8027f290>] (__driver_attach+0x94/0x98)
[<8027f290>] (__driver_attach+0x94/0x98) from [<8027e2e4>] (bus_for_each_dev+0x5c/0x88)
[<8027e2e4>] (bus_for_each_dev+0x5c/0x88) from [<8027eabc>] (bus_add_driver+0x188/0x250)
[<8027eabc>] (bus_add_driver+0x188/0x250) from [<8027f750>] (driver_register+0x78/0x13c)
[<8027f750>] (driver_register+0x78/0x13c) from [<8001c838>] (mxc_elcdif_fb_init+0x38/0x48)
[<8001c838>] (mxc_elcdif_fb_init+0x38/0x48) from [<80035334>] (do_one_initcall+0x34/0x178)
[<80035334>] (do_one_initcall+0x34/0x178) from [<80008968>] (kernel_init+0x84/0x124)
[<80008968>] (kernel_init+0x84/0x124) from [<8003b614>] (kernel_thread_exit+0x0/0x8)
In fact, we don't need support dynamically switch the framebuffer.
so, we only need do once registeration in probe function.
Signed-off-by: Robby Cai <R63905@freescale.com>
Acked-by: Lily Zhang
|
|
The EPDC set the UPD_VOID (i.e. cancelled) bit in two cases:
1. No pixels needed updating
2. All pixels collided (COL bit also set)
The driver was miss-handling case 2. This fix causes case 2
to be treated as a collision and the update to be resubmitted.
Signed-off-by: Michael Minnick <michael.minnick@freescale.com>
|
|
MMDC can clock in bad data due to the glitches caused by
changing the setting of various DDR IO pads in low power
IDLE to save power. Solution is to reset the MMDC read FIFO
before the DDR exits self-refresh.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
In the maxim 17135 driver, the power good is confirmed by the
power good GPIO polarity change when comparing the status at
the beginning of driver probe and display regulator enabled.
However, it is not reliable since the initial value of the GPIO
is not constant. Normally, it is 1 but it can be 0 after system reset
unexpectedly. Now, it is changed to POK bit checking in FAULT register.
Signed-off-by: Jack Lee <jack.lee@freescale.com>
|
|
In the maxim 17135 driver, the power good is confirmed by the
power good GPIO polarity change when comparing the status at
the beginning of driver probe and display regulator enabled.
However, it is not reliable since the initial value of the GPIO
is not constant. Normally, it is 1 but it can be 0 after system reset
unexpectedly. Now, it is changed to POK bit checking in FAULT register.
Signed-off-by: Jack Lee <jack.lee@freescale.com>
|
|
imx_3.0.35_android_r13.5-beta
Conflicts:
arch/arm/include/asm/hardware/coresight.h
arch/arm/kernel/etm.c
arch/arm/mach-mx6/board-mx6q_sabresd.c
arch/arm/mach-mx6/mx6_suspend.S
arch/arm/mach-mx6/pm.c
arch/arm/plat-mxc/cpufreq.c
drivers/video/mxc/mxc_ipuv3_fb.c
Signed-off-by: Jack Lee <jack.lee@freescale.com>
|
|
If "debug_uart" is specified in the command line, uart will
be sourced from 24MHz XTAL. This is required for getting the
correct power measurements on MX6SL.
Certain analog power optimizations are done only if ALL PLLs
are bypassed on MX6SL. To verify this path, we need to ensure
that UART is not sourced from PLL3.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
If "debug_uart" is specified in the command line, uart will
be sourced from 24MHz XTAL. This is required for getting the
correct power measurements on MX6SL.
Certain analog power optimizations are done only if ALL PLLs
are bypassed on MX6SL. To verify this path, we need to ensure
that UART is not sourced from PLL3.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
add V4L2_CAP_VIDEO_CAPTURE & V4L2_CAP_STREAMING capability for QUERYCAP ioctl.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
Update the VDDARM and VDDSOC voltages based on IMX6SLCEC_Rev0
datasheet.
As the voltages for ARM @ 198MHz and ARM @ 396MHz are the same
remove the 198MHz working point.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
1. Fix AHB clock not changed to 3MHz in IDLE mode
2. Fix system hangs in IDLE mode due to changes made for LOCKDEP
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
|
|
When a 5-bit waveform is loaded, the maximum number of available
LUTs is 16. The LUT allocator must account for this.
Note that 5-bit waveform loading is currently not supported in the
driver. However, this fix makes sure the LUT allocator is correct
when 5-bit support is added.
Signed-off-by: Michael Minnick <michael.minnick@freescale.com>
|
|
1. Fix mutex_lock nested issue in idle mode
2. Fix mutex_lock nested issue in suspend mode
3. Fix spin_lock nested issue in busfreq
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
|
|
Enable CONFIG_VIDEO_MXC_PXP_V4L2 option.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
It used the hard-coded '0' for historical reason.
This patch changes it to -1 to make video device minor to
be automatically assigned.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
Disable csi clock when inactive, otherwise this prevents system from
entering low power mode.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
There is a bug udc driver handle invalid USB_FEATURE requests in current bsp.
The invalid USB_FEATURE request will be handled as a valid USB_FEATURE request.
We should set protocol stall on ep0 to handle invalid USB_FEATURE requests.
Signed-off-by: make shi <b15407@freescale.com>
|
|
It will cause below problem if spin_lock debug is on:
BUG: spinlock lockup on CPU#0, swapper/1, 9a0292a0
The reason is the lock is used before initialization.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
|
|
The current driver only allows SD cards to run at 1.8V.
This patch allows MMC and SDIO cards to be switched to 1.8V signalling
Acked-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
When CONFIG_LOCKDEP is enabled, it will cause warings:
------------[ cut here ]------------
WARNING: at kernel/lockdep.c:2885 sysfs_add_file_mode+0x54/0xc0()
Modules linked in:
[<80046364>] (unwind_backtrace+0x0/0xfc) from [<800758c0>]
(warn_slowpath_common+0x4c/0x64)
[<800758c0>] (warn_slowpath_common+0x4c/0x64) from [<800758f4>]
(warn_slowpath_null+0x1c/0x24)
[<800758f4>] (warn_slowpath_null+0x1c/0x24) from [<801536c4>]
(sysfs_add_file_mode+0x54/0xc0)
[<801536c4>] (sysfs_add_file_mode+0x54/0xc0) from [<8015616c>]
(internal_create_group+0xdc/0x1d8)
[<8015616c>] (internal_create_group+0xdc/0x1d8) from [<80524110>]
(fsl_otp_probe+0x168/0x1d4)
[<80524110>] (fsl_otp_probe+0x168/0x1d4) from [<802b42e8>]
(platform_drv_probe+0x18/0x1c)
[<802b42e8>] (platform_drv_probe+0x18/0x1c) from [<802b2fe4>]
(driver_probe_device+0x98/0x1a4)
[<802b2fe4>] (driver_probe_device+0x98/0x1a4) from [<802b3184>]
(__driver_attach+0x94/0x98)
[<802b3184>] (__driver_attach+0x94/0x98) from [<802b280c>]
(bus_for_each_dev+0x60/0x8c)
[<802b280c>] (bus_for_each_dev+0x60/0x8c) from [<802b2180>]
(bus_add_driver+0x190/0x268)
[<802b2180>] (bus_add_driver+0x190/0x268) from [<802b3788>]
(driver_register+0x78/0x13c)
[<802b3788>] (driver_register+0x78/0x13c) from [<800394ac>]
(do_one_initcall+0x30/0x170)
[<800394ac>] (do_one_initcall+0x30/0x170) from [<800083cc>]
(kernel_init+0x98/0x144)
[<800083cc>] (kernel_init+0x98/0x144) from [<8004003c>]
(kernel_thread_exit+0x0/0x8)
---[ end trace 877415a10b5d9cb1 ]---
also, on imx6sl, it will cause below issue:
BUG: key bffea2e4 not in .data!
BUG: key bffea300 not in .data!
BUG: key bffea31c not in .data!
BUG: key bffea338 not in .data!
BUG: key bffea354 not in .data!
BUG: key bffea370 not in .data!
BUG: key bffea38c not in .data!
BUG: key bffea3a8 not in .data!
BUG: key bffea3c4 not in .data!
BUG: key bffea3e0 not in .data!
BUG: key bffea3fc not in .data!
BUG: key bffea418 not in .data!
BUG: key bffea434 not in .data!
BUG: key bffea450 not in .data!
BUG: key bffea46c not in .data!
BUG: key bffea488 not in .data!
BUG: key bffea4a4 not in .data!
BUG: key bffea4c0 not in .data!
BUG: key bffea4dc not in .data!
We need to call sysfs_attr_init to initlize sysfs attr.
Signed-off-by: Terry Lv <r65388@freescale.com>
|
|
To reproduce:
1. let system enter suspend mode
2. touch the screen
3. after the system resumes, touch screen does not respond again.
The cause:
The touch screen interrupt is triggered by falling edge. During suspend stage,
once the screen has ever been touched, then the interrupt line will be always
pulled low. Since elan ts chip is always powered on and the interrupt gets no
chance to be handled during suspend stage, the interrupt line can not recover
to high to detect a new one.
Workaround:
Read out the pending data to make the touch screen come back alive.
Signed-off-by: LiGang <b41990@freescale.com>
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
- change the delay from 10 * HZ to 1 * HZ, though (1 * HZ) might not be the
best, just as a base.
1. Since the request has been moved out of interrupt context, there will be no
more calling enable_clk in interrupt context. So it's not necessary to keep
such a long delay on disabling clock in order to save power.
2. Still keeping the 1*HZ of delay is to avoid frequently enabling/disabling
clock.
eMMC card performance test result with bonnie++:
(512M RAM, 1GB data, 1K buffer)
------------------------------------------------------------------------------
| | 1*HZ | 10 * HZ |
------------------------------------------------------------------------------
| Read | ~24.1MB/s | ~23.9MB/s |
------------------------------------------------------------------------------
| Write | ~10.5MB/s | ~10.5MB/s |
------------------------------------------------------------------------------
WiFi card performance test result with iperf is quite same: ~21Mbps
(AR6003@2.4G, TCP, TCP window size option 1MB both for server and client)
Acked-by: Robby CAI <r63905@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
When suspend, the lcdif and panel will be stopped. When resume, fb_set_par()
will be called, in which the lcdif and the panel will be re-initialized.
However, fb_set_par() also checks the parameters via mxc_elcdif_fb_par_equal(),
which will probably make fb_set_par() just return with them un-initialized.
And thus, the interrupt will not come. This patch added a varible to check
whether they're running along with mxc_elcdif_fb_par_equal() checking to
fix the issue. If not running, re-initialization will be forcely done.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
Add csi v4l2 platform device only when 'csi' is assigned in cmdline.
Because there's pin conflicts between csi and epdc.
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
Because csi_v4l2 driver will only be loaded when needed(by assign 'csi' in
kernel cmdline), we use standard driver framework to easily bind the device and
driver. Otherwise, we will meet the problem like the crash as below when do
suspend/resume due to the resource of csi not assigned at all if 'csi' not
passed in cmdline.
root@freescale ~$ echo mem > /sys/power/state
PM: Syncing filesystems ... done.
Freezing user space processes ... (elapsed 0.01 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = 9a8ac000
[00000000] *pgd=9a783831, *pte=00000000, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT
Modules linked in:
CPU: 0 Not tainted (3.0.35-02115-g08f4436 #233)
PC is at csi_enable_mclk+0x40/0x68
LR is at camera_power+0x1c/0x5c
pc : [<80357f08>] lr : [<80358154>] psr: 60000013
sp : 9a8ebe30 ip : 00000009 fp : 00000006
r10: 1c6bddf7 r9 : 00000000 r8 : 00000000
r7 : 00000002 r6 : 804fd0ac r5 : 9a013000 r4 : 00000000
r3 : 80aa8bbc r2 : 00000000 r1 : 00000000 r0 : 00000008
...
Signed-off-by: Robby Cai <R63905@freescale.com>
|
|
issue:
Once entering low power idle mode, pll2_400 will be bypass which will change
the clk rate of sdhc root clk. so far, there's no mechanism to inform sdhc
for changing of root clk in current driver structure.
fix:
Revert "ENGR00226096 mx6sl: remove high set point for usdhc"
This reverts commit 97aee96a34ca63da0d1d602a19b3a444352e5803.
Acked-by: Robby CAI <r63905@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
issue:
Since there's no sync mechanism between sdio bus suspending and sdio_irq_thread,
it will cause that sdio_irq_thread still makes sdhc request even after sdio bus
suspends.
fix:
On suspending sdio bus, claim host, so that:
1. mmc_sdio_suspend will wait for finishing of sdio_irq_thread.
2. sdio_irq_thread will be blocked even being scheduled.
And release host on resuming.
Acked-by: Aisheng DONG <b29396@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
Setup uart2 to enable bluetooth basic functionality on mx6sl evk board.
DMA mode was not enabled for uart2 operation.
Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
|
|
For DQ and DL, we must make sure DDR can be accessed after resume,
our code did NOT get a valid base address for MMDC to exit from
DVFS mode, need to fix it.
According to ARM, we only need to save r0-r3 and r12 before calling
C function.
Signed-off-by: Anson Huang <b20788@freescale.com>
|
|
Different linker may use r12, we should save/restore all
registers(r0-r12) before calling C function to prevent
these registers from corruption in C code.
Signed-off-by: Anson Huang <b20788@freescale.com>
|
|
Currently, the sequence and functionality we use to enter and exit
suspend causes us to hang upon resuming. It appears that this is being
caused by two things. The first is the powering off of the 2p5 rail
which powers the IO pullups and pulldowns. The DQS pins were
configured as pull downs. The second is switching the DQS pins from
differential to CMOS mode (and back). This second problem only
occurs on a few EVK boards.
It is believed that these changes are causing glitches on the mmdc DQS
pins which is putting garbage in the FIFO (or causing some other FIFO
problem). This patch adds two mmdc0 FIFO resets after exiting the
suspend. Two are thought to be needed per previous FIFO reset
experience by Mike Kjar.
Since the MMDC0 FIFO will be cleaned each time, we can now remove
the code that configured the DQS lines as pull downs as we no
longer care if they float.
Signed-off-by: Robert Lee <robert.lee@freescale.com>
|
|
According to the latest specification data, these rails should
go no lower than 900mV in standby mode. This patch modifies
the existing mx6sl board files and sets the pmic standby voltage
for these rails to be 925mV (extra 25mV to account for pmic accuracy).
Signed-off-by: Robert Lee <robert.lee@freescale.com>
|