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2011-04-27ENGR00142581-2 MX50 RD3: Add PINMUX setting callback in wvga driverRobby Cai
Added get_pins/put_pins/enable_pins/disable_pins callbacks in driver, which is passed as platform data. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-27ENGR00142581-1 MX50 RD3: Make SEIKO WVGA panel work on J12Robby Cai
J12 shares the PIN with EPD. This patch add platform-specific configuration for SEIKO WVGA To make SEIKO WVGA panel work on J12, need add "lcd=1,j12" in kernel cmdline. If make it work on J13, just need "lcd=1" Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-23ENGR00142410 MX50 PXP: Fix PxP operation may time out or hang upRobby Cai
There might be a chance that clk_disable() is called when PxP task is in process. Add this check before actually disable PxP clock to fix this issue. Signed-off-by: Ko Daiyu <R18641@freescale.com> Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-22ENGR00142459 - EPDC fb: TCE underrun workaroundDanny Nold
- Add new LUT selection method to always prefer a higher order LUT than those currently active. - Handle TCE underrun interrupts. Continue with normal operation and prevent them from bringing down the EPDC driver. - Add option to prevent TCE underruns - tce_prevent - Add method to synchronize submission of updates when potentially vulnerable to TCE underrun. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-21ENGR00142411-2 [MX50]Fix minor bug of regulatorAnson Huang
fix regulator minor bug. Signed-off-by: Anson Huang <b20788@freescale.com>
2011-04-21ENGR00142411-1 [MX50]RD3 change switch modeAnson Huang
change switch mode to APS and PFM according to PMIC team suggestion. Signed-off-by: Anson Huang <b20788@freescale.com>
2011-04-20ENGR00142097 MX50 RD3: Fix: Enable HDMI will cause reboot failureRobby Cai
On PoR(Power-On-Reset), the issue does not exist; only on WDog Reset (for example, issue "reboot" command in Linux) this issue happens, and kernel stops at HDMI reset. Note that PoR will reset IOMUX setting, but WDog Reset will not reset IOMUX. However, WDog Reset will reset GPIO setting(as INPUT). With this fact in mind, we can explain the reason much more easily. It seems that SI2312BDS supposes EIM_RW to be always high to work well. On WDog reset, the EIM_RW is set as GPIO INPUT which causes 1V2_HDMI to output 0.0V. Even HDMI driver sets EIM_RW as GPIO OUTPUT High which causes 1V2_HDMI to output 1.2V, HDMI reset does not work well. This reality shows that a LOW-HIGH timing causes SI2312BDS not work well. Instead a HIGH-LOW-HIGH timing appears to be needed to get a stable output. Actually, on PoR, the EIM_RW (GPIO to control HDMI power) is set as default MUX_MODE 0, which causes 1V2_HDMI outputs 1.2V. In this case, the timing meets HIGH-LOW-HIGH, HDMI reset works well. So similarly, we need pull EIM_RW high to 1V2_HDMI output high firstly in driver to achieve HIGH-LOW-HIGH timing. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-20ENGR00142351 mxc_gpu: autogating: add pending flagRichard Zhao
pending indicate the timer has been fired but clock not yet disabled. This patch fixs the bug that sometimes in irq handle it tries to enable clock and cause BUG. Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
2011-04-20ENGR00141400 GPU: Improve GPU clock gatingZhou, Jie
seperate interrupt handling and clk_enable for Z160 and Z430 Signed-off-by: Zhou, Jie <b30303@freescale.com> Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
2011-04-18ENGR00142264 MX50 RD3: Make battery driver built as moduleRobby Cai
build battery driver as module Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-18ENGR00142258 isolate EIM signals and boot configuration signalsRobby Cai
Fix the previous setting for GP6_11. set UART2_RXD (GP6_11) to high level, not low. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-16ENGR00142018 MX50: Add PD+3 routine for all DDR typesRobby Cai
PD+3 help test pass for DDR with higher freq. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-15ENGR00142167 [MX50]MC34708 battery driverAnson Huang
Current charging point number should be 1, unless Sometimes system will hang if ADC reading battery voltage > 4.2V. Signed-off-by: Anson Huang <b20788@freescale.com>
2011-04-14ENGR00142123-2 MX50: Add CLAA WVGA driver support on RD3Robby Cai
- Modified command line setup() to add "lcd=2" to choose CLAA WVGA - Added function to enable/disable pins, (Same PIN Setting as HDMI) Here's a matrix to show co-working capability for EPDC, HDMI, SEIKO/CLAA WVGA - EPDC, CLAA WVGA on J12 on RD3 - SEIKO WVGA on J13 on RD3 ------------------------------------------------------------------ | EPDC | HDMI | SEIKO WVGA | CLAA WVGA ------------------------------------------------------------------ EPDC | - | | | ------------------------------------------------------------------ HDMI | N (*) | - | | ------------------------------------------------------------------ SEIKO WVGA | Y | N (**) | - | ------------------------------------------------------------------ CLAA WVGA | N (*) | N (**) | Y (***) | - ------------------------------------------------------------------ LEGEND: (*) Shares the same pins. (**) Shares LCDIF, but not same timing. (***) Shares LCDIF, and could share same timing for them fortunately. (NOTE: only tested with these two panels, need "lcd=2" in kernel cmdline). Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-14ENGR00142123-1 MX50: Add PINMUX callback for CLAA WVGA driver on RD3Robby Cai
Added get_pins/put_pins/enable_pins/disable_pins callbacks in driver, which is passed as platform data. NOTE: The CLAA WVGA panel works only on same port as EPDC on RD3. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-12ENGR00141918 - EPDC fb: Correct waveform mode when mergingDanny Nold
- Refined update merging approach to aggressively merge while selecting the waveform mode conservatively - Reverted IST code which attempted to detect and resolve the missed collision artifact. This code actually creates artifacts by sometimes resubmitting updates and causing out-of-order update completion artifacts. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-12ENGR00142006: MX50- Fix audio noise issue.Ranjani Vaidyanathan
Clicking sound can be heard whenever the system transitions between LPAPM mode and normal mode. Sometimes channel swapping also occurs. The issue can be reproduced only when tested with a mono-tone audio clip. The issue was caused by stalling of the bus masters when the DDR frequency was being changed. Fix is to allow SDMA to access IRAM via QoS (ports 0 and 1) during the DDR frequency transition. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2011-04-07ENGR00140983-4 - SII902X fb: Support HDMI driven through LCDIF moduleDanny Nold
- Defined new API to allow client display FB drivers to pass videomode information to the LCDIF. - SII902X added calls to enable/disable pins through platform-level function pointers. - Changed SII902X driver to ensure that HDMI detect routine gets called once FB is registered, if a hotplug interrupt has previously been detected. - Added call to display boot logo once FB is registered. - Modified LCDIF to incorporate videomodes passed in from client display FB drivers. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00140983-3 - MSL: Support SII902X HDMI on MX50 RD3Danny Nold
- Define SII902X structure and default video mode - Add functions to enable/disable HDMI pins - Define HDMI as default LCDIF device - Add command line setup() to select between LCD and HDMI as primary output for LCDIF Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00140983-2 - FSL Devices: Add LCD device functions to enable/disable pinsDanny Nold
- Added function declarations to acquire/release/enable/disable device pins. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00140983-1 - MX50 IOMUX: Add defines to use LCDIF through EPDC padsDanny Nold
- Defined IOMUX settings to allow use of EPDC pins for ELCDIF functionality. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00141485 - EPDC fb: Change default update scheme to Queue & MergeDanny Nold
- Change from Snapshot scheme to Queue & Merge scheme for improved performance. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00140737-2 - ARM: imx50: Fix APLL relocking and remove APLL auto-disableDanny Nold
- Removed setting of pfd_disable_mask bits in pfd enable/disable functions. This feature, which automates the disabling of the APLL, was being used incorrectly and is less clear than manually enabling/disabling PFD and APLL clocks directly. - Added wait for APLL relocking after APLL is enabled. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00140737-1 - ARM: plat-mxc: Disable child clocks before parent clocksDanny Nold
- Reversed ordering in which clocks are disabled. Child clocks should be disabled before parent (root) clocks. Signed-off-by: Danny Nold <dannynold@freescale.com>
2011-04-07ENGR00141735 MX50 RD3: use platform_device_id to differentiate two pmicsRobby Cai
we re-use rtc-mc13892.c, so use platform_device_id to make it clear. Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-06ENGR00141672 MX50 RD3: Add board-specific configuration for M25P32Robby Cai
Add platform data (partition info, etc.) for SPI NOR(M25P32) driver Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-06ENGR00141508-2 MX50 RD3: Add board-specific file for PMIC RipleyRobby Cai
register PMIC spi device and platform data. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com> Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-06ENGR00141508-1 MX50 RD3: Add PMIC Ripley driverRobby Cai
Support Regulator, ADC, TouchScreen, Battery, RTC. PMIC issues are tracked on http://wiki.freescale.net/display/MADPlatMX508/RD3+board+Issues+Tracking Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com> Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-02ENGR00141567 Fix build break for other platformsRobby Cai
Resolved conflict with MC34704 on MX25 Switched off MC13783 config for MX3 Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-02ENGR00140872 MX50: Add RD3 supportRobby Cai
One image for RD1(RDP) and RD3 by adding board_is_rd3 to distinguish them. The patch covers board changes as follows: - FEC_EN pin changed. - POWER_EN and DISP_VSYNC pin switched. - set UART1_RTS__GPIO_6_9 to enable SD2 VDD - DCDC_EN changed Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-02ENGR00141425-2 MX50 RDP: Adjust MC13892 driver on new frameworkRobby Cai
Changed the .modalias to "mc13892", so that the PMIC SPI driver can use the modalias to distinguish the "mc13892" and the new PMIC "mc34708". Signed-off-by: Robby Cai <R63905@freescale.com>
2011-04-02ENGR00141425-1 MX50: Restruct PMIC framework to accept new PMIC RipleyRobby Cai
- make MC13892 and MC34708 can co-exist, only one attached at run-time. - make the change as least as possible. - expect no functional impact (only SPI interface verified). Signed-off-by: Robby Cai <R63905@freescale.com>
2011-03-31ENGR00141363 ARM imx53 clock: change di0 clock default parent to pll3Jason Chen
If enable both LVDS and one display device use external di clock, there will be conflict between their clock parent -- both use pll4 on mx53. So it need change di0 clock parent to pll3, and then uart parent need change to pll2 to avoid console mess. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-31ENGR00141393 usb: revert one tiny changePeter Chen
The variables for low power should be updated after phcd updated Signed-off-by: Peter Chen <peter.chen@freescale.com>
2011-03-30ENGR00141312 tve: add uevent for tve cable detectionJason Chen
When cable mode changed, below uevent will be sent out: EVENT=NONE EVENT=CVBS0 EVENT=YPBPR EVENT=SVIDEO under /sys/devices/platform/tve.0 Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-30ENGR00141343 Mx53: reduce vdd_reg power on suspendZhou Jingyu
CLear DSE[2] bit to 0 for DDR pads before WFI to reduce ddr pre-driver power Restore the settings after WFI to enable DDR access This patch reduce VDD_REG current from 5mA to about 0.5mA Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2011-03-29ENGR00141310 mx5x clock: add emi_fast_clk as tz1's parent for uart dmaXinyu Chen
UART dma mode doing data transfer between uart fifo and ddr. So emi_fast_clk must be enabled when dma on. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2011-03-29ENGR00141306 MX53 SMD: add Seiko WVGA LCD panel supportLily Zhang
This patch adds Seiko WVGA LCD panel support in MX53 SMD board. The video mode setting is: video=mxcdi0fb:RGB24,SEIKO-WVGA di0_primary Signed-off-by: Lily Zhang <r58066@freescale.com>
2011-03-29ENGR00141299: NAND/MXC: Fix the build warningJason Liu
Fix the the following build warning, drivers/mtd/nand/mxc_nd2.h:498:7: warning: "CONFIG_ARCH_MXC_HAS_NFC_V2" Signed-off-by: Jason Liu <r64343@freescale.com>
2011-03-28ENGR00141184: MX53 SMD: spi nor: the expected SPI-NOR partitions are not createdTerry Lv
For in mxc platforms, we use arm/mach/flash.h for flash_platform_data definition, but our driver m25p80 uses linux/spi/flash.h. These two flash_platform_data structures are different. This may cause an issue in creating partitions. Now in mx53 smd, we choose flash_platform_data in linux/spi/flash.h. This can uniform the flash_platform_data structure. Signed-off-by: Terry Lv <r65388@freescale.com>
2011-03-28ENGR00141152-6 tve: make default display optionJason Chen
tve driver change. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-28ENGR00141152-5 sii902x: make default display optionJason Chen
sii902x driver change. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-28ENGR00141152-4 mxc edid: make default display optionJason Chen
mxc edid driver change. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-28ENGR00141152-3 ldb: make default display optionJason Chen
ldb driver change. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-28ENGR00141152-2 imx5X MSL: make default display optionJason Chen
Change MSL files. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-28ENGR00141152-1 header file: make default display optionJason Chen
After this patch, default display for below platforms: mx51 bbg: DVI-XGA on DI0 mx53 ard: LVDS-XGA on DI0 mx53 evk: CLAA-WVGA on DI0 mx53 loco: VGA-XGA on DI1 mx53 smd: LVDS-XGA on DI1 The default options will work if you do not enter other video cmdline options. For platform need enable other drivers, it will enable it automatically. For example, under default option, mx53 loco will enable tve-vga driver automatically; before this patch, it need add 'vga' to cmdline to enable it. And 'di1_primary' option also will be enabled automatically if need. If you want to overwrite the default option, please refer to below: enable vga: 'vga' disable vga: 'vga=off' enable tve: 'tve' disable tve: 'tve=off' enable ddc: 'ddc' disable ddc: 'ddc=off' enable hdmi: 'hdmi' disable hdmi: 'hdmi=off' choose di0 as primary: 'di0_primary' choose di1 as primary: 'di1_primary' Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-28ENGR00141161 ipuv3: add bgr24 fmt support for diJason Chen
add bgr24 fmt support for di Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-25ENGR00141155-2 sii902x: add related regulatorJason Chen
Add related regulator. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-25ENGR00141155-1 ARM mx53_smd: add related regulator for hdmiJason Chen
add related regulator for hdmi. Signed-off-by: Jason Chen <b02280@freescale.com>
2011-03-24ENGR00141109: MX53-SMD: SPI-NOR: Add mxc_m25p80 to imx5_defconfigTerry Lv
mxc_m25p80 config is not added to imx5_defconfig. Thus in this patch it is added. Signed-off-by: Terry Lv <r65388@freescale.com>
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