Age | Commit message (Collapse) | Author |
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Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.
Hope people are OK with tiny include file.
Note, that mm_types.h is still dragged in, but it is a separate story.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This reverts commit 6257fa54c1c66de2c9f72172895ea7e0e3c0845c.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This reverts commit ab11e98c15ecb29eaf93114cb928478c98d637e9.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This reverts commit a1a43335ccbf5578eb48edbf16c11e53d76c0123.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The patch converts gpmi nand driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Huang Shijie <b32955@freescale.com>
Cc: Artem Bityutskiy <artem.bityutskiy@intel.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
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1. During suspend, LVDS didn't enter low power status.
It needs to disable channel mode and mux control.
It can save ~8mA@3.2V.
2. Clean up the LDB route function for better readability.
3. Fix lvds clk_enable/disable bug,
clk_enable/disable should base on setting_idx variable.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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In MX28, if we do not reset the BCH module. The BCH module may
becomes unstable when the board reboots for several thousands times.
This bug has been catched in customer's production.
The patch adds some comments(some from Wolfram Sang), and fixes it now.
Also change gpmi_reset_block() to static.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
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This patch fixes usage of dma direction to adopt dma_transfer_direction.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Fixes:
drivers/mtd/nand/gpmi-nand/gpmi-nand.c: In function 'gpmi_nfc_init':
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1475:16: error: 'THIS_MODULE' undeclared (first use in this function)
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1475:16: note: each undeclared identifier is reported only once for each function it appears in
drivers/mtd/nand/gpmi-nand/gpmi-nand.c: At top level:
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:15: error: expected declaration specifiers or '...' before string constant
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:1: warning: data definition has no type or storage class
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:1: warning: type defaults to 'int' in declaration of 'MODULE_AUTHOR'
and some more...
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- remove unused 'u32 reg' in platform code
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR133884 eMMC: improve boot_info message output
Output bit means of important esd_csd register
Read esd_csd info each time when cat boot_info
becasue user may change config affect esd_csd
value.
boot_info:0x07;
ALT_BOOT_MODE:1 - Supports alternate boot method
DDR_BOOT_MODE:1 - Supports alternate dual data rate during boot
HS_BOOTMODE:1 - Supports high speed timing during boot
boot_size:0512KB
boot_partition:0x48;
BOOT_ACK:1 - Boot acknowledge sent during boot operation
BOOT_PARTITION-ENABLE: 1 - Boot partition 1 enabled
PARTITION_ACCESS:0 - No access to boot partition
boot_bus:0x01
BOOT_MODE:0 - Use single data rate + backward compatible timings
in boot operation
RESET_BOOT_BUS_WIDTH:0 - Reset bus width to x1, single data rate
and backward compatible timings after boot operation
BOOT_BUS_WIDTH:1 - x4 (sdr/ddr) bus width in boot operation mode
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR126228 eMMC: Configure boot_partition_enable
Enable the configurations of the boot enable on the eMMC cards.
Add the interface that used to configure the boot_bus_width
In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.
NOTE:
The following are the valid inputs when configure the boot
bus width of the eMMC cards.
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 |
|----------------|----------------------------------|----------------|
| X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved
The following are the valid inputs when configure the boot
partitions of the eMMC cards.
+------------------------------------------------------------+
| Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 |
|------|----------|-----------------------|------------------|
| X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
So only the '0, 1, 2; 8, 9, 10; 16, 17, 18; 56, 57, 58' are
valid parameters when configure the boot_partiton.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR125411 eMMC: Boot Partition switch func used in MFG tool
User can get eMMC partitions info from user space layer in
linux OS enviroment.
User can do switch operations between the eMMC boot partitions
and the user partition.
User can access the eMMC boot partitions from user space layer
in linux OS enviroment.
NOTE:This func had been verified on TOSHIBA eMMC44 card only.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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The driver gpmi-nand should compile at least. This patch adds the
missing gpmi-nand.h to fix the compile error below.
CC drivers/mtd/nand/gpmi-nand/gpmi-nand.o
CC drivers/mtd/nand/gpmi-nand/gpmi-lib.o
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:25:33: fatal error: linux/mtd/gpmi-nand.h: No such file or directory
drivers/mtd/nand/gpmi-nand/gpmi-lib.c:21:33: fatal error: linux/mtd/gpmi-nand.h: No such file or directory
This header is grabbed from patch below, which has not been postponed
for merging.
[PATCH v8 1/4] ARM: mxs: add GPMI-NAND support for imx23/imx28
http://permalink.gmane.org/gmane.linux.drivers.mtd/37338
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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These files contain the common code for the GPMI-NAND driver.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
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add the GPMI-NAND driver in the relevant Kconfig and Makefile in the MTD.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
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bch-regs.h : registers file for BCH module
gpmi-regs.h: registers file for GPMI module
gpmi-lib.c: helper functions library.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
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* Clean i2c board settings for sabreauto platform
* Remove and unregister i2c0 device not used in this board
* Move i2c3 pads to general mx6q_sabreauto_pads[]
* [v2] add camera module ov3640 module to i2c2 bus
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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SPI nor cannot be probed, due to a previous patch which
modified its chip select settings.
Signed-off-by: Francisco Munoz <b37752@freescale.com>
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Due to the use of some higher frequencies for HDMI video modes, the
IPU clock set/get/round functions need to use 64-bit variables
for clock calculations instead of 32-bit variables.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Update get_rate, set_rate, and round_rate for audio_video PLLs
to account for new dividers added for MX6Q TO1.1. Since default value
for one of these dividers is 4, this is important for function of clocks
derived from PLL4 and PLL5.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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- change the default wakeup value of RH from enabled to disabled
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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- in Kernel 3.0, all the wakeup entry is removed by default,
we need add it manually
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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Enable PFUZE regulator.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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1. Enable parallel csi camera sensor, default sensor is ov5640
2. Enable mipi csi2 camera sensor, default sensor is ov5640
3. Rename to sabresd
Signed-off-by: Even Xu <b21019@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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Remove usless code in pfuze100 regulator driver
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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1. Add pfuze100's init fuction on board level
2. Add mx6q_sabresd_pmic_pfuze100.c
3. Rename to sabresd
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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Add suport for i.MX 6Quad SABRE Smart Device.
Rename to SABRESD.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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Add spdif to Makefile.
Signed-off-by: Alan Tull <r80115@freescale.com>
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[ 330.922320] [<800417e0>] (__bug+0x1c/0x24) from [<8007b4dc>] (__queue_work+0x24c/0x3f0)
[ 330.930333] [<8007b4dc>] (__queue_work+0x24c/0x3f0) from [<8007b6e0>] (queue_work_on+0x38/0x40)
[ 330.939039] [<8007b6e0>] (queue_work_on+0x38/0x40) from [<8007d568>] (queue_work+0x2c/0x58)
[ 330.947401] [<8007d568>] (queue_work+0x2c/0x58) from [<803b83a4>] (snd_soc_resume+0x98/0xb8)
[ 330.955852] [<803b83a4>] (snd_soc_resume+0x98/0xb8) from [<80280aa4>] (platform_pm_resume+0x2c/0x4c)
[ 330.964996] [<80280aa4>] (platform_pm_resume+0x2c/0x4c) from [<80284388>] (pm_op+0xe4/0x11c)
[ 330.973441] [<80284388>] (pm_op+0xe4/0x11c) from [<80284780>] (device_resume+0x78/0x13c)
[ 330.981537] [<80284780>] (device_resume+0x78/0x13c) from [<802849d0>] (dpm_resume+0x144/0x194)
[ 330.990154] [<802849d0>] (dpm_resume+0x144/0x194) from [<80284a2c>] (dpm_resume_end+0xc/0x18)
[ 330.998692] [<80284a2c>] (dpm_resume_end+0xc/0x18) from [<8009cf18>] (suspend_devices_and_enter+0x78/0xb8)
[ 331.008355] [<8009cf18>] (suspend_devices_and_enter+0x78/0xb8) from [<8009d010>] (enter_state+0xb8/0xe4)
[ 331.017842] [<8009d010>] (enter_state+0xb8/0xe4) from [<8009c5b4>] (state_store+0x8c/0xc0)
[ 331.026116] [<8009c5b4>] (state_store+0x8c/0xc0) from [<80223b20>] (kobj_attr_store+0x18/0x1c)
[ 331.034740] [<80223b20>] (kobj_attr_store+0x18/0x1c) from [<801352ec>] (sysfs_write_file+0x104/0x184)
[ 331.043969] [<801352ec>] (sysfs_write_file+0x104/0x184) from [<800e4ce8>] (vfs_write+0xb4/0x148)
[ 331.052762] [<800e4ce8>] (vfs_write+0xb4/0x148) from [<800e4e4c>] (sys_write+0x40/0x70)
[ 331.060781] [<800e4e4c>] (sys_write+0x40/0x70) from [<8003e380>] (ret_fast_syscall+0x0/0x30)
The commit:c4e133f ASoC: core: Don't schedule deferred_resume_work twice
commit c4e133f4e253b57e5d4409964a3b51f2d887e94b
Author: Stephen Warren <swarren@nvidia.com>
Date: Wed May 25 14:06:41 2011 -0600
ASoC: core: Don't schedule deferred_resume_work twice
commit 82e14e8bdd88b69018fe757192b01dd98582905e upstream.
For cards that have two or more DAIs, snd_soc_resume's loop over all
DAIs ends up calling schedule_work(deferred_resume_work) once per DAI.
Since this is the same work item each time, the 2nd and subsequent
calls return 0 (work item already queued), and trigger the dev_err
message below stating that a work item may have been lost.
Solve this by adjusting the loop to simply calculate whether to run the
resume work immediately or defer it, and then call schedule work (or not)
one time based on that.
Note: This has not been tested in mainline, but only in chromeos-2.6.38;
mainline doesn't support suspend/resume on Tegra, nor does the mainline
Tegra ASoC driver contain multiple DAIs. It has been compile-checked in
mainline.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
changed the defaut behaviour for non-ac97 class which cause deferred_resume_work
was scheduled not by desire when card->num_rdt is zero.
Signed-off-by: Jason Liu <r64343@freescale.com>
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/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mlb_tx_isr':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: (Each undeclared identifier is reported only once
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1351: error: for each function it appears in.)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mlb_rx_isr':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1400: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c: In function 'mxc_mlb150_read':
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: 'TASK_INTERRUPTIBLE' undeclared (first use in this function)
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: implicit declaration of function 'signal_pending'
/home/r64343/work_space/linux-2.6/drivers/mxc/mlb/mxc_mlb150.c:1828: error: implicit declaration of function 'schedule'
missing one header file: sched.h, add it to fix it.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Kernel oops when plug in/out sd card and throw out null pointer
this is due to: commit: 1a01753 ARM: gic: use handle_fasteoi_irq for SPIs
commit 1a01753ed90a4fb84357b9b592e50564c07737f7
Author: Will Deacon <will.deacon@arm.com>
Date: Wed Feb 9 12:01:12 2011 +0000
ARM: gic: use handle_fasteoi_irq for SPIs
Currently, the gic uses handle_level_irq for handling SPIs (Shared
Peripheral Interrupts), requiring active interrupts to be masked at
the distributor level during IRQ handling.
On a virtualised system, only the CPU interfaces are virtualised in
hardware. Accesses to the distributor must be trapped by the
hypervisor, adding latency to the critical interrupt path in Linux.
This patch modifies the GIC code to use handle_fasteoi_irq for handling
interrupts, which only requires us to signal EOI to the CPU interface
when handling is complete. Cascaded IRQ handling is also updated to use
the chained IRQ enter/exit functions to honour the flow control of the
parent chip.
Note that commit 846afbd1 ("GIC: Dont disable INT in ack callback")
broke cascading interrupts by forgetting to add IRQ masking. This is
no longer an issue because the unmask call is now unnecessary.
Tested on Versatile Express and Realview EB (1176 w/ cascaded GICs).
Tested-and-reviewed-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Tested-and-acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
the above commit has removed the irq_ack from gic chip tus the following call:
desc->irq_data.chip->irq_ack(&desc->irq_data);
will trow the kernel oops, to fix it, just involve the pair to fix it.
chained_irq_enter(chip, desc);
chained_irq_exit(chip, desc);
This also aligns the upstream kernel doing such as v3.2
Signed-off-by: Jason Liu <r64343@freescale.com>
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fix the compiling warnings when upgrade to v3.0
arch/arm/mm/init.c:215: warning: 'arm_adjust_dma_zone' defined but not used
The commit: be20902 ARM: use ARM_DMA_ZONE_SIZE to adjust the zone sizes by
Russell has make the _adjust_dma_zone function the common help function, thus
we can remove platform _adjust_dma_zone function by just define:ARM_DMA_ZONE_SIZE
commit be20902ba67de70b38c995903321f4152dee57b7
Author: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Wed May 11 15:39:00 2011 +0100
ARM: use ARM_DMA_ZONE_SIZE to adjust the zone sizes
Rather than each platform providing its own function to adjust the
zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this
adjustment. This ensures that the actual DMA zone size and the
ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with
each other, and moves this complexity out of the platform code.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Jason Liu <r64343@freescale.com>
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fix the building errors when upgrade to v3.0
The following commit change the function name:
commit a0cd9ca2b907d7ee26575e7b63ac92dad768a75e
Author: Thomas Gleixner <tglx@linutronix.de>
Date: Thu Feb 10 11:36:33 2011 +0100
genirq: Namespace cleanup
The irq namespace has become quite convoluted. My bad. Clean it up
and deprecate the old functions. All new functions follow the scheme:
irq number based:
irq_set/get/xxx/_xxx(unsigned int irq, ...)
irq_data based:
irq_data_set/get/xxx/_xxx(struct irq_data *d, ....)
irq_desc based:
irq_desc_get_xxx(struct irq_desc *desc)
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
We need give one fix to change the function call name to align this change,
- ret = set_irq_wake(dev->irq, 1);
+ ret = irq_set_irq_wake(dev->irq, 1);
Signed-off-by: Jason Liu <r64343@freescale.com>
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fix the building errors when upgrade to v3.0
we use data_size from mfd_cell struct on 2.6.38, but after that
there are some changes for this field of mfd_cell struct, see:
commit 40e03f571b2e63827f2afb90ea9aa459612c29e3
Author: Andres Salomon <dilinger@queued.net>
Date: Thu Feb 17 19:07:24 2011 -0800
mfd: Drop data_size from mfd_cell struct
Now that there are no more users of this, drop it.
Signed-off-by: Andres Salomon <dilinger@queued.net>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
and this:
commit eb8956074e7652e802be5f078080c704c2c87104
Author: Samuel Ortiz <sameo@linux.intel.com>
Date: Wed Apr 6 16:52:52 2011 +0200
mfd: Add platform data pointer back
Now that we have a way to pass MFD cells down to the sub drivers,
we can gradually get rid of mfd_data by putting the platform pointer
back in place.
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
But the above commit also change the name from data_size to pdata_size,
This patch just give one fix for the pfuze driver to use pdata_size field.
Signed-off-by: Jason Liu <r64343@freescale.com>
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fix the building errors when upgrade to v3.0
commit: d06d8c [CPUFREQ] use dynamic debug instead of custom infrastructure
has removed cpufreq_debug_printk, we will give one update for i.mx driver
Signed-off-by: Jason Liu <r64343@freescale.com>
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There is only one DMA command in the chain,
So MXS_DMA_F_APPEND is not needed.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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We need enable the following ARM errata software workaround:
CONFIG_ARM_ERRATA_764369=y
This errata is TKT078684 in i.MX6Q errata list.
In order to enable this errata, we need cherry-pick the following commit:
ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed:
f64f6df4241093ea928b0a263ec53b93b65efc08
In order to apply the above patch successfully and keep the git history, we also
need cherry-pick the following commit:
ARM: pm: add function to set WFI low-power mode for SMP CPUs
292ec42af7c6361435fe9df50cd59ec76f6741c6
These ERRATAs applied to i.MX6Q(cortex-a9:r2p10 smp)
Signed-off-by: Jason Liu <r64343@freescale.com>
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The bug is that HDMI audio continues playing after doing ctrl-z,
repeating playing a small part of the buffer.
Mask HDMI audio irq when we receive SNDRV_PCM_TRIGGER_STOP command.
Unmask when we receive SNDRV_PCM_TRIGGER_START.
Signed-off-by: Alan Tull <r80115@freescale.com>
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If we do not set the WAIT4END in the middle DMA command structure
of the long DMA command chain, a DMA timeout may occurs.
The reason of the DMA timeout is:
[1] We do not set the WAIT4END in the DMA command structure
which do the ECC READ PAGE by the BCH.
[2] So the following DMA command structure (maybe in other DMA
CHAIN)may disable the BCH module.
[3] If the time delay between [2] and [1] is long enough,
it's ok. But if the time delay is not long enough, the BCH
module may become unnormal, so it can not finish its job.
The DMA will timeout in this case.
We have changed the DMA interface to fix the bug, now use the new
interface.
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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For a long DMA chain which may have more then two DMA Command Structures,
the current DMA code sets the WAIT4END bit at the last one, such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^
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set WAIT4END here
But in the NAND ECC read case, the WAIT4END bit should be set
not only at the last DMA Command Structure, but also at the middle one,
such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^ ^
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set WAIT4END here too set WAIT4END here
We set the WAIT4END in the middle DMA Command Structure to ensure
the BCH module finishs its job. If we do not wait in this situation,
the BCH module may be changed in the following DMA Command Structures,
and it maybe becomes unstable which will cause a DMA timeout
This has been catched in the MX6Q board.
So rewrite the last parameter of mxs_dma_prep_slave_sg().
Add some more flags to let the driver sets the WAIT4END as it needs.
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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We catch a DMA timeout bug in the NAND in mx6q.
If we do not set the WAIT4END in the middle DMA command structure
of the long DMA command chain, a DMA timeout may occurs.
In order to fix the bug, we should let the driver to
set the proper DMA flags in the DMA command structrues.
So add the new flags for MXS-DMA.
The driver can use these flags to control the DMA in a flexible way.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The TIMING1 specifies the timeouts used when monitoring the
NAND READY pin and IOWAIT signals.
We should set a default value for it.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The 11M for GPMI is too slow.
Change the GPMI to 20MHz by default, most of the NAND
chips can run with this frequency.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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OV5640_MIPI need to be configure faster to get capture image
quickly. So change the configures, when change the resolution
OV5640_MIPI sensor will not do reset.
Signed-off-by: Even Xu <b21019@freescale.com>
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This patch fix vpu cannot run issue after suspend/resume
with stop mode. Need to re-load vpu firmware if current PC
is zero.
Signed-off-by: Sammy He <r62914@freescale.com>
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Add BIT_PIC_RUN register definition in mxc_vpu.h of arch/arm
Signed-off-by: Sammy He <r62914@freescale.com>
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viv code is using mutex to wait for pm events,
kernel will see this as a dead lock and give a warrning, as the mutex
can be hold for a long time.
Signed-off-by: Wu Guoxing <b39297@freescale.com>
Acked-by: Lily Zhang
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It cause by HDMI Blank/Unblank function not implement.
Implement the HDMI blank/unblank function.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Add u43 setting back
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Hake Huang <b20222@freescale.com>
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