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Tegra Profiler: show version and capabilities:
/proc/quadd/version
/proc/quadd/capabilities
Bug 1364258
Bug 1312406
Change-Id: I4ba26a0b6e95ecd350add4fac851feb98b0e84de
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/271828
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Tegra Profiler: fix incorrect names of modules.
mmap buffers are created for each core
Bug 1364251
Bug 1312406
Change-Id: Ib60fa45e5418de3acf2afd782c53650f17731976
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/271821
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Maxim Morin <mmorin@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Add SOC1040 (mt9m114) YUV sensor board file
support.
Bug 1327952
Change-Id: I66cacf3e2177b035e89cecee7bd3126a159fbf27
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/274671
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Do not call suspend/resume in display off case for touch.
Bug 1293127
Change-Id: I2c1986f80bca01f937b72d4dddb91e20247c258e
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/263498
(cherry picked from commit 15b02eca5e9510cea68619c2905634df6dc9184a)
Reviewed-on: http://git-master/r/276341
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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a. Checkpatch done (Bug ID 1368132)
b. Fix 3.3V control issue (Bug ID 1354253, 1348628) as the attached pictures. The 3.3V is turned off in LP0 mode.
c. Refine suspend/resume timing issue (Bug ID 1359713, 1288233, 1283537)
Bug 1368132
Bug 1354253
Bug 1348628
Bug 1359713
Bug 1288233
Bug 1283537
Change-Id: I639d311b51e4bd7feffcc904caa34370ab52e505
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/276340
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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Disable the always_on for the gpu rail. This is needed for the LP0 GPU
rail gating.
Bug 1370527
Change-Id: I0694df0303622873acf13ea2697bbb19af5537df
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/276081
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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disable deferred cache maint, to avoid unforseen issues, once sgt is
get on handle.
Change-Id: I086fdceb92126a6cad7223ec6ca8b5de9f74ebaf
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/276121
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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fix sgt free bug as well.
Change-Id: I56fb6a5d77f870a888c0f2ce683e062673a3fec6
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/276365
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Use correct dev pointer during dma_unmap_sg_attr call.
Change-Id: Ifaeffa549c552a878c60954fcb045a9fbd3dc4ef
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/276095
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Add TEGRA_DC_EXT_CURSOR_FORMAT_FLAGS_RGBA_PREMULT_ALPHA flag for
tegra_dc_ext_cursor_image::flags to select premultiplied alpha.
For consistency, rename
TEGRA_DC_EXT_CURSOR_FLAGS_2BIT_LEGACY
TEGRA_DC_EXT_CURSOR_FLAGS_RGBA_NORMAL
to
TEGRA_DC_EXT_CURSOR_FORMAT_FLAGS_2BIT_LEGACY
TEGRA_DC_EXT_CURSOR_FORMAT_FLAGS_RGBA_NON_PREMULT_ALPHA
(but retain the old names as aliases, for source-level backwards
compatibility).
Add new caps bits to be reported in tegra_dc_ext_control_capabilities::caps
TEGRA_DC_EXT_CAPABILITIES_CURSOR_TWO_COLOR
TEGRA_DC_EXT_CAPABILITIES_CURSOR_RGBA_NON_PREMULT_ALPHA
TEGRA_DC_EXT_CAPABILITIES_CURSOR_RGBA_PREMULT_ALPHA
Note that before this change the default RGBA cursor behavior on T114 was
non-premultipled alpha, while on T124 it was premultipled alpha. Now,
the default RGBA cursor behavior is consistently non-premultipled alpha.
Existing T124 RGBA cursor users will need to use the new PREMULT_ALPHA
flag.
Update the cursor image format documentation in tegra_dc_ext.h
Bug 1354320
Change-Id: I82b04c97dea1830ce2659c966ae2a1b59fa06028
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/271749
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Fix compilation error on board-loki-sensor.c:
/**
/board-loki-sensors.c:655:15: error: variable 'loki_fan_therm_est_device_p2548' has initializer but incomplete type
/board-loki-sensors.c:656:2: error: unknown field 'name' specified in initializer
/board-loki-sensors.c:656:2: warning: excess elements in struct initializer [enabled by default]
/board-loki-sensors.c:656:2: warning: (near initialization for 'loki_fan_therm_est_device_p2548') [enabled by default]
/board-loki-sensors.c:657:2: error: unknown field 'id' specified in initializer
/board-loki-sensors.c:657:2: warning: excess elements in struct initializer [enabled by default]
/board-loki-sensors.c:657:2: warning: (near initialization for 'loki_fan_therm_est_device_p2548') [enabled by default]
/board-loki-sensors.c:658:2: error: unknown field 'num_resources' specified in initializer
/board-loki-sensors.c:658:2: warning: excess elements in struct initializer [enabled by default]
/board-loki-sensors.c:658:2: warning: (near initialization for 'loki_fan_therm_est_device_p2548') [enabled by default]
/board-loki-sensors.c:659:2: error: unknown field 'dev' specified in initializer
/board-loki-sensors.c:659:2: error: extra brace group at end of initializer
/board-loki-sensors.c:659:2: error: (near initialization for 'loki_fan_therm_est_device_p2548')
/board-loki-sensors.c:661:2: warning: excess elements in struct initializer [enabled by default]
/board-loki-sensors.c:661:2: warning: (near initialization for 'loki_fan_therm_est_device_p2548') [enabled by default]
/board-loki-sensors.c: In function 'loki_fan_est_init':
/board-loki-sensors.c:669:2: error: implicit declaration of function 'platform_device_register' [-Werror=implicit-function-declaration]
/board-loki-sensors.c: At top level:
/board-loki-sensors.c:405:30: warning: 'loki_i2c_board_info_e1823' defined but not used [-Wunused-variable]
cc1: some warnings being treated as errors
**/
Change-Id: I0dd383be1b365f953b4040e0a037f32f2b4223f4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/276307
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Change-Id: I7901fb2ed942f7f9ff19c09e0b50b4873107cfd8
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/273206
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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bug 1369289
Change-Id: I7d1d4d372e342ba4eabcd07679590127db84f73b
Signed-off-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/276270
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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pointers are not U32
use correct casting
min requires types match to return correct value
Change-Id: I0db0903b845bc9a5c310e657c8c60ebb5ece78ba
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/269684
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Many regulator drivers have a remove function that consists solely of
calling regulator_unregister() so provide a devm_regulator_register()
in order to allow this repeated code to be removed and help eliminate
error handling code.
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit b33e46bcdc4e598d738ed12a5a7906be4e11d786)
Change-Id: Ia2e35a18e3e836b1464149de475ad0a755d8fc4d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/276259
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Enable config for SOC1040 (mt9m114) YUV
sensor.
Bug 1327952
Change-Id: I7b4c3fe2818cf1506b15bfef54a51b20821a082c
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/274662
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Add SOC1040 (mt9m114) YUV sensor driver
Bug 1327952
Change-Id: I91fc5ac9cbb7b537bdb6f31684d99725689a61a3
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/274669
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Jean Huang <jeanh@nvidia.com>
Reviewed-by: Hu He <hhe@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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PMC_WAKE2_STATUS wake status register values 0x160 was incorrect,
Which is PMC_WAKE2_MASK values. Due to which system is getting
power key values for all wakes. So correcting the value to 0x168.
Bug 1347873
Change-Id: I7e3d5e830fd1f1d8393d4ac0ff9fde0a0538fdbf
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/276151
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Many regulators have several linear ranges of selector with different
step sizes, for example offering better resolution at lower voltages.
Provide regulator_{map,list}_voltage_linear_range() allowing these
regulators to use generic code. To do so a table of regulator_linear_range
structs needs to be pointed to from the descriptor.
This was inspired by similar code included in a driver submission from
Chao Xie and Yi Zhang at Marvell.
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 94d33c02c7186b69849c292e1216a08ad1c0d99d)
Change-Id: Iae2a01e853aaf4c43e0be26713106b93c6be82b4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/276236
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To support the regulator registration through DT and consumer
from non-dt, add support for adding consumer list through DT
so that non-dt driver can get their regulator in normal way
without modifying anything on client driver.
Change-Id: I7d3ca0994b1d5c28767b956df4c3eb861eec2af4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/275794
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Units to be returned are 0.1 degree centigrade.
Fixed the same.
Change-Id: I5eecf0129b0d1e3f8809eeefcb41bf7ac46e4f92
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/276122
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Add DT property regulator-init-microvolt to pass the
initial voltage setting of the rail.
Change-Id: I38573973cd70850c70a4e43d4a34817fefe2313b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/275793
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Add support for max17048 FG chip and adc.
Bug 1339831
Change-Id: Ib45017d4259c0cc065831467280128a099ff4e56
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/275739
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Re-styled a few register accesses. Functional no-op.
Change-Id: Id0f8431b686886d2b44e837b6c42422cc4011a38
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/274427
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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This change is the result of narrowing down the accessors to only
those bits used by the driver. In some cases minor changes were
necessary to account for previously wrong uses.
Change-Id: Id064c87d33bb9c8defaf11f5ef6a2de8b05497fd
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/272204
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Allow falcon stats to be printed out when we get
a PMU Halt interrupt. Also increase the print
level of those prints to err (so they get printed
by default).
Change-Id: I6008566b3c8183621accd4ecc4a3578e1ca3d290
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/274678
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add a tool for parsing and plotting data from dmadebug:* ftrace events.
Bug 1173494
Change-Id: Id7e175fda4c1ef42ef6a0403f1bece36b273cd99
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/268051
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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Lowered palmas smps45 minimum voltage to 0.7V (from 0.9V) to provide
necessary range for VDD_CORE rail scaling.
Change-Id: I110baea1be1399a6aa8e88860b63ce5e1a77d723
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/275601
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Change-Id: Iac23106ca07514b571932e41495e34a762df8175
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/275600
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Updated CPU regulator parameters with new data: changed minimum
voltage to 704mV (from 705mV), and power good time to 2000us (from
2500us).
Removed unnecessary check for E1735 power module (not applicable
to loki).
Moved CL-DVFS initialization to regulator init call (from fixed
regulator init) to setup dfll bypass call-backs before suspend
initialization.
Change-Id: Iad2b09f6c83a41c3f77dae9069b53a1758929281
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/274868
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Made sure that secondary PLLC output (not secondary PLLM output) is
used as high rate parent for system clock bus, when PLLM is scalable.
Bug 1367993
Change-Id: Id999965ea659a85d2b4b71fe971a3c0fd863b7a7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/275324
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Change-Id: Ib239cc7ffe37ca5873c2116561bb8d85e70a4fb0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/274749
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Deferred 1st dvfs rail update until dependent clock rate is specified.
Only Tegra12 GPU dvfs rail is affected by this change, since Tegra12
GPU clock is configured after dvfs rails are connected to regulators
(CPU and core clocks are set before regulator connection on all tegra
platforms).
Change-Id: I62e62e4f203161c67372114b55444da857f641c3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/274913
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add PMIC(palmas) shutdown trip data for soctherm on Loki.
Bug 1353528
Change-Id: I830407bea1b9fa3ffbb2b16648b0f865aab1506c
Signed-off-by: Yunfan Zhang <yunfanz@nvidia.com>
Reviewed-on: http://git-master/r/274948
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Check soctherm CP and FT fuse revision and if valid, switch from NCT72
to soctherm zones. Remove cooling device from NCT platform data and
raise NCT's shutdown point by 20C to effectively deactivate it.
With this change, thermal actions will use soctherm on properly fused
chips and use NCT on improperly fused chips.
Bug 1353528
Change-Id: Icd22eb9de59264efb1896dfe9d9ad5c13b062037
Signed-off-by: Yunfan Zhang <yunfanz@nvidia.com>
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/274941
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Initialize fan thermal zone that controls fan. This change
has settings of therm_fan_est that estimates driving temperature
of fan.
Bug 1364451
Change-Id: I61d02bc431faa264188d9d5befa8d22d74a6da91
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/274644
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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This change add the PWM fan device.
Bug 1364451
Change-Id: I53e9493efdbbf0507a5cda97dea3a5c2c0898c8e
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/274643
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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bug 1368130
Change-Id: I9a2cec8b4d0e91074447155ffd3029fc7eff9e28
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/274608
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Tested-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
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Update the core clocks with the first cut post silicon table
Bug 1342499
Change-Id: I3b4815b85ae094378695ddd06b3110e7a1417abe
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/273297
Reviewed-by: Chao Xu <cxu@nvidia.com>
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Update sku independent soc and io clocks with first cut
post silicon table.
Bug 1342499
Change-Id: I5e3087da63cace68da322b90fb29d1aaef3148a7
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/272755
Reviewed-by: Chao Xu <cxu@nvidia.com>
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Expand the safe soc dvfs table to allow core voltage of 50mv steps
from 800 to 1150mv.
Bug 1342499
Change-Id: Id52a2d3cffa24accd40556cfc238806776386be3
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/272123
Reviewed-by: Chao Xu <cxu@nvidia.com>
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- make use of read only flag from smmu while loading firmwares
- to enable this first add extra parameter 'rw_flag' to function
nvhost_memmgr_pin() and nvhost_nvmap_pin() to pass read-write flag
- nvhost_nvmap_pin() will then set appropriate attributes based on
the flag passed
- below are the available flags which can be passed
mem_flag_none : do not mark anything
mem_flag_read_only : mark read only
mem_flag_write_only : mark write only
- make use of 'mem_flag_read_only' for MSENC, TSEC and VIC firmwares
by passing this parameter from below :
msenc_read_ucode()
vic03_read_ucode()
tsec_read_ucode()
- add 'mem_flag_none' in all other calls to nvhost_memmgr_pin()
Bug 1309863
Change-Id: I7c3d3525e403fd46921a30502f70e79ecf74fca8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/274282
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Reuse the same mapping if the user tries to map the same physical
address twice.
Previously we would reuse mappings only if the sequence was:
1. user map
2. submit (takes a ref to the mapping)
3. user unmap
4. user map again <-- reuses the mapping created in 1.
Add support for reusing mappings also in the following sequence:
1. user/kernel map
2. user/kernel map again <-- reuses the mapping created in 1.
Duplicate mappings are properly refcounted.
Also move memmgr and mem_handle ref management of user mapped buffers
into mm_gk20a. See the comment in mm_gk20a.c.
Change-Id: Ibceb3ce4c68cca0309c7977860d7250dde56499c
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/263345
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Adding a new debugfs attr for vsys_min psy depletion platform data for
tuning.
Bug 1306298
Change-Id: Id9b7a6affae2216e7bafde55eea2f8eacbe24572
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/272489
(cherry picked from commit 9361d0eaef4f7616e443fdbbefebeda92c496b87)
Reviewed-on: http://git-master/r/275628
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Allow bypassing dma mapping API.
Change-Id: I914e65f33dace3ad49de1344d31bbebf9c5cf994
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/273725
Reviewed-on: http://git-master/r/275163
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Initialize actmon only if its clock is defined.
Change-Id: I87d74f4ce918e812590995a477f23b1eeaaa96bf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/274884
Reviewed-on: http://git-master/r/275165
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Reset TSEC only if reset flag for the clock has been enabled.
Change-Id: I28036566a017791bef3fc7bd59237b9df705a390
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/274144
Reviewed-on: http://git-master/r/275164
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Pass the platform data for the bq2419x battery charger
chipset on tn8 platform.
Bug 1354806
Change-Id: I4f9e82f6ea13615328cce29411816d992394c6be
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/274220
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Input parameter to time_is_after_jiffies() has to be in "unsigned long"
type.
bug 1320242
Reviewed-on: http://git-master/r/253185
(cherry picked from commit 604612466faae0d70cf08a9d02d8a9bf5d7749b3)
Change-Id: Ic4d3af653b507244a016a557fa3a178c02a26a9d
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/273704
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Use system PMIC reset if reboot command is NULL or empty.
bug 1351991
Change-Id: I59b9ccb7b64f1b9e4dbeb0fd372939fc8428d9aa
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/275604
Tested-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
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