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Change-Id: I4398ace0c55d4833b1fcbb7a4e71ab8f0b1b044a
Signed-off-by: Colin Cross <ccross@android.com>
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This avoids the S305 panic during incoming connection.
S305 sends PSM 25 L2CAP connection request before the L2CAP info response.
When we receive that info response we crash on null pointer here.
Bug: 2127637
Change-Id: Ib637516251f46fa9a9c87ac015dc2f27df5a27fd
Signed-off-by: Nick Pelly <npelly@google.com>
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add a procfs directory to reflect tegra ATAGs to user-space, so that
user-space components which require information originating from the
bootloader(e.g., display parameters for seamless display transitions)
can be supported.
bug 645228
Change-Id: I1abd9eeeed8a82b0d387fc7a7ed4d481a7b96adb
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Change-Id: Ib7c22898783fdc66fa626e06360bd5ca9637067e
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Change-Id: Ib28874b60ac83449649ef08da252eaea4e36805c
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Change-Id: I4d6e62904e716d883c2844bc687be32277c791c5
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Change-Id: If3b5616f61fa9964d21a21878923c06b53d2ba59
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Change-Id: Id35c6cfe7af3b329dc89c23da16e077c4842cee1
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Change-Id: I8bb150efaac60cae7ff1a879a9cd7e2051392e18
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add an API to return the completed transfer count of a pending, active
or finished DMA request
CONTINUOUS was misspelled CONTINOUS; fix this in the hsuart and dma drivers
Change-Id: I732396f60f876c92fe3b74ad1d2fc02d00868d24
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Change-Id: I7aa12d51d526eff977c7569ee3059ee627b25824
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use a common dma_mask variable for all devices
Change-Id: I786fedd94b51d20b168c5628163ca9a93f19f6dd
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extend the clock structure to store range tolerances and/or minimum/maximum
ranges to allow soft matching of the requested frequency, as the RM fails
most exact requests
Change-Id: I17b661b345f9fb1f654153bd15514d12f06b9bc1
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Change-Id: Id0f80affea2ab309d7160049ec9c6976a92c2f0f
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some platforms support alternative means of detecting card presence (e.g.,
GPIOs). add a callback function for these hosts to allow card detection
without polling and without relying on the PRESENT_STATE register
Change-Id: Ic024d7c2f39b7089a4f4683ffe36ed367756941d
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extend the csd_struct version check to allow version 3, since some
eMMC devices report this.
Change-Id: I23e592044223c7b98e21616000306ddc5f244f86
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enables platforms which do not support the standard card detection interrupt
to trigger the card detection using a platform-specific handler
Change-Id: I2bc3f7538f55a6b169b0b2a477ca1ff44bf936ed
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Change-Id: I1c92ac85cc27f6c9181593029705f1e2fef3f89c
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add BROKEN_WRITE_PROTECT quirk which calls a get_ro callback function
to detect the card read-only status for hosts which do not detect
the write protect flag correctly
add ENABLE_INTERRUPT_AT_BLOCK_GAP quick for hosts which do not detect SDIO
card interrupts unless INTERRUPT_AT_BLOCK_GAP is enabled
add BROKEN_CTRL_HISPD quirk for hosts which should not have CTRL_HISPD
bit set after switching to high-speed mode
add NO_64KB_ADMA quirk for hosts which need to split a 64KB (max) ADMA
transfer into 2 smaller transfers
add BROKEN_SPEC_VERSION quirk to bypass reading the HOST_VERSION register
for controllers which report incorrect values from this register
add NO_SDIO_IRQ quirk, for controllers which should use SDIO IRQs
Change-Id: I0f09f5a25c0d4048d8c7139a3d68ee3705f95589
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properly unpacks the boot sector extension in MMC 4.4 CID responses
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enables platforms to specify a non-zero offset for the MBR and kernel-visible
file systems, for embedded systems which store proprietary data at the start
of the eMMC device.
Change-Id: Id58abaffddda7d7aeded8573f4aba6cc0c903a24
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tegra 2 systems have a hardware errata which causes bit 20 of the
TLS register (CP15 c13, operations 2-4) to be unreliable.
in common user space threading libraries (glibc pthreads, bionic
pthreads), the value stored in this register is guaranteed to be
at least word-aligned, leaving bit 0 free.
the work-around for this hardware errata is storing bit 20 of the
user space-provided TLS value into bit 0 of the register inside
__set_tls, and restoring it in the get_tls helper.
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This reverts commit 197d3f06e732a0428701c4f3550b91f9fc1297ab.
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Change-Id: Ifdb35b62268f0c651c3b1052f61f379748329661
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Change-Id: I44a22bead5c7e93259fdd5f47e4878d09b1b5a12
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Change-Id: Ib19d746e3e3a9f3b6c70d6563444fad176f5b088
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Change-Id: I87b0263b80103faa428b9507fa0ca3603cfc8d7d
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Change-Id: I2659ea84b580be8671628b69316ef0c92e67f815
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Change-Id: I4df4a971ddb63459e739806d0b7820ea43016994
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Change-Id: I28c25b24a02d2416e29bd791cd66d6478798a6fc
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Change-Id: I8471465a765f07b76cfb41e79a746d86145095c3
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Change-Id: Id929395b48813bad3476e7730ca40ce37bdda6c4
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Change-Id: I5565b2cb0885accca7c05860b65862ca1c33eddb
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add an RTC driver using the NVIDIA PMU adaptation ODM kit interface
Change-Id: I15665165ec4c175c2b140639bb01be7ebce6e6a1
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register a tegra_uart high-speed serial port for every UART on the
system except for the debug console. for every connected UART, pass
the pinmux configuration from the ODM query to the serial driver to
support changing the tristate when transitioning into or out of suspend
Change-Id: Ic15a1b16945ca685b23b50356eaae56925b60f5e
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to allow the tegra serial driver to put the UART pins into tristate when
the UART is suspended, pass a custom platform data structure to the driver
which contains the list of pingroups to toggle when transitioning between
power states
Change-Id: I184d53ffe710d0ec2d4e0079d7767a218d328bae
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Change-Id: I87744c61c8dd48e6d6abef2945940e76ecd61cea
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Change-Id: I378486aa5254e6300c055475505c4f6e762277c2
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add a new board file for initialization of platform data and registration
of platform devices based on ODM-queried values, rather than compile-
time constants.
add debug console (UART) initialization to it.
Change-Id: I592cea3b714b03d3e122ad46d12305c43c9e382f
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debug UART init will be based on the values reported by the ODM query,
not compile-time based on a Kconfig option
Change-Id: I4bac044a55fc973a144400a9b65be5b3ce1a1c51
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_nvmap_handle_unpin needs to acquire the mru_vma_lock before decrementing
the pin count, to ensure that a decrement to zero and insertion on the
MRU VMA list appears atomic with respect to a second client calling
_nvmap_handle_pin on the same handle; otherwise, the two clients race
and the pin operation may trigger a BUG because the handle has a valid
IOVMM area but is not located on any MRU VMA list.
also, clean up some additional allocation-inside-spinlock issues;
release the MRU VMA lock before calling tegra_iovmm_create_vm, and
reacquire the lock after returning.
Change-Id: I6703d21266124b3084f10f5b94a12cdeaf43a330
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statically allocate a maximally-sized block array at heap init time,
rather than dynamically doubling the array size when spare blocks are
unavailable.
allocate new handle ref objects prior to locking the file's ref lock
Change-Id: I193210e059ed38c67287650fc4b578e85097ec12
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if a standard cache maintenance operation is performed during the cache
shutdown procedure (either in an interrupt, or as a typical DMA maintenance
operation executed by a different processor in an SMP system), the cache
controller can return an imprecise external abort.
to avoid this, disable interrupts while the shutdown code is executing,
and bug if the code is ever called while more than one processor is online
Change-Id: Ib17e7e437a81663846316696ab2eaf3dcc3481cf
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when attempting to split a newly-allocated block, release the spinlock
before attempting to kzalloc heap space for the new block structure, then
reacquire the spinlock, to avoid sleeping inside an atomic section
Change-Id: Iae69bca23d0c356fedf0de7e8f9360c4fd32f861
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Put the AVP suspend operation in the kernel. It appears
that someone in userspace is still active after nvrm_graphics
has suspended.
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Bug 679959
Change-Id: I60f183280f650bf5238bfdb944d5dd112832ad4d
Reviewed-on: http://git-master/r/1403
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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the assignment to hDdkUsbPhy->IsHostMode was intentional; rewrite the
code to make this clearer
Change-Id: Ifc881397c240049b7c0a4300ae3267be397bfda5
Reviewed-on: http://git-master/r/1420
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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perform resource acquisition in a dedicated init-time function, to
eliminate sleeping-inside-spinlock problems.
Change-Id: If0b54a329c316314e78a6f7aa2c678a45dc298c3
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In the dynamic tick code, "max_delta_ns" (member of the
"clock_event_device" structure) represents the maximum sleep time
that can occur between timer events in nanoseconds.
The variable, "max_delta_ns", is defined as an unsigned long
which is a 32-bit integer for 32-bit machines and a 64-bit
integer for 64-bit machines (if -m64 option is used for gcc).
The value of max_delta_ns is set by calling the function
"clockevent_delta2ns()" which returns a maximum value of LONG_MAX.
For a 32-bit machine LONG_MAX is equal to 0x7fffffff and in
nanoseconds this equates to ~2.15 seconds. Hence, the maximum
sleep time for a 32-bit machine is ~2.15 seconds, where as for
a 64-bit machine it will be many years.
This patch changes the type of max_delta_ns to be "u64" instead of
"unsigned long" so that this variable is a 64-bit type for both 32-bit
and 64-bit machines. It also changes the maximum value returned by
clockevent_delta2ns() to KTIME_MAX. Hence this allows a 32-bit
machine to sleep for longer than ~2.15 seconds. Please note that this
patch also changes "min_delta_ns" to be "u64" too and although this is
unnecessary, it makes the patch simpler as it avoids to fixup all
callers of clockevent_delta2ns().
[ tglx: changed "unsigned long long" to u64 as we use this data type
through out the time code ]
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Cc: John Stultz <johnstul@us.ibm.com>
LKML-Reference: <1250617512-23567-3-git-send-email-jon-hunter@ti.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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The mult and shift factors of clock events differ in their data type
from those of clock sources for no reason. u32 is sufficient for
both. shift is always <= 32 and mult is limited to 2^32-1 to avoid
64bit multiplication overflows in the conversion.
Preparatory patch for a generic mult/shift factor calculation
function.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Mikael Pettersson <mikpe@it.uu.se>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Cc: John Stultz <johnstul@us.ibm.com>
LKML-Reference: <20091111134229.725664788@linutronix.de>
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