Age | Commit message (Collapse) | Author |
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Disable the always-on flag of modem regulator so the regulator is possilbe
to be powered off.
bug 966960
Change-Id: Ibe88e6a5554c7fde27b9142b35d26d252aa40334
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/99494
Reviewed-by: Sheshagiri Shenoy <sshenoy@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Add a trace event for powergating. The existing power_domain_target is used.
state 0 is used for off and state 1 is used for on. This patch only traces
non CPU domains. The powerstate of CPU domains is already traced using
power_start events.
bug 976845
Change-Id: Ic9503f7b42b35c0bf70c7b64a7f15c4960637200
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/99416
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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condition to check bit-format is always false
because TEGRA20_I2S_CTRL_BIT_FORMAT_I2S is zero.
Bug 947429
Change-Id: Ieb92f0732b092100dc1bf323ad60aff4439d5b3d
Signed-off-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-on: http://git-master/r/99341
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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This reverts commit 90b79e5712300baab889772a5af348559ac95836.
Bug 955393
Change-Id: I0e2a15b7d0898dbbb62f09d8bd3502ec93366664
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/99261
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: Adam Cheney <acheney@nvidia.com>
Tested-by: Adam Cheney <acheney@nvidia.com>
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Added support for enable/disable rails from user space.
bug 966960
Change-Id: Iae660699c60f537296f90508a78bd40959c46535
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/99186
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hunk Lin <hulin@nvidia.com>
Tested-by: Hunk Lin <hulin@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Modified existing pcm driver to take dma mode/ hw structure.
Exported the functions needed for other pcm mode driver.
Added new TDM mode hw param structure.
Added pass SINGLE/DOUBLE buffered dma mode params.
Bug 948478
Change-Id: I58309d52748f813b3303a8d6a052fbb6cc7ca87a
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/99146
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Change-Id: Ib16ea10bf1acc2c7171935429635502aee80f3f4
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/99072
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Update correct status to fuel-gauge driver
when charger cable is disconnected.
Bug 960318
Change-Id: I4c3ad2030ada7c06825e80a3eb4697b669fe7cb6
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/98719
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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If sd power rail is not configured to FORCED_PWM_MODE or
FSRADE_DISABLE, clear corresponding bits(FPWM and FSRADE)
when initialization.
Change-Id: I4e08329a430c6ccf7179b77cc7a283460ffaedd1
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/98715
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Configure i2c client structure in update charger structure
only when the charger driver is in use.
If charger driver is not used return -ENODEV
Change-Id: Ib1bc99145ee75bea819f69157920f9096e5d40ba
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/98712
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Vcell is calculated based on upper 12msb's of ADC result.
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/95830
(cherry picked from commit e550636d9b03207b9d4fecf078168175964d85fd)
Change-Id: Ic2834d8c8576b938e9d7d400c2beeb459ddeb5fc
Reviewed-on: http://git-master/r/98669
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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setting max 2d clock can make noticeable performance difference
in 2d limited usecase such as buffer clearing
Change-Id: I40ef999e7eeebff45b657f00293608561cae831d
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/98644
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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- Abort initialization if an I2C error to avoid excessive load on the I2C bus
since it is heavily used during initialization.
- Updated to the latest NVC framework.
- Added feature that allows for the key focus points to be set at runtime
and the relative positions recalculated.
Bug 929133
Bug 938934
Change-Id: Ida4ab885bf35057ae6df131e3ec3587a891a7dc9
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/93944
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Enabling the sh532u driver feature to not register itself
if it does not identify the sh532u device during probe.
This is for the case where the platform does not populate
the device.
Bug 929133
Change-Id: Ic5ac7fa0ae4c05e4978fe7aebc3fc630ef1c2fd3
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/92340
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Properly configure USB_PHY_CLK_VALID_INT_ENB.
Bug 926787
Change-Id: I9c70ce4e35e5c3b841c6240cbb4ce1c9b9f2a8ff
Signed-off-by: ahcheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/84800
(cherry picked from commit 2eba70e75f6baa9e76bea309927b9841dd32bb9e)
Reviewed-on: http://git-master/r/98798
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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If bootloader specify that marvell wifi chip is
present on the board, then create marvell wifi device,
else create broadcom wifi device.
Bug 954218
Change-Id: Ia0515e70b6d4b239a165b8d8629e3b90c19666b6
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/98490
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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add Konfig to marvel 8797 and some tailing
space corrections.
Bug 954218
Change-Id: I2885f2a74dea14ffeeb5dad65e03e217c77c5013
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/98436
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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For kai we are not using embedded_sdio
this patch removes embedded_sdio_data
Bug 932086
Change-Id: Id787803094b6baa39c02bb65bead04d819d04b23
Reviewed-on: http://git-master/r/97884
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Initial commit for Marvell sd8797 Wi-Fi driver
Package Ver: T3T-14.69.11.p111-M2614303_A0B0-MGPL
Bug 954218
Change-Id: I76fcadb5cda054d1e489c4cff77a3c461bdac742
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/97305
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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disable built_in support for sdio devices on cardhu,ventana
whistler and kai
Bug 956238
Bug 932086
Change-Id: I090174f6119729d25736a7704c6a458eeeb230c5
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/96079
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Bindal <nbindal@nvidia.com>
Tested-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Change-Id: I54a46230ee743ac9c740048cdb38328947d52c3c
Signed-off-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-on: http://git-master/r/96133
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Tegra 2 version: TF_TEGRA2_AA01.07.34078
Tegra 3 version: TF_TEGRA3_AB01.06.34049
Bug 950169
Signed-off-by: Chris Johnson <cwj@nvidia.com>
Reviewed-on: http://git-master/r/89927
(cherry picked from commit 28fc4a5b80a0f6db3e6dc50efd8c0412e2ae11bf)
Change-Id: I41413b4f00d243e3bb56d44fb32eea29d0291401
Reviewed-on: http://git-master/r/90445
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chris Johnson <cwj@nvidia.com>
Tested-by: Chris Johnson <cwj@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Change line_length for 1080p mode in order to change
frame rate from 31.30 to 29.50 fps.
The reason that new fps is not 30 is because flicker
detection requires fps not to be multiples of 60/50Hz.
This change helps save power and lower the chance of frame
drop.
Bug 928296
Change-Id: I4fda13d9334c725754b3f5eab034309a1dfef3dc
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/83636
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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There is race between USB autopm and system PM. The device's upstream
port may not be ready if USB autopm is triggered by modem remote wakeup
GPIO during the L3 to L0 or L0/L2 to L3 transition.
Bug 955162
Reviewed-on: http://git-master/r/91369
(cherry picked from commit b668f74e93a4ae33b380744a8ac28c098456b459)
Change-Id: I1a9c2dadb530144aa8741370247272b6962fe777
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/96593
Reviewed-by: Automatic_Commit_Validation_User
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Set maximum supported channels of HDA driver based on the LPCM channel
capability of the HDMI device. This is needed because user space
decides number of PCM channels to be sent to kernel based on this
information.
Bug 960940
Change-Id: I59ae3b7d47dcf26f697bfb0877ca24556f0ab1fa
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/94831
Reviewed-on: http://git-master/r/98783
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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Add Support to detect the HP insertion or removal during
LP0 state.
Bug 969405
Change-Id: Ibedf1769338e16877240ea9cc82fa7469eb7ff9e
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/98745
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Moved SCLK shared users initialization from silicon only section
of init table to common silicon/emulation section - there is no
reason to limit this settings to silicon only.
Change-Id: Ib1aa1bd3f98008b6584222e6c49f0825d635b8bd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/98104
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Instead of always using 2 dma_req count pass max dma_req_count
through a macro. Ensure dma_req_count does not cross
period_count.
Bug 968814
Change-Id: Iddfbd77017992ccb8c90441213e191133dadb347
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/97915
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Change prototype of tegra_asoc_utils_init to pass snd_soc_card handle.
It is needed to move common tegra machine driver codes to
tegra_asoc_utils interface.
Bug 968814
Change-Id: I98490ffdda51cf7d0b89adadb23c31892183bc0e
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/97914
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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When there is PMU interrupt we need to enable controller
clock. For this currently, work is being schedule, removing
this as clock can be enabled directly without scheduling
any work.
bug 925958
bug 941899
Signed-off-by: Andy Carman <acarman@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/88777
(cherry picked from commit fc31c04b7124f30970e862dd1b21a97d18dca38e)
Change-Id: I8f6e7325771219488440226ddde97a32da228608
Reviewed-on: http://git-master/r/97882
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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enable MMC_PM_IGNORE_PM_NOTIFY for all sd instances
Bug 956238
Bug 932086
Change-Id: I4d455e480eabace403719f1813d97abfa4d01924
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/96071
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Remove overriding chipid and revision from command line as this is
not used anywhere.
Change-Id: I41789534c51c14b5194ba84be4b312b99b25c281
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/95871
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Sometimes 3D unit comes up with incorrect scissor configuration.
Earlier patch added the scissor registers to the context save list,
but that did not solve the problem. Remove the extra registers, and
reset 3D after powering it up.
Bug 939307
Change-Id: Id795f2d99ec3c6b907da2785b1816ce753af7a3f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/87654
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Graziano Misuraca <gmisuraca@nvidia.com>
Tested-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
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Bug 951349
Change-Id: I79fb2e49fa38b83af78323b5f5cf6dbca8fd83c2
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/98512
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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System crashes if there is process migration during vfp_init() call.
During vfp_init(), if a process which called vfp_enable() is migrated just
after the call, then the process executing the rest of code will access
a VFP unit which is not ENABLED and also smp_call_function() will not work
as it is expected.
This patch prevents process migration during vfp_init().
Bug 968524
Bug 961609
Bug 957974
Bug 958581
Bug 959838
Bug 946739
Change-Id: I18c0ff3af490578afd5add7a1d64cab8c8ebf487
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/98029
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Add system suspend count and avoid urb activity during
system suspend. Use async autopm to avoid deadlock with
system suspend. Do not allocate rx urb's constantly -
allocate once upon init, free rx urb upon exit.
Bug 929408, 952748, 957354
Change-Id: I4ea050fc881528cf44d2039d42891e21c9df8c4e
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
(cherry picked from commit 8bd7322127ccf6727d949f4bc1b2a4eac4b6814e)
Reviewed-on: http://git-master/r/95166
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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The stack frame for Android is slightly different than that used
for vanilla Linux.
Bug 935536
Signed-off-by: Ryan V. Bissell <rbissell@nvidia.com>
Reviewed-on: http://git-master/r/82600
(cherry picked from commit bb6d1e211bdb41c129ee17489814327d7d8d2fb8)
Change-Id: Ie0e924d45398c7def58e3722035911d905614b6f
Reviewed-on: http://git-master/r/89507
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Oleg Strikov <ostrikov@nvidia.com>
Reviewed-by: Janne Hellsten <jhellsten@nvidia.com>
Tested-by: Ryan Bissell <rbissell@nvidia.com>
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Bug 953210
Change-Id: Id40b3fe90174a2a8c9a6faf3f35f61d9f7eeb642
Signed-off-by: Sayak Ghosh Choudhury <sayakc@nvidia.com>
Reviewed-on: http://git-master/r/98477
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Added TDM mode support in I2S driver.
Added support functions in AHUB to pass audio/client bits.
Added support functions in AHUB to pass audio/client channels.
Fixed the stopping of I2S/TDM by clearing the fifo.
Bug 948478
Change-Id: I246942b3a07ffcfbcfafbc820208190bd3acc5d4
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/98456
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Inform DC register updated after we programmed. This eliminates
the display corruption while device enters and resumes from LP0.
Signed-off-by: Mark Zhang <markz@nvidia.com>
bug 964626
Change-Id: I4c655d4800474c675d4cdb6204d6fe66e8c6c4b5
Reviewed-on: http://git-master/r/98336
Tested-by: Mark Zhang <markz@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peer Chen <pchen@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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l2x0_unlock does not use L2X0_CACHE_ID_PART_MASK to get the
actual cache-id, thus always iterating over only one I and one
D lockdown register.
Change-Id: If473bd32991a6a97f9da6b8712f297a8bd00d32e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/96954
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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When open drian pin is set as gpio-input, the pin is set as
tristate and hence need not to set this again tristate from
pinmux controller.
Setting the pin in normal in pinmux controller and then
- setting HIGH by gpio-input and pull-up so that pin is
tristated through gpio controller.
- Setting LOW by gpio-output and drive to LOW. As pin is in
normal state in the pinmux, the output will be set to LOW.
bug 973591
bug 969182
Change-Id: Ia9518f79987c9562bb57f95a468bdc5b5e143b87
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/98434
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Making core power to be off in LP0.
bug 973979
Change-Id: I0c8f44fce2204395530c63fd0056f98a3c4ef115
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/98413
Reviewed-by: Automatic_Commit_Validation_User
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configure fuel-gauge to enter and exit hibernate mode
Change-Id: Ifaa471a4b796fc1aa2b30f109091227eb19cf6ae
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/97900
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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For update of PMC_CTRL register delay is not required.
Replacing pmc_32kwritel by writel to improve cluster switch time.
bug 954247
Change-Id: Ic39c6fafd606321d549cf26e4cfe662f462b9bdc
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/97229
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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This change adds check for out of memory conditions
after memory allocations
Bug 967504
Change-Id: Icafc16528880ea376dd69a023570b85c25e3d057
Signed-off-by: Anton Kondratenko <akondratenko@nvidia.com>
Reviewed-on: http://git-master/r/97113
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Change-Id: I8aa25b03fe6801882b65209cb1a6e125ef27ac2c
Signed-off-by: Michael I. Gold <gold@nvidia.com>
Reviewed-on: http://git-master/r/98319
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Provide a fixed mapping for the PCIe host registers. This reduces the pressure
on the VMALLOC area significantly.
bug 969392
Change-Id: I80ea0dd5e81a005f86a26eb47aea00d78e9e0ad2
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/96748
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Its observed that PCIE all clocks enabled on resume.
Follow up resume and suspend only if any port added
bug 943712
Change-Id: I0644aad8a4994726451cda094f2607eb8398aadf
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/95836
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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LP2 state of Tegra2 is considered into rail statistic.
Change-Id: Iab2e0fe25ecb8feca1f4aa1040ce5020e6dcf584
Signed-off-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-on: http://git-master/r/98118
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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