Age | Commit message (Collapse) | Author |
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Instead of dealing with sched classes inside each check_preempt_curr()
implementation, pull out this logic into the generic wakeup preemption
path.
Manually applied the partial patch set from
http://www.spinics.net/lists/kvm-commits/msg00039.html and
cross-refernce'd the k39 kernel
Bug 886798
Change-Id: Ib5bb12eec6c276ded9231e9ed2238499d42e31da
Reviewed-on: http://git-master/r/59405
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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This reverts commit 464da11dc8aa1dcd1ec0e0d3ba13b48730a29351.
Change-Id: Ie62922afa693d3920da5b9ee96c286a3e5d886d8
Reviewed-on: http://git-master/r/59404
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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This reverts commit 11d1031e894c67145fb2bffee6f3af19ae4205d3.
Change-Id: I376126b1b596e777c66bf64dd9f2f6d224a396ab
Reviewed-on: http://git-master/r/59403
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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This reverts commit 47450edc2d22b5561c9aebcf09ea7179d8162c18.
Change-Id: If84baf4b3f1776006ffacdb1c0275c1fc9bc21ba
Reviewed-on: http://git-master/r/59402
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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This reverts commit ea7606d64552ebe42d5186a9defc5b497c4e8193.
Change-Id: I6385039b8a99c3d606f84fc51b8252765dfc0dc3
Reviewed-on: http://git-master/r/59401
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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Addition of AC power supply property (POWER_SUPPLY_PROP_ONLINE)
so as to display power plug as AC while charging from usb
wall charger.
Reviewed-on: http://git-master/r/58039
(cherry picked from commit 38de3b3031e827c5212e20c1facbe818eb5600fc)
Change-Id: Ie9966c60b25b7e70cd4a516b9d7f02cbc1bc636c
Reviewed-on: http://git-master/r/59040
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
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Adding battery present support to fuel-gauge driver
so as not to report battery charecterstics when
battery is not present
bug 873965
Reviewed-on: http://git-master/r/55122
(cherry picked from commit 6c88c37e3bedf4645ecf359e8cf9e84e0868fed0)
Change-Id: I9ea1abb27f0ad88c17cffc75730ebc72c0dfb8f6
Reviewed-on: http://git-master/r/59038
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
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Adding phy restore callback functions due to the modem handshaking change
during LP0 resume.
Bug 863224
Reviewed-on: http://git-master/r/58516
(cherry picked from commit e718eac448660ec8844d9f97e8c307d845f6063a)
Change-Id: I58af3da0951248448781da3409d392722d2e6a38
Reviewed-on: http://git-master/r/59201
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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Adding phy_restore_start and phy_restore_end functions for null ULPI.
Forcing ehci_restart after LP0 for null ULPI.
Bug 863224
Reviewed-on: http://git-master/r/58474
(cherry picked from commit 5f5e7961c8a6a5be853fcdba4ae10d0bd6efc5f3)
Change-Id: If49f6acdcf15661f765c345431a52695bc045d29
Reviewed-on: http://git-master/r/59200
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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XMM modem version 1130 (or later) changes the GPIO power up
sequence. Add module variable to support pre-1130 and post-1130
modem versions.
BUG 828389
Reviewed-on: http://git-master/r/58240
(cherry picked from commit e2c2c9c48db680bdddc58e5863f889e52948212b)
Change-Id: I55bc5ed2bcd1127cab11fc9c7b0197630d264c2b
Reviewed-on: http://git-master/r/59191
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
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This reverts commit f3d3bbd36480f7a79a2a6eb823c35c5cb7ed8364.
Bug 889219
Bug 887377?
Change-Id: Id738b1d72712d93be169aa63b1a185bb0ee5a0a2
Reviewed-on: http://git-master/r/58420
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Bug 841336
Change-Id: Id3fb9a6a81189ad25ec9aea201fcb931ebe17f44
Reviewed-on: http://git-master/r/51949
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Increased maximum rate of CPU clock sources, and added cpufreq scaling
table to cover frequency range up to 1.7GHz for fast Tegra3 parts.
Bug 841336
Change-Id: I85739949bfc76f1f738ef5f49c97499f821d054d
Reviewed-on: http://git-master/r/51948
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Add a new mode, resolution 800x600. This mode supports
120fps in Aptina sensor 120fps.
Bug: 888005
Change-Id: I1e1368e203dfb3dab3d849f038b38cbcd763ecb2
Reviewed-on: http://git-master/r/57565
Reviewed-by: Krupal Divvela <kdivvela@nvidia.com>
Tested-by: Yuvraj Pasi <ypasi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Resetting the mode does not need to reset all of the i2c
registers. This used to be called "fast set_mode". This
is added into the kernel driver in this change. This
change reduced 90ms from resetting the mode. It only
apply to still preview and capture resolutions
bug 816814
Change-Id: Id27f526dc8b4623b08a04b536d8d7ebdc904572d
Reviewed-on: http://git-master/r/53587
Tested-by: Anton Poon <antonp@nvidia.com>
Reviewed-by: Qi Wang <qiw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Update DIDIM flicker control so that updates are not applied
unless 10 frames in a row require a different brightness and pixel
modification than the current one.
Bug 888292
Change-Id: Iafbda39cb6a490fccfd5fbd0ad32d2db14fad785
Reviewed-on: http://git-master/r/57623
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Adds phase_in_video field that slowly phases in changes to the
pixel modification and backlight values. This should only be enabled
during video as its results with content that has non-deterministic
time between frame updates is sub-optimal.
Bug 888294
Change-Id: If4cba05779b9eb51a63d58a780ae72ceabfb4c2d
Reviewed-on: http://git-master/r/57596
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Matt Wagner <mwagner@nvidia.com>
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Allows DIDIM to keep track of multiple aggressiveness settings
based on different priority levels. Four Priority levels are supported
and the maximum priority currently specified overrules the other settings.
Lowest priority is given to the default kernel value and user specified values.
Bug 888292
Change-Id: I970c33bbc662ffd3bf432b4de945abdb604b6895
Reviewed-on: http://git-master/r/57130
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Support for E1291-A05 board.
bug 881745
Change-Id: I8307e7cd244cf4b18b06c0ed757bb5a580217ee0
Reviewed-on: http://git-master/r/54665
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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DSI clock rate is calculated according to the refresh rate 60Hz. However,
the real TE signal can be more or less than 60Hz. Increase refresh rate
to avoid missing TE signal.
Bug 878230
Change-Id: I1dbf275cad2a4bd1692a3a287a4719298413ece9
Reviewed-on: http://git-master/r/46455
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Reviewed-on: http://git-master/r/57354
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Change the pll source of i2c from CLK_M to PLL_P_OUT0.
Bug 856468
Change-Id: I837c347055567bf5260c4f1d649b35d3ab56874e
Reviewed-on: http://git-master/r/56208
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Change-Id: I7c4c20f3892e017c8f66409128c63a5bd9b629b9
Reviewed-on: http://git-master/r/57410
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 834332
Change-Id: I2f8bfdfd0856d55cc6c2663e968f7330c5a6d8ac
Reviewed-on: http://git-master/r/57362
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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(see bug for Excel with the new spec)
Bug 844268
Change-Id: Ie5d27bf88a926b3f4a55fb22ac1254829f4acb08
Reviewed-on: http://git-master/r/57095
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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- Enable the PCIe driver (CONFIG_TEGRA_PCI)
(cherry picked from commit 50168b0795579609b36cd571575d8025885bc437)
Change-Id: I7cc2014c37a31b167c05188eb5c4f56f2c1f11f4
Reviewed-on: http://git-master/r/55741
Reviewed-by: Vivek Aseeja <vaseeja@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Krishna Monian <kmonian@nvidia.com>
Tested-by: Krishna Monian <kmonian@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Kuan Luo <kluo@nvidia.com>
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Change-Id: I4645eacb1b60c1de0b6c3530e9a1a453a5119fcf
Reviewed-on: http://git-master/r/56849
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enable DC IRQ only after IRQ is configured to avoid the IRQ flooding.
Change-Id: Ib0366999feffee6d2d79951ceb4f120e5951dd07
Reviewed-on: http://git-master/r/56819
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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It is possible for GPIO interrupt to occur when registering handler
since set_irq_chained_handler enables GPIO interrupt. Thus
all relevant variables are required to be initialized
before calling set_irq_chained_handler.
Also add initialization of interrupt status register.
Bug 884569
Reviewed-on: http://git-master/r/55612
(cherry picked from commit e03fe4cc1bf06fa6c32c0520e2ba31f009f9301d)
Change-Id: I32ea97c254fe537d5a86e630a0de9afcf117f96e
Reviewed-on: http://git-master/r/56750
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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make charging % consistence across suspend/resume in
HOME screen and in "Battery level"
(settings-->About Phone-->Status-->Battery level)
bug 862208
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/54253
(cherry picked from commit c7ab0b1c79f23ea0ca4f105841646a6c1724e5a8)
Change-Id: I46f96cdad2e55e5b06c7f788ff3d891a20dcc14f
Reviewed-on: http://git-master/r/56658
Tested-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Use the device driver name instead of encoding the SDMMC controller
in the regulator supply name.
This change is came from commit 676dd57f8eb252ce61807c02e5153b4ee4e29418,
and it was reviewd on http://git-master/r/#change,53783.
Change-Id: I7d5a21b898fddf6892f12ba01dc2e6c987926ff1
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/56368
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The SDMMC_VDD control is generated from the cpld programming for pm269
and so it is not require to have gpio control for this.
This change is came from commit e92b10299b329f9df29ae23099b8f2f5f2eee1d7.
Change-Id: Ibcf30b83936462248a3a4412cf63c220cfd3f728
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/56367
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Adding regulator supply "vdd" for NCT1008 into PM298 what MAX77663 PMIC.
Change-Id: I1db693088ea109b977e89c6b60e89325d415e131
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/56366
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Change-Id: I0db922fa6f495cff4271b9c347a18a38a3571007
Reviewed-on: http://git-master/r/56095
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Adding TI codec aic3262 soc driver code.
Change-Id: I2557666d5704f9857d2f5e5238eb67d55ebc89d5
Reviewed-on: http://git-master/r/56080
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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The w_disable pin is connected to different gpio in
E1198-A02 compare to E1198-A01. Making related changes
to support E1198-A02.
bug 864282
Change-Id: I6b5149e9ee660a040d18ea3fadf5090dc41609ba
Reviewed-on: http://git-master/r/55528
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Change VDD_CPU and VDD_CORE dependencies so that VDD_CORE min is 1.1V
when G CPU is active.
Change-Id: Ie0e6b4d814e50bc4507d70ccd8ae17962fd1209c
Reviewed-on: http://git-master/r/54832
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Bug 833115
Change-Id: I9516e5f9f70f6089b2572d2b2b2fd9b3602ddd8f
Reviewed-on: http://git-master/r/54825
Reviewed-by: Frank Chen <frankc@nvidia.com>
Tested-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Initializing the pins which is used in gpio to their inital state.
bug 876305
Change-Id: Iaccc66eae900781abf3f0ea2dba27a1fdcbdb31b
Reviewed-on: http://git-master/r/54658
Tested-by: Alex Courbot <acourbot@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adds checks for memory allocation failures, and proper propagation
of error conditions. Adds clearing of pointers after free or unpin
has been called to catch use after free.
Bug 877551
Change-Id: I3a4780e0f606f777983c37c08e430755de5d21e4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/54027
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
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Avoiding negative number parsing for debug port id.
bug 854995
Change-Id: I6307d43136510d50c9614f8696bb41448e9823b9
Reviewed-on: http://git-master/r/54924
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Previously it is configured SD1 min_uV to 1.05V to avoid voltage
under-shooting issue on SD1 power rail.
But it doesn't need after safe voltage scaling step patch for
max77663 regulator driver.
Change-Id: I7e5380e0987a39dc9207235137d7e313f5ea077a
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/56962
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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The MAX77663 PMU has under-shooting issue when voltage down scaling
on SD power rails until revision 3. So if revision is less than rev3,
set safe_down_uV for stable down scaling.
Change-Id: Idbfbd491218cd7dcb3f592efe656fac77de3fe7c
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/56950
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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kernel mutexes may not be used in hardware or software interrupt
contexts such as tasklets and timers.
Bug 876433
Reviewed-on: http://git-master/r/53734
(cherry picked from commit 17f7d52511d38e98c7305319818f62c641d42c0e)
Change-Id: I87f3918d3772100e255185af2236ccdabb97fe85
Reviewed-on: http://git-master/r/56938
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Changes -
1. interrupt enable register written was read-only. Changed
destination to writable register.
2. all irq were enabled in suspend mode. Disabled interrupts
other than wake sources.
bug 847344
Change-Id: I6f6657f184cb40be5335185e7d901d9d12faaf6b
Reviewed-on: http://git-master/r/53814
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Fixing build failure what undefined reference to max77663_xxx APIs when
didn't built-in max77663 mfd core driver.
Change-Id: Id9c536d5672ba910e56d3830e445fe3bf86aae3c
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/56912
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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nct1008 driver has been changed as follows:
1. debugfs create file error check corrected.
2. pr_err usage replaced with dev_err calls
Change-Id: I52e08076a8de430ac33ba78645e623357b8efa1c
Reviewed-on: http://git-master/r/56651
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Test function is invoked by hdmi test module to test DC1, HDMI and
EDID modules.
Bug 834332
Change-Id: Ib67069ce2b8969ea13ebb1f4ac15a28d62da8adb
Reviewed-on: http://git-master/r/56482
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Exit fuel-gauge driver if battery presence is not detected.
bug 873965
Change-Id: Iac5ee895d22c613c90299136fb3b5cbbc195caec
Reviewed-on: http://git-master/r/54789
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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PM298 what MAX77663 PMIC supports for PM305, PM311 and E1257 based
systems.
Change-Id: If8f64597477b05ddae5a11ae0eb7a682f675c50f
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/56365
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Added option to enable the use of the Linux Thermal
Sysfs infrastructure within the tegra thermal
framework.
Change-Id: Ibaffecfda0fa1eee0d892e3b85e980bebeda1cc8
Reviewed-on: http://git-master/r/55837
Reviewed-by: Joshua Primero <jprimero@nvidia.com>
Tested-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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