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2012-11-21Merge branch 'zynq/multiplatform' of ↵Olof Johansson
git://git.monstr.eu/linux-2.6-microblaze into next/multiplatform From Michal Simek: This branch depends on arm-soc devel/debug_ll_init branch because we needed Rob's "ARM: implement debug_ll_io_init()" (sha1: afaee03511ba8002b26a9c6b1fe7d6baf33eac86) patch. This branch also depends on zynq/dt branch because of previous major zynq changes. zynq/cleanup branch is subset of zynq/dt. * 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze: ARM: zynq: Remove all unused mach headers ARM: zynq: add support for ARCH_MULTIPLATFORM ARM: zynq: make use of debug_ll_io_init() ARM: zynq: remove TTC early mapping ARM: zynq: add clk binding support to the ttc ARM: zynq: use zynq clk bindings clk: Add support for fundamental zynq clks ARM: zynq: dts: split up device tree ARM: zynq: Allow UART1 to be used as DEBUG_LL console. ARM: zynq: dts: add description of the second uart ARM: zynq: move arm-specific sys_timer out of ttc zynq: move static peripheral mappings zynq: remove use of CLKDEV_LOOKUP zynq: use pl310 device tree bindings zynq: use GIC device tree bindings Add/add conflict in arch/arm/Kconfig.debug. Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-21ARM: zynq: Remove all unused mach headersMichal Simek
Remove empty unused mach/hardware.h. mach/irqs.h is unused because SPARSE_IRQ are ON by default. mach/timex.h is unused because of CONFIG_ARCH_MULTIPLATFORM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com>
2012-11-21ARM: zynq: add support for ARCH_MULTIPLATFORMJosh Cartwright
The majority of changes are necessary to remove dependencies on header files within arch/arm/mach-zynq/include/mach: uncompress.h - Deleted. It is unused for ARCH_MULTIPLATFORM builds. uart.h: - Move uart definitions out of uart.h into debug/zynq.S, which is now the only user zynq_soc.h: - Move SCU address definitions into common.c. - Other #defines, such as PERIPHERAL_CLOCK_RATE, TTC0_BASE, etc, are unused and can be dropped Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-11-21ARM: zynq: make use of debug_ll_io_init()Josh Cartwright
Convert low-level debugging routines to make use of debug_ll_io_init(). This is part of the preparation for ARCH_MULTIPLATFORM support for Zynq. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-11-21ARM: zynq: remove TTC early mappingJosh Cartwright
Now that the TTC driver has proper support for DT bindings, it is not necessary for the registers to be mapped early. They will be mapped during clock initialization using of_iomap(). Remove the early mapping. In addition, remove the extraneous zynq_soc.h include from the timer driver. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
2012-11-21Merge branch 'devel/debug_ll_init' into zynq/multiplatformMichal Simek
2012-11-21Merge tag 'tegra-for-3.8-single-zimage' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/multiplatform From Stephen Warren: ARM: tegra: single-zImage preparation work Various cleanups and enhancements are made to core Tegra code towards the aim of including Tegra in a multi-platform ARM kernel: RTC, timer, and TWD are configured via device tree. SPARSE_IRQ is enabled. Tegra's debug_ll options are simplified, and the macros brought into line with other multi-platform implementations, and moved to the new common location. Two headers still need to be eliminated in order to include Tegra in a multi-platform kernel/ <mach/{clk,powergate}.h>. A new common API needs to be invented to replace parts of clk.h. powergate.h might be replaced by regulators; this needs more investigation. This pull request is based on tegra-for-3.8-dt, followed by a merge of arm-soc's devel/debug_ll_init branch. * tag 'tegra-for-3.8-single-zimage' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (58 commits) ARM: tegra: move debug-macro.S to include/debug ARM: tegra: don't include iomap.h from debug-macro.S ARM: tegra: decouple uncompress.h and debug-macro.S ARM: tegra: simplify DEBUG_LL UART selection options ARM: tegra: select SPARSE_IRQ ARM: tegra: enhance timer.c to get IO address from device tree ARM: tegra: enhance timer.c to get IRQ info from device tree ARM: timer: fix checkpatch warnings ARM: tegra: add TWD to device tree ARM: tegra: define DT bindings for and instantiate RTC ARM: tegra: define DT bindings for and instantiate timer ARM: tegra: whistler: enable HDMI port ARM: tegra: tec: Enable HDMI output ARM: tegra: plutux: Enable HDMI output ARM: tegra: tamonten: Add host1x support ARM: tegra: trimslice: enable HDMI port ARM: tegra: harmony: enable HDMI port ARM: tegra: Add Tegra30 host1x support ARM: tegra: Add Tegra20 host1x support ARM: tegra: trimslice: enable SPI flash ...
2012-11-16ARM: tegra: move debug-macro.S to include/debugStephen Warren
Move Tegra's debug-macro.S over to the common debug macro directory. Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that all related options are selected in the same place. Tegra's uncompress.h is left in mach-tegra/include/mach; it will be removed whenever Tegra is converted to multi-platform. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: don't include iomap.h from debug-macro.SStephen Warren
In order to move Tegra's debug-macro.S to a common location for single zImage, it must not rely on any machine-specific header files such as <mach/iomap.h>. Duplicate the few physical address definitions that debug-macro.S relies upon directly into the file. To avoid tegra_io_desc[] requiring shared knowledge of the UART mapping's virtual address, use a virtual address outside the ranges in tegra_io_desc[]. Call debug_ll_io_init() to propagate the mapping beyond the early pages tables. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: decouple uncompress.h and debug-macro.SStephen Warren
Prior to this change, Tegra's debug-macro.S relied on uncompress.h having determined which UART to use, and whether it was safe to use the UART (i.e. is it not in reset, and is clocked). This determination was communicated from uncompress.h to debug-macro.S using a few bytes of Tegra's IRAM (an on-SoC RAM). This had the disadvantage that uncompress.h was a required part of the kernel boot process; booting a non-compressed kernel would not allow earlyprintk to operate. This change duplicates the UART selection and validation logic into debug-macro.S so that the reliance on uncompress.h is removed. This also helps out with single-zImage work, since there is currently no support for using any uncompress.h with single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: simplify DEBUG_LL UART selection optionsStephen Warren
Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more: * No upstream bootloader currently or will ever support this option. * CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative. Merge the fixed and automatic UART selection menus into a single choice for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART, rather than potentially having an AUTO option override whatever fixed option was chosen. Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART, simply don't turn on DEBUG_LL. NONE used to be the default option, so pick AUTO_ODMDATA as the new default. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: select SPARSE_IRQStephen Warren
SPARSE_IRQ is required for single zImage support. With this enabled, we can delete <mach/irqs.h>. This requires removing one unnecessary include of that file, and hard-coding the PCIe IRQ into the PCIe driver. This is a hack that will be dealt with as part of converting the PCIe driver into a true DT-supporting driver. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: enhance timer.c to get IO address from device treeStephen Warren
Modify Tegra's timer code to parse the IO address from device tree, hence removing the dependency on <mach/iomap.h>. This will allow the driver to be moved to drivers/clocksource/. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: enhance timer.c to get IRQ info from device treeStephen Warren
Modify Tegra's timer code to parse the Tegra timer IRQ from device tree, and to instantiate the TWD from device tree, rather than relying on hard- coded values from <mach/irqs.h>. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: timer: fix checkpatch warningsStephen Warren
This prevents checkpatch complaining when this file is moved in a later patch. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: add TWD to device treeStephen Warren
This will allow timer.c to use twd_local_timer_of_register(), and hence not need to hard-code the TWD address or IRQ. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: define DT bindings for and instantiate RTCStephen Warren
The Tegra RTC maintains seconds and milliseconds counters, and five alarm registers. The alarms and other interrupts may wake the system from low-power state. Define a DT binding for this HW module, and add the module into the Tegra device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: define DT bindings for and instantiate timerStephen Warren
The Tegra timer provides a number of 29-bit timer channels, a single 32-bit free running counter, and in the Tegra30 variant, 5 watchdog modules. The first two channels may also trigger a legacy watchdog reset. Define a DT binding for this HW module, and add the module into the Tegra device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16Merge remote-tracking branch 'korg_arm-soc/devel/debug_ll_init' into ↵Stephen Warren
for-3.8/single-zimage
2012-11-16ARM: tegra: whistler: enable HDMI portStephen Warren
Enable host1x, and the HDMI output. Whistler also has a DSI-based LCD, and a VGA output. tegradrm doesn't support either of those output types yet. Based on work by Thierry Reding for TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: tec: Enable HDMI outputThierry Reding
Enable the HDMI output found on Tamonten Evaluation Carrier boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: plutux: Enable HDMI outputThierry Reding
Enable the HDMI output found on Plutux boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: tamonten: Add host1x supportThierry Reding
Hook up the required regulators, I2C DDC adapter and hotplug detect GPIO to the Tamonten HDMI output. Carrier boards still need to explicitly enable the output to use it. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: trimslice: enable HDMI portThierry Reding
Enable host1x, and the HDMI output. Harmony also has a DVI port with an HDMI form-factor connector, driven by Tegra's LVDS output. This isn't enabled yet, due to potential issues with having multiple outputs enabled. Correct DDC I2C frequency to 100KHz. Add dummy/fixed regulators to satisfy the HDMI driver. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> [swarren: add commit description, remove enable of DVI port] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16Merge tag 'mtu-clk-for-arm-soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/multiplatform From Linus Walleij <linus.walleij@linaro.org>: This tag contains two MTU patches based on top of the ux500 sparse IRQ commit to avoid merge clashes. * tag 'mtu-clk-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: clocksource/mtu-nomadik: use apb_pclk clk: ux500: Register mtu apb_pclocks Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-11-16ARM: tegra: harmony: enable HDMI portStephen Warren
Enable host1x, and the HDMI output. Harmony also has an optional LCD, and a VGA output. The former isn't enabled due to potential issues with having multiple outputs enabled. The latter isn't enabled since the driver doesn't support VGA yet anyway. Correct DDC I2C frequency to 100KHz. Based on work by Thierry Reding for TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16clocksource/mtu-nomadik: use apb_pclkUlf Hansson
After improving the clock tree we need to make sure the the MTU timer explicitly grabs and enables it silicon clock (pclk). Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2012-11-15ARM: tegra: Add Tegra30 host1x supportThierry Reding
Add the host1x node along with its children to the Tegra30 DTSI. Board- specific DTS files are expected to enable the available outputs and complement the device tree with data specific to the hardware. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra20 host1x supportThierry Reding
Add the host1x node along with its children to the Tegra20 DTSI. Board- specific DTS files are expected to enable the available outputs and complement the device tree with data specific to the hardware. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: trimslice: enable SPI flashStephen Warren
TrimSlice contains a 1MiB SPI flash. Represent this in the device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: add sflash controller dt entryLaxman Dewangan
Nvidia's Tegra20 have the SPI (SFLASH) controller to interface with spi flash device which is used for system boot. Add DT entry for this controller. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: move sflash node to keep file sorted] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: ventana: Add NCT1008 temperature sensorThierry Reding
The Harmony board has an ON Semiconductors NCT1008 temperature sensor connected to the DVC bus. It can be used to monitor the ambient (local) and on-die (remote) temperatures. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tamonten: Add NCT1008 temperature sensorThierry Reding
The Tamonten SOM has an ON Semiconductor NCT1008 connected to the DVC bus which is used to measure the ambient (local) temperature as well as the on-die (remote) temperature. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: harmony: Add ADT7641 temperature sensorThierry Reding
The Harmony board has an Analog Devices ADT7461 temperature sensor connected to the DVC bus. It can be used to monitor the ambient (local) and on-die (remote) temperatures. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tec: Remove redundant DT propertiesThierry Reding
These properties are already set by the tegra20-tamonten.dtsi, so they don't need to be repeated. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tamonten: Add DDC/PTA pinmuxThierry Reding
This commit allows the I2C2 controller on Tegra20 to be routed either to the DDC or the PTA pin group at runtime. On Tamonten this allows the I2C bus to be used for the DDC of the HDMI connector or to access I2C chips on the carrier board. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: cardhu: enable SLINK4Laxman Dewangan
Enable SLINK4 and connected device in Tegra30 based platform Cardhu. Setting maximum spi frequency to 25MHz. SPI serial flash is connected on CS1 of SLINK4 on cardhu platform. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: swapped reg/compatible order to be consistent] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: add slink controller dt entryLaxman Dewangan
Add slink controller details in the dts file of Tegra20 and Tegra30. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: tegra: ventana: define pinmux for ddcMark Zhang
Tegra 2's I2C2 controller can be routed to either the PTA or DDC pin group on Ventana. So: - Remove the HDMI function definition of pta pingroup - Define child i2c adapters(ddc & pta) for I2C2 controller Signed-off-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t30 cardhu: set pinmux and power for wlanWei Ni
Configure pinmux as required for WiFi. Enable the SDHCI1 controller for a02 and a04 board, which is connected to the WiFi module. For now, always enable the regulator that provides power to the Wifi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t20 ventana: set pinmux and power for wlanWei Ni
Configure pinmux as required for WiFi. Enable the SDHCI1 controller, which is connectted to the WiFi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t20 seaboard: turn on the power for wlanWei Ni
Enable the SDHCI1 controller. This is connected to the WiFi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra30 host1x clock supportThierry Reding
Setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add AUXDATA for Tegra30 host1xThierry Reding
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra20 host1x clock supportThierry Reding
Extend the pll_d frequency table with a few entries to support common HDMI and LVDS display modes and setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add AUXDATA for Tegra20 host1xThierry Reding
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Tegra30 speedo-based process identificationDanny Huang
This patch adds speedo-based process identification support for Tegra30. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra3/Tegra30/ in log print, s/T30/Tegra30/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add speedo-based process identificationDanny Huang
Detect CPU and core process ID by checking speedo corner tables. This can provide a more accurate process ID. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra2/Tegra20/ in log print] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: flexible spare fuse read functionDanny Huang
Change the spare fuse base from a definition to a variable. It provides flexibilty to read spare fuse on different chip. Signed-off-by: Danny Huang <dahuang@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15clk: ux500: Register mtu apb_pclocksUlf Hansson
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
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